setup-common.c 18 KB

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  1. /*
  2. * Common boot and setup code for both 32-bit and 64-bit.
  3. * Extracted from arch/powerpc/kernel/setup_64.c.
  4. *
  5. * Copyright (C) 2001 PPC64 Team, IBM Corp
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #undef DEBUG
  13. #include <linux/export.h>
  14. #include <linux/string.h>
  15. #include <linux/sched.h>
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/reboot.h>
  19. #include <linux/delay.h>
  20. #include <linux/initrd.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/ioport.h>
  24. #include <linux/console.h>
  25. #include <linux/screen_info.h>
  26. #include <linux/root_dev.h>
  27. #include <linux/notifier.h>
  28. #include <linux/cpu.h>
  29. #include <linux/unistd.h>
  30. #include <linux/serial.h>
  31. #include <linux/serial_8250.h>
  32. #include <linux/debugfs.h>
  33. #include <linux/percpu.h>
  34. #include <linux/memblock.h>
  35. #include <linux/of_platform.h>
  36. #include <asm/io.h>
  37. #include <asm/paca.h>
  38. #include <asm/prom.h>
  39. #include <asm/processor.h>
  40. #include <asm/vdso_datapage.h>
  41. #include <asm/pgtable.h>
  42. #include <asm/smp.h>
  43. #include <asm/elf.h>
  44. #include <asm/machdep.h>
  45. #include <asm/time.h>
  46. #include <asm/cputable.h>
  47. #include <asm/sections.h>
  48. #include <asm/firmware.h>
  49. #include <asm/btext.h>
  50. #include <asm/nvram.h>
  51. #include <asm/setup.h>
  52. #include <asm/rtas.h>
  53. #include <asm/iommu.h>
  54. #include <asm/serial.h>
  55. #include <asm/cache.h>
  56. #include <asm/page.h>
  57. #include <asm/mmu.h>
  58. #include <asm/xmon.h>
  59. #include <asm/cputhreads.h>
  60. #include <mm/mmu_decl.h>
  61. #include <asm/fadump.h>
  62. #ifdef DEBUG
  63. #include <asm/udbg.h>
  64. #define DBG(fmt...) udbg_printf(fmt)
  65. #else
  66. #define DBG(fmt...)
  67. #endif
  68. /* The main machine-dep calls structure
  69. */
  70. struct machdep_calls ppc_md;
  71. EXPORT_SYMBOL(ppc_md);
  72. struct machdep_calls *machine_id;
  73. EXPORT_SYMBOL(machine_id);
  74. int boot_cpuid = -1;
  75. EXPORT_SYMBOL_GPL(boot_cpuid);
  76. unsigned long klimit = (unsigned long) _end;
  77. /*
  78. * This still seems to be needed... -- paulus
  79. */
  80. struct screen_info screen_info = {
  81. .orig_x = 0,
  82. .orig_y = 25,
  83. .orig_video_cols = 80,
  84. .orig_video_lines = 25,
  85. .orig_video_isVGA = 1,
  86. .orig_video_points = 16
  87. };
  88. #if defined(CONFIG_FB_VGA16_MODULE)
  89. EXPORT_SYMBOL(screen_info);
  90. #endif
  91. /* Variables required to store legacy IO irq routing */
  92. int of_i8042_kbd_irq;
  93. EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
  94. int of_i8042_aux_irq;
  95. EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
  96. #ifdef __DO_IRQ_CANON
  97. /* XXX should go elsewhere eventually */
  98. int ppc_do_canonicalize_irqs;
  99. EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
  100. #endif
  101. /* also used by kexec */
  102. void machine_shutdown(void)
  103. {
  104. #ifdef CONFIG_FA_DUMP
  105. /*
  106. * if fadump is active, cleanup the fadump registration before we
  107. * shutdown.
  108. */
  109. fadump_cleanup();
  110. #endif
  111. if (ppc_md.machine_shutdown)
  112. ppc_md.machine_shutdown();
  113. }
  114. void machine_restart(char *cmd)
  115. {
  116. machine_shutdown();
  117. if (ppc_md.restart)
  118. ppc_md.restart(cmd);
  119. #ifdef CONFIG_SMP
  120. smp_send_stop();
  121. #endif
  122. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  123. local_irq_disable();
  124. while (1) ;
  125. }
  126. void machine_power_off(void)
  127. {
  128. machine_shutdown();
  129. if (pm_power_off)
  130. pm_power_off();
  131. #ifdef CONFIG_SMP
  132. smp_send_stop();
  133. #endif
  134. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  135. local_irq_disable();
  136. while (1) ;
  137. }
  138. /* Used by the G5 thermal driver */
  139. EXPORT_SYMBOL_GPL(machine_power_off);
  140. void (*pm_power_off)(void);
  141. EXPORT_SYMBOL_GPL(pm_power_off);
  142. void machine_halt(void)
  143. {
  144. machine_shutdown();
  145. if (ppc_md.halt)
  146. ppc_md.halt();
  147. #ifdef CONFIG_SMP
  148. smp_send_stop();
  149. #endif
  150. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  151. local_irq_disable();
  152. while (1) ;
  153. }
  154. #ifdef CONFIG_TAU
  155. extern u32 cpu_temp(unsigned long cpu);
  156. extern u32 cpu_temp_both(unsigned long cpu);
  157. #endif /* CONFIG_TAU */
  158. #ifdef CONFIG_SMP
  159. DEFINE_PER_CPU(unsigned int, cpu_pvr);
  160. #endif
  161. static void show_cpuinfo_summary(struct seq_file *m)
  162. {
  163. struct device_node *root;
  164. const char *model = NULL;
  165. #if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
  166. unsigned long bogosum = 0;
  167. int i;
  168. for_each_online_cpu(i)
  169. bogosum += loops_per_jiffy;
  170. seq_printf(m, "total bogomips\t: %lu.%02lu\n",
  171. bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
  172. #endif /* CONFIG_SMP && CONFIG_PPC32 */
  173. seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
  174. if (ppc_md.name)
  175. seq_printf(m, "platform\t: %s\n", ppc_md.name);
  176. root = of_find_node_by_path("/");
  177. if (root)
  178. model = of_get_property(root, "model", NULL);
  179. if (model)
  180. seq_printf(m, "model\t\t: %s\n", model);
  181. of_node_put(root);
  182. if (ppc_md.show_cpuinfo != NULL)
  183. ppc_md.show_cpuinfo(m);
  184. #ifdef CONFIG_PPC32
  185. /* Display the amount of memory */
  186. seq_printf(m, "Memory\t\t: %d MB\n",
  187. (unsigned int)(total_memory / (1024 * 1024)));
  188. #endif
  189. }
  190. static int show_cpuinfo(struct seq_file *m, void *v)
  191. {
  192. unsigned long cpu_id = (unsigned long)v - 1;
  193. unsigned int pvr;
  194. unsigned long proc_freq;
  195. unsigned short maj;
  196. unsigned short min;
  197. #ifdef CONFIG_SMP
  198. pvr = per_cpu(cpu_pvr, cpu_id);
  199. #else
  200. pvr = mfspr(SPRN_PVR);
  201. #endif
  202. maj = (pvr >> 8) & 0xFF;
  203. min = pvr & 0xFF;
  204. seq_printf(m, "processor\t: %lu\n", cpu_id);
  205. seq_printf(m, "cpu\t\t: ");
  206. if (cur_cpu_spec->pvr_mask)
  207. seq_printf(m, "%s", cur_cpu_spec->cpu_name);
  208. else
  209. seq_printf(m, "unknown (%08x)", pvr);
  210. #ifdef CONFIG_ALTIVEC
  211. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  212. seq_printf(m, ", altivec supported");
  213. #endif /* CONFIG_ALTIVEC */
  214. seq_printf(m, "\n");
  215. #ifdef CONFIG_TAU
  216. if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
  217. #ifdef CONFIG_TAU_AVERAGE
  218. /* more straightforward, but potentially misleading */
  219. seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
  220. cpu_temp(cpu_id));
  221. #else
  222. /* show the actual temp sensor range */
  223. u32 temp;
  224. temp = cpu_temp_both(cpu_id);
  225. seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
  226. temp & 0xff, temp >> 16);
  227. #endif
  228. }
  229. #endif /* CONFIG_TAU */
  230. /*
  231. * Platforms that have variable clock rates, should implement
  232. * the method ppc_md.get_proc_freq() that reports the clock
  233. * rate of a given cpu. The rest can use ppc_proc_freq to
  234. * report the clock rate that is same across all cpus.
  235. */
  236. if (ppc_md.get_proc_freq)
  237. proc_freq = ppc_md.get_proc_freq(cpu_id);
  238. else
  239. proc_freq = ppc_proc_freq;
  240. if (proc_freq)
  241. seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
  242. proc_freq / 1000000, proc_freq % 1000000);
  243. if (ppc_md.show_percpuinfo != NULL)
  244. ppc_md.show_percpuinfo(m, cpu_id);
  245. /* If we are a Freescale core do a simple check so
  246. * we dont have to keep adding cases in the future */
  247. if (PVR_VER(pvr) & 0x8000) {
  248. switch (PVR_VER(pvr)) {
  249. case 0x8000: /* 7441/7450/7451, Voyager */
  250. case 0x8001: /* 7445/7455, Apollo 6 */
  251. case 0x8002: /* 7447/7457, Apollo 7 */
  252. case 0x8003: /* 7447A, Apollo 7 PM */
  253. case 0x8004: /* 7448, Apollo 8 */
  254. case 0x800c: /* 7410, Nitro */
  255. maj = ((pvr >> 8) & 0xF);
  256. min = PVR_MIN(pvr);
  257. break;
  258. default: /* e500/book-e */
  259. maj = PVR_MAJ(pvr);
  260. min = PVR_MIN(pvr);
  261. break;
  262. }
  263. } else {
  264. switch (PVR_VER(pvr)) {
  265. case 0x0020: /* 403 family */
  266. maj = PVR_MAJ(pvr) + 1;
  267. min = PVR_MIN(pvr);
  268. break;
  269. case 0x1008: /* 740P/750P ?? */
  270. maj = ((pvr >> 8) & 0xFF) - 1;
  271. min = pvr & 0xFF;
  272. break;
  273. default:
  274. maj = (pvr >> 8) & 0xFF;
  275. min = pvr & 0xFF;
  276. break;
  277. }
  278. }
  279. seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
  280. maj, min, PVR_VER(pvr), PVR_REV(pvr));
  281. #ifdef CONFIG_PPC32
  282. seq_printf(m, "bogomips\t: %lu.%02lu\n",
  283. loops_per_jiffy / (500000/HZ),
  284. (loops_per_jiffy / (5000/HZ)) % 100);
  285. #endif
  286. #ifdef CONFIG_SMP
  287. seq_printf(m, "\n");
  288. #endif
  289. /* If this is the last cpu, print the summary */
  290. if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
  291. show_cpuinfo_summary(m);
  292. return 0;
  293. }
  294. static void *c_start(struct seq_file *m, loff_t *pos)
  295. {
  296. if (*pos == 0) /* just in case, cpu 0 is not the first */
  297. *pos = cpumask_first(cpu_online_mask);
  298. else
  299. *pos = cpumask_next(*pos - 1, cpu_online_mask);
  300. if ((*pos) < nr_cpu_ids)
  301. return (void *)(unsigned long)(*pos + 1);
  302. return NULL;
  303. }
  304. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  305. {
  306. (*pos)++;
  307. return c_start(m, pos);
  308. }
  309. static void c_stop(struct seq_file *m, void *v)
  310. {
  311. }
  312. const struct seq_operations cpuinfo_op = {
  313. .start =c_start,
  314. .next = c_next,
  315. .stop = c_stop,
  316. .show = show_cpuinfo,
  317. };
  318. void __init check_for_initrd(void)
  319. {
  320. #ifdef CONFIG_BLK_DEV_INITRD
  321. DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
  322. initrd_start, initrd_end);
  323. /* If we were passed an initrd, set the ROOT_DEV properly if the values
  324. * look sensible. If not, clear initrd reference.
  325. */
  326. if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
  327. initrd_end > initrd_start)
  328. ROOT_DEV = Root_RAM0;
  329. else
  330. initrd_start = initrd_end = 0;
  331. if (initrd_start)
  332. pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
  333. DBG(" <- check_for_initrd()\n");
  334. #endif /* CONFIG_BLK_DEV_INITRD */
  335. }
  336. #ifdef CONFIG_SMP
  337. int threads_per_core, threads_per_subcore, threads_shift;
  338. cpumask_t threads_core_mask;
  339. EXPORT_SYMBOL_GPL(threads_per_core);
  340. EXPORT_SYMBOL_GPL(threads_per_subcore);
  341. EXPORT_SYMBOL_GPL(threads_shift);
  342. EXPORT_SYMBOL_GPL(threads_core_mask);
  343. static void __init cpu_init_thread_core_maps(int tpc)
  344. {
  345. int i;
  346. threads_per_core = tpc;
  347. threads_per_subcore = tpc;
  348. cpumask_clear(&threads_core_mask);
  349. /* This implementation only supports power of 2 number of threads
  350. * for simplicity and performance
  351. */
  352. threads_shift = ilog2(tpc);
  353. BUG_ON(tpc != (1 << threads_shift));
  354. for (i = 0; i < tpc; i++)
  355. cpumask_set_cpu(i, &threads_core_mask);
  356. printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
  357. tpc, tpc > 1 ? "s" : "");
  358. printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
  359. }
  360. /**
  361. * setup_cpu_maps - initialize the following cpu maps:
  362. * cpu_possible_mask
  363. * cpu_present_mask
  364. *
  365. * Having the possible map set up early allows us to restrict allocations
  366. * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
  367. *
  368. * We do not initialize the online map here; cpus set their own bits in
  369. * cpu_online_mask as they come up.
  370. *
  371. * This function is valid only for Open Firmware systems. finish_device_tree
  372. * must be called before using this.
  373. *
  374. * While we're here, we may as well set the "physical" cpu ids in the paca.
  375. *
  376. * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
  377. */
  378. void __init smp_setup_cpu_maps(void)
  379. {
  380. struct device_node *dn = NULL;
  381. int cpu = 0;
  382. int nthreads = 1;
  383. DBG("smp_setup_cpu_maps()\n");
  384. while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < nr_cpu_ids) {
  385. const __be32 *intserv;
  386. __be32 cpu_be;
  387. int j, len;
  388. DBG(" * %s...\n", dn->full_name);
  389. intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
  390. &len);
  391. if (intserv) {
  392. DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
  393. nthreads);
  394. } else {
  395. DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
  396. intserv = of_get_property(dn, "reg", &len);
  397. if (!intserv) {
  398. cpu_be = cpu_to_be32(cpu);
  399. intserv = &cpu_be; /* assume logical == phys */
  400. len = 4;
  401. }
  402. }
  403. nthreads = len / sizeof(int);
  404. for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
  405. bool avail;
  406. DBG(" thread %d -> cpu %d (hard id %d)\n",
  407. j, cpu, be32_to_cpu(intserv[j]));
  408. avail = of_device_is_available(dn);
  409. if (!avail)
  410. avail = !of_property_match_string(dn,
  411. "enable-method", "spin-table");
  412. set_cpu_present(cpu, avail);
  413. set_hard_smp_processor_id(cpu, be32_to_cpu(intserv[j]));
  414. set_cpu_possible(cpu, true);
  415. cpu++;
  416. }
  417. }
  418. /* If no SMT supported, nthreads is forced to 1 */
  419. if (!cpu_has_feature(CPU_FTR_SMT)) {
  420. DBG(" SMT disabled ! nthreads forced to 1\n");
  421. nthreads = 1;
  422. }
  423. #ifdef CONFIG_PPC64
  424. /*
  425. * On pSeries LPAR, we need to know how many cpus
  426. * could possibly be added to this partition.
  427. */
  428. if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) &&
  429. (dn = of_find_node_by_path("/rtas"))) {
  430. int num_addr_cell, num_size_cell, maxcpus;
  431. const __be32 *ireg;
  432. num_addr_cell = of_n_addr_cells(dn);
  433. num_size_cell = of_n_size_cells(dn);
  434. ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
  435. if (!ireg)
  436. goto out;
  437. maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
  438. /* Double maxcpus for processors which have SMT capability */
  439. if (cpu_has_feature(CPU_FTR_SMT))
  440. maxcpus *= nthreads;
  441. if (maxcpus > nr_cpu_ids) {
  442. printk(KERN_WARNING
  443. "Partition configured for %d cpus, "
  444. "operating system maximum is %d.\n",
  445. maxcpus, nr_cpu_ids);
  446. maxcpus = nr_cpu_ids;
  447. } else
  448. printk(KERN_INFO "Partition configured for %d cpus.\n",
  449. maxcpus);
  450. for (cpu = 0; cpu < maxcpus; cpu++)
  451. set_cpu_possible(cpu, true);
  452. out:
  453. of_node_put(dn);
  454. }
  455. vdso_data->processorCount = num_present_cpus();
  456. #endif /* CONFIG_PPC64 */
  457. /* Initialize CPU <=> thread mapping/
  458. *
  459. * WARNING: We assume that the number of threads is the same for
  460. * every CPU in the system. If that is not the case, then some code
  461. * here will have to be reworked
  462. */
  463. cpu_init_thread_core_maps(nthreads);
  464. /* Now that possible cpus are set, set nr_cpu_ids for later use */
  465. setup_nr_cpu_ids();
  466. free_unused_pacas();
  467. }
  468. #endif /* CONFIG_SMP */
  469. #ifdef CONFIG_PCSPKR_PLATFORM
  470. static __init int add_pcspkr(void)
  471. {
  472. struct device_node *np;
  473. struct platform_device *pd;
  474. int ret;
  475. np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
  476. of_node_put(np);
  477. if (!np)
  478. return -ENODEV;
  479. pd = platform_device_alloc("pcspkr", -1);
  480. if (!pd)
  481. return -ENOMEM;
  482. ret = platform_device_add(pd);
  483. if (ret)
  484. platform_device_put(pd);
  485. return ret;
  486. }
  487. device_initcall(add_pcspkr);
  488. #endif /* CONFIG_PCSPKR_PLATFORM */
  489. void probe_machine(void)
  490. {
  491. extern struct machdep_calls __machine_desc_start;
  492. extern struct machdep_calls __machine_desc_end;
  493. /*
  494. * Iterate all ppc_md structures until we find the proper
  495. * one for the current machine type
  496. */
  497. DBG("Probing machine type ...\n");
  498. for (machine_id = &__machine_desc_start;
  499. machine_id < &__machine_desc_end;
  500. machine_id++) {
  501. DBG(" %s ...", machine_id->name);
  502. memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
  503. if (ppc_md.probe()) {
  504. DBG(" match !\n");
  505. break;
  506. }
  507. DBG("\n");
  508. }
  509. /* What can we do if we didn't find ? */
  510. if (machine_id >= &__machine_desc_end) {
  511. DBG("No suitable machine found !\n");
  512. for (;;);
  513. }
  514. printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
  515. }
  516. /* Match a class of boards, not a specific device configuration. */
  517. int check_legacy_ioport(unsigned long base_port)
  518. {
  519. struct device_node *parent, *np = NULL;
  520. int ret = -ENODEV;
  521. switch(base_port) {
  522. case I8042_DATA_REG:
  523. if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
  524. np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
  525. if (np) {
  526. parent = of_get_parent(np);
  527. of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
  528. if (!of_i8042_kbd_irq)
  529. of_i8042_kbd_irq = 1;
  530. of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
  531. if (!of_i8042_aux_irq)
  532. of_i8042_aux_irq = 12;
  533. of_node_put(np);
  534. np = parent;
  535. break;
  536. }
  537. np = of_find_node_by_type(NULL, "8042");
  538. /* Pegasos has no device_type on its 8042 node, look for the
  539. * name instead */
  540. if (!np)
  541. np = of_find_node_by_name(NULL, "8042");
  542. if (np) {
  543. of_i8042_kbd_irq = 1;
  544. of_i8042_aux_irq = 12;
  545. }
  546. break;
  547. case FDC_BASE: /* FDC1 */
  548. np = of_find_node_by_type(NULL, "fdc");
  549. break;
  550. default:
  551. /* ipmi is supposed to fail here */
  552. break;
  553. }
  554. if (!np)
  555. return ret;
  556. parent = of_get_parent(np);
  557. if (parent) {
  558. if (strcmp(parent->type, "isa") == 0)
  559. ret = 0;
  560. of_node_put(parent);
  561. }
  562. of_node_put(np);
  563. return ret;
  564. }
  565. EXPORT_SYMBOL(check_legacy_ioport);
  566. static int ppc_panic_event(struct notifier_block *this,
  567. unsigned long event, void *ptr)
  568. {
  569. /*
  570. * If firmware-assisted dump has been registered then trigger
  571. * firmware-assisted dump and let firmware handle everything else.
  572. */
  573. crash_fadump(NULL, ptr);
  574. ppc_md.panic(ptr); /* May not return */
  575. return NOTIFY_DONE;
  576. }
  577. static struct notifier_block ppc_panic_block = {
  578. .notifier_call = ppc_panic_event,
  579. .priority = INT_MIN /* may not return; must be done last */
  580. };
  581. void __init setup_panic(void)
  582. {
  583. atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
  584. }
  585. #ifdef CONFIG_CHECK_CACHE_COHERENCY
  586. /*
  587. * For platforms that have configurable cache-coherency. This function
  588. * checks that the cache coherency setting of the kernel matches the setting
  589. * left by the firmware, as indicated in the device tree. Since a mismatch
  590. * will eventually result in DMA failures, we print * and error and call
  591. * BUG() in that case.
  592. */
  593. #ifdef CONFIG_NOT_COHERENT_CACHE
  594. #define KERNEL_COHERENCY 0
  595. #else
  596. #define KERNEL_COHERENCY 1
  597. #endif
  598. static int __init check_cache_coherency(void)
  599. {
  600. struct device_node *np;
  601. const void *prop;
  602. int devtree_coherency;
  603. np = of_find_node_by_path("/");
  604. prop = of_get_property(np, "coherency-off", NULL);
  605. of_node_put(np);
  606. devtree_coherency = prop ? 0 : 1;
  607. if (devtree_coherency != KERNEL_COHERENCY) {
  608. printk(KERN_ERR
  609. "kernel coherency:%s != device tree_coherency:%s\n",
  610. KERNEL_COHERENCY ? "on" : "off",
  611. devtree_coherency ? "on" : "off");
  612. BUG();
  613. }
  614. return 0;
  615. }
  616. late_initcall(check_cache_coherency);
  617. #endif /* CONFIG_CHECK_CACHE_COHERENCY */
  618. #ifdef CONFIG_DEBUG_FS
  619. struct dentry *powerpc_debugfs_root;
  620. EXPORT_SYMBOL(powerpc_debugfs_root);
  621. static int powerpc_debugfs_init(void)
  622. {
  623. powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
  624. return powerpc_debugfs_root == NULL;
  625. }
  626. arch_initcall(powerpc_debugfs_init);
  627. #endif
  628. void ppc_printk_progress(char *s, unsigned short hex)
  629. {
  630. pr_info("%s\n", s);
  631. }
  632. void arch_setup_pdev_archdata(struct platform_device *pdev)
  633. {
  634. pdev->archdata.dma_mask = DMA_BIT_MASK(32);
  635. pdev->dev.dma_mask = &pdev->archdata.dma_mask;
  636. set_dma_ops(&pdev->dev, &dma_direct_ops);
  637. }