time.c 8.0 KB

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  1. /*
  2. * Support for periodic interrupts (100 per second) and for getting
  3. * the current time from the RTC on Power Macintoshes.
  4. *
  5. * We use the decrementer register for our periodic interrupts.
  6. *
  7. * Paul Mackerras August 1996.
  8. * Copyright (C) 1996 Paul Mackerras.
  9. * Copyright (C) 2003-2005 Benjamin Herrenschmidt.
  10. *
  11. */
  12. #include <linux/errno.h>
  13. #include <linux/sched.h>
  14. #include <linux/kernel.h>
  15. #include <linux/param.h>
  16. #include <linux/string.h>
  17. #include <linux/mm.h>
  18. #include <linux/init.h>
  19. #include <linux/time.h>
  20. #include <linux/adb.h>
  21. #include <linux/cuda.h>
  22. #include <linux/pmu.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/hardirq.h>
  25. #include <linux/rtc.h>
  26. #include <asm/sections.h>
  27. #include <asm/prom.h>
  28. #include <asm/io.h>
  29. #include <asm/pgtable.h>
  30. #include <asm/machdep.h>
  31. #include <asm/time.h>
  32. #include <asm/nvram.h>
  33. #include <asm/smu.h>
  34. #undef DEBUG
  35. #ifdef DEBUG
  36. #define DBG(x...) printk(x)
  37. #else
  38. #define DBG(x...)
  39. #endif
  40. /* Apparently the RTC stores seconds since 1 Jan 1904 */
  41. #define RTC_OFFSET 2082844800
  42. /*
  43. * Calibrate the decrementer frequency with the VIA timer 1.
  44. */
  45. #define VIA_TIMER_FREQ_6 4700000 /* time 1 frequency * 6 */
  46. /* VIA registers */
  47. #define RS 0x200 /* skip between registers */
  48. #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
  49. #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
  50. #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
  51. #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
  52. #define ACR (11*RS) /* Auxiliary control register */
  53. #define IFR (13*RS) /* Interrupt flag register */
  54. /* Bits in ACR */
  55. #define T1MODE 0xc0 /* Timer 1 mode */
  56. #define T1MODE_CONT 0x40 /* continuous interrupts */
  57. /* Bits in IFR and IER */
  58. #define T1_INT 0x40 /* Timer 1 interrupt */
  59. long __init pmac_time_init(void)
  60. {
  61. s32 delta = 0;
  62. #ifdef CONFIG_NVRAM
  63. int dst;
  64. delta = ((s32)pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0x9)) << 16;
  65. delta |= ((s32)pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0xa)) << 8;
  66. delta |= pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0xb);
  67. if (delta & 0x00800000UL)
  68. delta |= 0xFF000000UL;
  69. dst = ((pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0x8) & 0x80) != 0);
  70. printk("GMT Delta read from XPRAM: %d minutes, DST: %s\n", delta/60,
  71. dst ? "on" : "off");
  72. #endif
  73. return delta;
  74. }
  75. #if defined(CONFIG_ADB_CUDA) || defined(CONFIG_ADB_PMU)
  76. static void to_rtc_time(unsigned long now, struct rtc_time *tm)
  77. {
  78. to_tm(now, tm);
  79. tm->tm_year -= 1900;
  80. tm->tm_mon -= 1;
  81. }
  82. #endif
  83. #if defined(CONFIG_ADB_CUDA) || defined(CONFIG_ADB_PMU) || \
  84. defined(CONFIG_PMAC_SMU)
  85. static unsigned long from_rtc_time(struct rtc_time *tm)
  86. {
  87. return mktime(tm->tm_year+1900, tm->tm_mon+1, tm->tm_mday,
  88. tm->tm_hour, tm->tm_min, tm->tm_sec);
  89. }
  90. #endif
  91. #ifdef CONFIG_ADB_CUDA
  92. static unsigned long cuda_get_time(void)
  93. {
  94. struct adb_request req;
  95. unsigned int now;
  96. if (cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_GET_TIME) < 0)
  97. return 0;
  98. while (!req.complete)
  99. cuda_poll();
  100. if (req.reply_len != 7)
  101. printk(KERN_ERR "cuda_get_time: got %d byte reply\n",
  102. req.reply_len);
  103. now = (req.reply[3] << 24) + (req.reply[4] << 16)
  104. + (req.reply[5] << 8) + req.reply[6];
  105. return ((unsigned long)now) - RTC_OFFSET;
  106. }
  107. #define cuda_get_rtc_time(tm) to_rtc_time(cuda_get_time(), (tm))
  108. static int cuda_set_rtc_time(struct rtc_time *tm)
  109. {
  110. unsigned int nowtime;
  111. struct adb_request req;
  112. nowtime = from_rtc_time(tm) + RTC_OFFSET;
  113. if (cuda_request(&req, NULL, 6, CUDA_PACKET, CUDA_SET_TIME,
  114. nowtime >> 24, nowtime >> 16, nowtime >> 8,
  115. nowtime) < 0)
  116. return -ENXIO;
  117. while (!req.complete)
  118. cuda_poll();
  119. if ((req.reply_len != 3) && (req.reply_len != 7))
  120. printk(KERN_ERR "cuda_set_rtc_time: got %d byte reply\n",
  121. req.reply_len);
  122. return 0;
  123. }
  124. #else
  125. #define cuda_get_time() 0
  126. #define cuda_get_rtc_time(tm)
  127. #define cuda_set_rtc_time(tm) 0
  128. #endif
  129. #ifdef CONFIG_ADB_PMU
  130. static unsigned long pmu_get_time(void)
  131. {
  132. struct adb_request req;
  133. unsigned int now;
  134. if (pmu_request(&req, NULL, 1, PMU_READ_RTC) < 0)
  135. return 0;
  136. pmu_wait_complete(&req);
  137. if (req.reply_len != 4)
  138. printk(KERN_ERR "pmu_get_time: got %d byte reply from PMU\n",
  139. req.reply_len);
  140. now = (req.reply[0] << 24) + (req.reply[1] << 16)
  141. + (req.reply[2] << 8) + req.reply[3];
  142. return ((unsigned long)now) - RTC_OFFSET;
  143. }
  144. #define pmu_get_rtc_time(tm) to_rtc_time(pmu_get_time(), (tm))
  145. static int pmu_set_rtc_time(struct rtc_time *tm)
  146. {
  147. unsigned int nowtime;
  148. struct adb_request req;
  149. nowtime = from_rtc_time(tm) + RTC_OFFSET;
  150. if (pmu_request(&req, NULL, 5, PMU_SET_RTC, nowtime >> 24,
  151. nowtime >> 16, nowtime >> 8, nowtime) < 0)
  152. return -ENXIO;
  153. pmu_wait_complete(&req);
  154. if (req.reply_len != 0)
  155. printk(KERN_ERR "pmu_set_rtc_time: %d byte reply from PMU\n",
  156. req.reply_len);
  157. return 0;
  158. }
  159. #else
  160. #define pmu_get_time() 0
  161. #define pmu_get_rtc_time(tm)
  162. #define pmu_set_rtc_time(tm) 0
  163. #endif
  164. #ifdef CONFIG_PMAC_SMU
  165. static unsigned long smu_get_time(void)
  166. {
  167. struct rtc_time tm;
  168. if (smu_get_rtc_time(&tm, 1))
  169. return 0;
  170. return from_rtc_time(&tm);
  171. }
  172. #else
  173. #define smu_get_time() 0
  174. #define smu_get_rtc_time(tm, spin)
  175. #define smu_set_rtc_time(tm, spin) 0
  176. #endif
  177. /* Can't be __init, it's called when suspending and resuming */
  178. unsigned long pmac_get_boot_time(void)
  179. {
  180. /* Get the time from the RTC, used only at boot time */
  181. switch (sys_ctrler) {
  182. case SYS_CTRLER_CUDA:
  183. return cuda_get_time();
  184. case SYS_CTRLER_PMU:
  185. return pmu_get_time();
  186. case SYS_CTRLER_SMU:
  187. return smu_get_time();
  188. default:
  189. return 0;
  190. }
  191. }
  192. void pmac_get_rtc_time(struct rtc_time *tm)
  193. {
  194. /* Get the time from the RTC, used only at boot time */
  195. switch (sys_ctrler) {
  196. case SYS_CTRLER_CUDA:
  197. cuda_get_rtc_time(tm);
  198. break;
  199. case SYS_CTRLER_PMU:
  200. pmu_get_rtc_time(tm);
  201. break;
  202. case SYS_CTRLER_SMU:
  203. smu_get_rtc_time(tm, 1);
  204. break;
  205. default:
  206. ;
  207. }
  208. }
  209. int pmac_set_rtc_time(struct rtc_time *tm)
  210. {
  211. switch (sys_ctrler) {
  212. case SYS_CTRLER_CUDA:
  213. return cuda_set_rtc_time(tm);
  214. case SYS_CTRLER_PMU:
  215. return pmu_set_rtc_time(tm);
  216. case SYS_CTRLER_SMU:
  217. return smu_set_rtc_time(tm, 1);
  218. default:
  219. return -ENODEV;
  220. }
  221. }
  222. #ifdef CONFIG_PPC32
  223. /*
  224. * Calibrate the decrementer register using VIA timer 1.
  225. * This is used both on powermacs and CHRP machines.
  226. */
  227. int __init via_calibrate_decr(void)
  228. {
  229. struct device_node *vias;
  230. volatile unsigned char __iomem *via;
  231. int count = VIA_TIMER_FREQ_6 / 100;
  232. unsigned int dstart, dend;
  233. struct resource rsrc;
  234. vias = of_find_node_by_name(NULL, "via-cuda");
  235. if (vias == NULL)
  236. vias = of_find_node_by_name(NULL, "via-pmu");
  237. if (vias == NULL)
  238. vias = of_find_node_by_name(NULL, "via");
  239. if (vias == NULL || of_address_to_resource(vias, 0, &rsrc)) {
  240. of_node_put(vias);
  241. return 0;
  242. }
  243. of_node_put(vias);
  244. via = ioremap(rsrc.start, resource_size(&rsrc));
  245. if (via == NULL) {
  246. printk(KERN_ERR "Failed to map VIA for timer calibration !\n");
  247. return 0;
  248. }
  249. /* set timer 1 for continuous interrupts */
  250. out_8(&via[ACR], (via[ACR] & ~T1MODE) | T1MODE_CONT);
  251. /* set the counter to a small value */
  252. out_8(&via[T1CH], 2);
  253. /* set the latch to `count' */
  254. out_8(&via[T1LL], count);
  255. out_8(&via[T1LH], count >> 8);
  256. /* wait until it hits 0 */
  257. while ((in_8(&via[IFR]) & T1_INT) == 0)
  258. ;
  259. dstart = get_dec();
  260. /* clear the interrupt & wait until it hits 0 again */
  261. in_8(&via[T1CL]);
  262. while ((in_8(&via[IFR]) & T1_INT) == 0)
  263. ;
  264. dend = get_dec();
  265. ppc_tb_freq = (dstart - dend) * 100 / 6;
  266. iounmap(via);
  267. return 1;
  268. }
  269. #endif
  270. /*
  271. * Query the OF and get the decr frequency.
  272. */
  273. void __init pmac_calibrate_decr(void)
  274. {
  275. generic_calibrate_decr();
  276. #ifdef CONFIG_PPC32
  277. /* We assume MacRISC2 machines have correct device-tree
  278. * calibration. That's better since the VIA itself seems
  279. * to be slightly off. --BenH
  280. */
  281. if (!of_machine_is_compatible("MacRISC2") &&
  282. !of_machine_is_compatible("MacRISC3") &&
  283. !of_machine_is_compatible("MacRISC4"))
  284. if (via_calibrate_decr())
  285. return;
  286. /* Special case: QuickSilver G4s seem to have a badly calibrated
  287. * timebase-frequency in OF, VIA is much better on these. We should
  288. * probably implement calibration based on the KL timer on these
  289. * machines anyway... -BenH
  290. */
  291. if (of_machine_is_compatible("PowerMac3,5"))
  292. if (via_calibrate_decr())
  293. return;
  294. #endif
  295. }