irq.c 1.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748
  1. /*
  2. * SDK7786 FPGA IRQ Controller Support.
  3. *
  4. * Copyright (C) 2010 Matt Fleming
  5. * Copyright (C) 2010 Paul Mundt
  6. *
  7. * This file is subject to the terms and conditions of the GNU General Public
  8. * License. See the file "COPYING" in the main directory of this archive
  9. * for more details.
  10. */
  11. #include <linux/irq.h>
  12. #include <mach/fpga.h>
  13. #include <mach/irq.h>
  14. enum {
  15. ATA_IRQ_BIT = 1,
  16. SPI_BUSY_BIT = 2,
  17. LIRQ5_BIT = 3,
  18. LIRQ6_BIT = 4,
  19. LIRQ7_BIT = 5,
  20. LIRQ8_BIT = 6,
  21. KEY_IRQ_BIT = 7,
  22. PEN_IRQ_BIT = 8,
  23. ETH_IRQ_BIT = 9,
  24. RTC_ALARM_BIT = 10,
  25. CRYSTAL_FAIL_BIT = 12,
  26. ETH_PME_BIT = 14,
  27. };
  28. void __init sdk7786_init_irq(void)
  29. {
  30. unsigned int tmp;
  31. /* Enable priority encoding for all IRLs */
  32. fpga_write_reg(fpga_read_reg(INTMSR) | 0x0303, INTMSR);
  33. /* Clear FPGA interrupt status registers */
  34. fpga_write_reg(0x0000, INTASR);
  35. fpga_write_reg(0x0000, INTBSR);
  36. /* Unmask FPGA interrupts */
  37. tmp = fpga_read_reg(INTAMR);
  38. tmp &= ~(1 << ETH_IRQ_BIT);
  39. fpga_write_reg(tmp, INTAMR);
  40. plat_irq_setup_pins(IRQ_MODE_IRL7654_MASK);
  41. plat_irq_setup_pins(IRQ_MODE_IRL3210_MASK);
  42. }