clock-sh7619.c 1.8 KB

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  1. /*
  2. * arch/sh/kernel/cpu/sh2/clock-sh7619.c
  3. *
  4. * SH7619 support for the clock framework
  5. *
  6. * Copyright (C) 2006 Yoshinori Sato
  7. *
  8. * Based on clock-sh4.c
  9. * Copyright (C) 2005 Paul Mundt
  10. *
  11. * This file is subject to the terms and conditions of the GNU General Public
  12. * License. See the file "COPYING" in the main directory of this archive
  13. * for more details.
  14. */
  15. #include <linux/init.h>
  16. #include <linux/kernel.h>
  17. #include <linux/io.h>
  18. #include <asm/clock.h>
  19. #include <asm/freq.h>
  20. #include <asm/processor.h>
  21. static const int pll1rate[] = {1,2};
  22. static const int pfc_divisors[] = {1,2,0,4};
  23. static unsigned int pll2_mult;
  24. static void master_clk_init(struct clk *clk)
  25. {
  26. clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
  27. }
  28. static struct sh_clk_ops sh7619_master_clk_ops = {
  29. .init = master_clk_init,
  30. };
  31. static unsigned long module_clk_recalc(struct clk *clk)
  32. {
  33. int idx = (__raw_readw(FREQCR) & 0x0007);
  34. return clk->parent->rate / pfc_divisors[idx];
  35. }
  36. static struct sh_clk_ops sh7619_module_clk_ops = {
  37. .recalc = module_clk_recalc,
  38. };
  39. static unsigned long bus_clk_recalc(struct clk *clk)
  40. {
  41. return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
  42. }
  43. static struct sh_clk_ops sh7619_bus_clk_ops = {
  44. .recalc = bus_clk_recalc,
  45. };
  46. static struct sh_clk_ops sh7619_cpu_clk_ops = {
  47. .recalc = followparent_recalc,
  48. };
  49. static struct sh_clk_ops *sh7619_clk_ops[] = {
  50. &sh7619_master_clk_ops,
  51. &sh7619_module_clk_ops,
  52. &sh7619_bus_clk_ops,
  53. &sh7619_cpu_clk_ops,
  54. };
  55. void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
  56. {
  57. if (test_mode_pin(MODE_PIN2 | MODE_PIN0) ||
  58. test_mode_pin(MODE_PIN2 | MODE_PIN1))
  59. pll2_mult = 2;
  60. else if (test_mode_pin(MODE_PIN0) || test_mode_pin(MODE_PIN1))
  61. pll2_mult = 4;
  62. BUG_ON(!pll2_mult);
  63. if (idx < ARRAY_SIZE(sh7619_clk_ops))
  64. *ops = sh7619_clk_ops[idx];
  65. }