setup-sh7705.c 4.9 KB

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  1. /*
  2. * SH7705 Setup
  3. *
  4. * Copyright (C) 2006 - 2009 Paul Mundt
  5. * Copyright (C) 2007 Nobuhiro Iwamatsu
  6. *
  7. * This file is subject to the terms and conditions of the GNU General Public
  8. * License. See the file "COPYING" in the main directory of this archive
  9. * for more details.
  10. */
  11. #include <linux/platform_device.h>
  12. #include <linux/init.h>
  13. #include <linux/irq.h>
  14. #include <linux/serial.h>
  15. #include <linux/serial_sci.h>
  16. #include <linux/sh_timer.h>
  17. #include <linux/sh_intc.h>
  18. #include <asm/rtc.h>
  19. #include <cpu/serial.h>
  20. enum {
  21. UNUSED = 0,
  22. /* interrupt sources */
  23. IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
  24. PINT07, PINT815,
  25. DMAC, SCIF0, SCIF2, ADC_ADI, USB,
  26. TPU0, TPU1, TPU2, TPU3,
  27. TMU0, TMU1, TMU2,
  28. RTC, WDT, REF_RCMI,
  29. };
  30. static struct intc_vect vectors[] __initdata = {
  31. /* IRQ0->5 are handled in setup-sh3.c */
  32. INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
  33. INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820),
  34. INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860),
  35. INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
  36. INTC_VECT(SCIF0, 0x8e0),
  37. INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920),
  38. INTC_VECT(SCIF2, 0x960),
  39. INTC_VECT(ADC_ADI, 0x980),
  40. INTC_VECT(USB, 0xa20), INTC_VECT(USB, 0xa40),
  41. INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20),
  42. INTC_VECT(TPU2, 0xc80), INTC_VECT(TPU3, 0xca0),
  43. INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
  44. INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
  45. INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
  46. INTC_VECT(RTC, 0x4c0),
  47. INTC_VECT(WDT, 0x560),
  48. INTC_VECT(REF_RCMI, 0x580),
  49. };
  50. static struct intc_prio_reg prio_registers[] __initdata = {
  51. { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
  52. { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } },
  53. { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
  54. { 0xa4000018, 0, 16, 4, /* IPRD */ { PINT07, PINT815, IRQ5, IRQ4 } },
  55. { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC, SCIF0, SCIF2, ADC_ADI } },
  56. { 0xa4080000, 0, 16, 4, /* IPRF */ { 0, 0, USB } },
  57. { 0xa4080002, 0, 16, 4, /* IPRG */ { TPU0, TPU1 } },
  58. { 0xa4080004, 0, 16, 4, /* IPRH */ { TPU2, TPU3 } },
  59. };
  60. static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL,
  61. NULL, prio_registers, NULL);
  62. static struct plat_sci_port scif0_platform_data = {
  63. .flags = UPF_BOOT_AUTOCONF,
  64. .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE |
  65. SCSCR_RE | SCSCR_CKE1 | SCSCR_CKE0,
  66. .type = PORT_SCIF,
  67. .ops = &sh770x_sci_port_ops,
  68. .regtype = SCIx_SH7705_SCIF_REGTYPE,
  69. };
  70. static struct resource scif0_resources[] = {
  71. DEFINE_RES_MEM(0xa4410000, 0x100),
  72. DEFINE_RES_IRQ(evt2irq(0x900)),
  73. };
  74. static struct platform_device scif0_device = {
  75. .name = "sh-sci",
  76. .id = 0,
  77. .resource = scif0_resources,
  78. .num_resources = ARRAY_SIZE(scif0_resources),
  79. .dev = {
  80. .platform_data = &scif0_platform_data,
  81. },
  82. };
  83. static struct plat_sci_port scif1_platform_data = {
  84. .flags = UPF_BOOT_AUTOCONF,
  85. .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE | SCSCR_RE,
  86. .type = PORT_SCIF,
  87. .ops = &sh770x_sci_port_ops,
  88. .regtype = SCIx_SH7705_SCIF_REGTYPE,
  89. };
  90. static struct resource scif1_resources[] = {
  91. DEFINE_RES_MEM(0xa4400000, 0x100),
  92. DEFINE_RES_IRQ(evt2irq(0x880)),
  93. };
  94. static struct platform_device scif1_device = {
  95. .name = "sh-sci",
  96. .id = 1,
  97. .resource = scif1_resources,
  98. .num_resources = ARRAY_SIZE(scif1_resources),
  99. .dev = {
  100. .platform_data = &scif1_platform_data,
  101. },
  102. };
  103. static struct resource rtc_resources[] = {
  104. [0] = {
  105. .start = 0xfffffec0,
  106. .end = 0xfffffec0 + 0x1e,
  107. .flags = IORESOURCE_IO,
  108. },
  109. [1] = {
  110. .start = evt2irq(0x480),
  111. .flags = IORESOURCE_IRQ,
  112. },
  113. };
  114. static struct sh_rtc_platform_info rtc_info = {
  115. .capabilities = RTC_CAP_4_DIGIT_YEAR,
  116. };
  117. static struct platform_device rtc_device = {
  118. .name = "sh-rtc",
  119. .id = -1,
  120. .num_resources = ARRAY_SIZE(rtc_resources),
  121. .resource = rtc_resources,
  122. .dev = {
  123. .platform_data = &rtc_info,
  124. },
  125. };
  126. static struct sh_timer_config tmu0_platform_data = {
  127. .channels_mask = 7,
  128. };
  129. static struct resource tmu0_resources[] = {
  130. DEFINE_RES_MEM(0xfffffe90, 0x2c),
  131. DEFINE_RES_IRQ(evt2irq(0x400)),
  132. DEFINE_RES_IRQ(evt2irq(0x420)),
  133. DEFINE_RES_IRQ(evt2irq(0x440)),
  134. };
  135. static struct platform_device tmu0_device = {
  136. .name = "sh-tmu-sh3",
  137. .id = 0,
  138. .dev = {
  139. .platform_data = &tmu0_platform_data,
  140. },
  141. .resource = tmu0_resources,
  142. .num_resources = ARRAY_SIZE(tmu0_resources),
  143. };
  144. static struct platform_device *sh7705_devices[] __initdata = {
  145. &scif0_device,
  146. &scif1_device,
  147. &tmu0_device,
  148. &rtc_device,
  149. };
  150. static int __init sh7705_devices_setup(void)
  151. {
  152. return platform_add_devices(sh7705_devices,
  153. ARRAY_SIZE(sh7705_devices));
  154. }
  155. arch_initcall(sh7705_devices_setup);
  156. static struct platform_device *sh7705_early_devices[] __initdata = {
  157. &scif0_device,
  158. &scif1_device,
  159. &tmu0_device,
  160. };
  161. void __init plat_early_device_setup(void)
  162. {
  163. early_platform_add_devices(sh7705_early_devices,
  164. ARRAY_SIZE(sh7705_early_devices));
  165. }
  166. void __init plat_irq_setup(void)
  167. {
  168. register_intc_controller(&intc_desc);
  169. plat_irq_setup_sh3();
  170. }