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arch
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sparc
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include
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asm
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head_64.h

head_64.h 2.1 KB
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  1. #ifndef _SPARC64_HEAD_H
    2. 

  2. #define _SPARC64_HEAD_H
    3. 

  3. 

  4. #include <asm/pstate.h>
    5. 

  5. 

  6. 	/* wrpr	%g0, val, %gl */
    7. 

  7. #define SET_GL(val)	\
    8. 

  8. 	.word	0xa1902000 | val
    9. 

  9. 

  10. 	/* rdpr %gl, %gN */
    11. 

  11. #define GET_GL_GLOBAL(N)	\
    12. 

  12. 	.word	0x81540000 | (N << 25)
    13. 

  13. 

  14. #define KERNBASE	0x400000
    15. 

  15. 

  16. #define	PTREGS_OFF	(STACK_BIAS + STACKFRAME_SZ)
    17. 

  17. 

  18. #define	RTRAP_PSTATE		(PSTATE_TSO|PSTATE_PEF|PSTATE_PRIV|PSTATE_IE)
    19. 

  19. #define	RTRAP_PSTATE_IRQOFF	(PSTATE_TSO|PSTATE_PEF|PSTATE_PRIV)
    20. 

  20. #define RTRAP_PSTATE_AG_IRQOFF	(PSTATE_TSO|PSTATE_PEF|PSTATE_PRIV|PSTATE_AG)
    21. 

  21. 

  22. #define __CHEETAH_ID	0x003e0014
    23. 

  23. #define __JALAPENO_ID	0x003e0016
    24. 

  24. #define __SERRANO_ID	0x003e0022
    25. 

  25. 

  26. #define CHEETAH_MANUF		0x003e
    27. 

  27. #define CHEETAH_IMPL		0x0014 /* Ultra-III   */
    28. 

  28. #define CHEETAH_PLUS_IMPL	0x0015 /* Ultra-III+  */
    29. 

  29. #define JALAPENO_IMPL		0x0016 /* Ultra-IIIi  */
    30. 

  30. #define JAGUAR_IMPL		0x0018 /* Ultra-IV    */
    31. 

  31. #define PANTHER_IMPL		0x0019 /* Ultra-IV+   */
    32. 

  32. #define SERRANO_IMPL		0x0022 /* Ultra-IIIi+ */
    33. 

  33. 

  34. #define BRANCH_IF_SUN4V(tmp1,label)		\
    35. 

  35. 	sethi	%hi(is_sun4v), %tmp1;		\
    36. 

  36. 	lduw	[%tmp1 + %lo(is_sun4v)], %tmp1; \
    37. 

  37. 	brnz,pn	%tmp1, label;			\
    38. 

  38. 	 nop
    39. 

  39. 

  40. #define BRANCH_IF_CHEETAH_BASE(tmp1,tmp2,label)	\
    41. 

  41. 	rdpr	%ver, %tmp1;			\
    42. 

  42. 	sethi	%hi(__CHEETAH_ID), %tmp2;	\
    43. 

  43. 	srlx	%tmp1, 32, %tmp1;		\
    44. 

  44. 	or	%tmp2, %lo(__CHEETAH_ID), %tmp2;\
    45. 

  45. 	cmp	%tmp1, %tmp2;			\
    46. 

  46. 	be,pn	%icc, label;			\
    47. 

  47. 	 nop;
    48. 

  48. 

  49. #define BRANCH_IF_JALAPENO(tmp1,tmp2,label)	\
    50. 

  50. 	rdpr	%ver, %tmp1;			\
    51. 

  51. 	sethi	%hi(__JALAPENO_ID), %tmp2;	\
    52. 

  52. 	srlx	%tmp1, 32, %tmp1;		\
    53. 

  53. 	or	%tmp2, %lo(__JALAPENO_ID), %tmp2;\
    54. 

  54. 	cmp	%tmp1, %tmp2;			\
    55. 

  55. 	be,pn	%icc, label;			\
    56. 

  56. 	 nop;
    57. 

  57. 

  58. #define BRANCH_IF_CHEETAH_PLUS_OR_FOLLOWON(tmp1,tmp2,label)	\
    59. 

  59. 	rdpr	%ver, %tmp1;			\
    60. 

  60. 	srlx	%tmp1, (32 + 16), %tmp2;	\
    61. 

  61. 	cmp	%tmp2, CHEETAH_MANUF;		\
    62. 

  62. 	bne,pt	%xcc, 99f;			\
    63. 

  63. 	 sllx	%tmp1, 16, %tmp1;		\
    64. 

  64. 	srlx	%tmp1, (32 + 16), %tmp2;	\
    65. 

  65. 	cmp	%tmp2, CHEETAH_PLUS_IMPL;	\
    66. 

  66. 	bgeu,pt	%xcc, label;			\
    67. 

  67. 99:	 nop;
    68. 

  68. 

  69. #define BRANCH_IF_ANY_CHEETAH(tmp1,tmp2,label)	\
    70. 

  70. 	rdpr	%ver, %tmp1;			\
    71. 

  71. 	srlx	%tmp1, (32 + 16), %tmp2;	\
    72. 

  72. 	cmp	%tmp2, CHEETAH_MANUF;		\
    73. 

  73. 	bne,pt	%xcc, 99f;			\
    74. 

  74. 	 sllx	%tmp1, 16, %tmp1;		\
    75. 

  75. 	srlx	%tmp1, (32 + 16), %tmp2;	\
    76. 

  76. 	cmp	%tmp2, CHEETAH_IMPL;		\
    77. 

  77. 	bgeu,pt	%xcc, label;			\
    78. 

  78. 99:	 nop;
    79. 

  79. 

  80. #endif /* !(_SPARC64_HEAD_H) */
    81.