mmu_context_64.h 4.0 KB

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  1. #ifndef __SPARC64_MMU_CONTEXT_H
  2. #define __SPARC64_MMU_CONTEXT_H
  3. /* Derived heavily from Linus's Alpha/AXP ASN code... */
  4. #ifndef __ASSEMBLY__
  5. #include <linux/spinlock.h>
  6. #include <asm/spitfire.h>
  7. #include <asm-generic/mm_hooks.h>
  8. static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
  9. {
  10. }
  11. extern spinlock_t ctx_alloc_lock;
  12. extern unsigned long tlb_context_cache;
  13. extern unsigned long mmu_context_bmap[];
  14. DECLARE_PER_CPU(struct mm_struct *, per_cpu_secondary_mm);
  15. void get_new_mmu_context(struct mm_struct *mm);
  16. int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
  17. void destroy_context(struct mm_struct *mm);
  18. void __tsb_context_switch(unsigned long pgd_pa,
  19. struct tsb_config *tsb_base,
  20. struct tsb_config *tsb_huge,
  21. unsigned long tsb_descr_pa,
  22. unsigned long secondary_ctx);
  23. static inline void tsb_context_switch_ctx(struct mm_struct *mm,
  24. unsigned long ctx)
  25. {
  26. __tsb_context_switch(__pa(mm->pgd),
  27. &mm->context.tsb_block[0],
  28. #if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
  29. (mm->context.tsb_block[1].tsb ?
  30. &mm->context.tsb_block[1] :
  31. NULL)
  32. #else
  33. NULL
  34. #endif
  35. , __pa(&mm->context.tsb_descr[0]),
  36. ctx);
  37. }
  38. #define tsb_context_switch(X) tsb_context_switch_ctx(X, 0)
  39. void tsb_grow(struct mm_struct *mm,
  40. unsigned long tsb_index,
  41. unsigned long mm_rss);
  42. #ifdef CONFIG_SMP
  43. void smp_tsb_sync(struct mm_struct *mm);
  44. #else
  45. #define smp_tsb_sync(__mm) do { } while (0)
  46. #endif
  47. /* Set MMU context in the actual hardware. */
  48. #define load_secondary_context(__mm) \
  49. __asm__ __volatile__( \
  50. "\n661: stxa %0, [%1] %2\n" \
  51. " .section .sun4v_1insn_patch, \"ax\"\n" \
  52. " .word 661b\n" \
  53. " stxa %0, [%1] %3\n" \
  54. " .previous\n" \
  55. " flush %%g6\n" \
  56. : /* No outputs */ \
  57. : "r" (CTX_HWBITS((__mm)->context)), \
  58. "r" (SECONDARY_CONTEXT), "i" (ASI_DMMU), "i" (ASI_MMU))
  59. void __flush_tlb_mm(unsigned long, unsigned long);
  60. /* Switch the current MM context. */
  61. static inline void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, struct task_struct *tsk)
  62. {
  63. unsigned long ctx_valid, flags;
  64. int cpu = smp_processor_id();
  65. per_cpu(per_cpu_secondary_mm, cpu) = mm;
  66. if (unlikely(mm == &init_mm))
  67. return;
  68. spin_lock_irqsave(&mm->context.lock, flags);
  69. ctx_valid = CTX_VALID(mm->context);
  70. if (!ctx_valid)
  71. get_new_mmu_context(mm);
  72. /* We have to be extremely careful here or else we will miss
  73. * a TSB grow if we switch back and forth between a kernel
  74. * thread and an address space which has it's TSB size increased
  75. * on another processor.
  76. *
  77. * It is possible to play some games in order to optimize the
  78. * switch, but the safest thing to do is to unconditionally
  79. * perform the secondary context load and the TSB context switch.
  80. *
  81. * For reference the bad case is, for address space "A":
  82. *
  83. * CPU 0 CPU 1
  84. * run address space A
  85. * set cpu0's bits in cpu_vm_mask
  86. * switch to kernel thread, borrow
  87. * address space A via entry_lazy_tlb
  88. * run address space A
  89. * set cpu1's bit in cpu_vm_mask
  90. * flush_tlb_pending()
  91. * reset cpu_vm_mask to just cpu1
  92. * TSB grow
  93. * run address space A
  94. * context was valid, so skip
  95. * TSB context switch
  96. *
  97. * At that point cpu0 continues to use a stale TSB, the one from
  98. * before the TSB grow performed on cpu1. cpu1 did not cross-call
  99. * cpu0 to update it's TSB because at that point the cpu_vm_mask
  100. * only had cpu1 set in it.
  101. */
  102. tsb_context_switch_ctx(mm, CTX_HWBITS(mm->context));
  103. /* Any time a processor runs a context on an address space
  104. * for the first time, we must flush that context out of the
  105. * local TLB.
  106. */
  107. if (!ctx_valid || !cpumask_test_cpu(cpu, mm_cpumask(mm))) {
  108. cpumask_set_cpu(cpu, mm_cpumask(mm));
  109. __flush_tlb_mm(CTX_HWBITS(mm->context),
  110. SECONDARY_CONTEXT);
  111. }
  112. spin_unlock_irqrestore(&mm->context.lock, flags);
  113. }
  114. #define deactivate_mm(tsk,mm) do { } while (0)
  115. #define activate_mm(active_mm, mm) switch_mm(active_mm, mm, NULL)
  116. #endif /* !(__ASSEMBLY__) */
  117. #endif /* !(__SPARC64_MMU_CONTEXT_H) */