winmacro.h 4.6 KB

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  1. /*
  2. * winmacro.h: Window loading-unloading macros.
  3. *
  4. * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
  5. */
  6. #ifndef _SPARC_WINMACRO_H
  7. #define _SPARC_WINMACRO_H
  8. #include <asm/ptrace.h>
  9. /* Store the register window onto the 8-byte aligned area starting
  10. * at %reg. It might be %sp, it might not, we don't care.
  11. */
  12. #define STORE_WINDOW(reg) \
  13. std %l0, [%reg + RW_L0]; \
  14. std %l2, [%reg + RW_L2]; \
  15. std %l4, [%reg + RW_L4]; \
  16. std %l6, [%reg + RW_L6]; \
  17. std %i0, [%reg + RW_I0]; \
  18. std %i2, [%reg + RW_I2]; \
  19. std %i4, [%reg + RW_I4]; \
  20. std %i6, [%reg + RW_I6];
  21. /* Load a register window from the area beginning at %reg. */
  22. #define LOAD_WINDOW(reg) \
  23. ldd [%reg + RW_L0], %l0; \
  24. ldd [%reg + RW_L2], %l2; \
  25. ldd [%reg + RW_L4], %l4; \
  26. ldd [%reg + RW_L6], %l6; \
  27. ldd [%reg + RW_I0], %i0; \
  28. ldd [%reg + RW_I2], %i2; \
  29. ldd [%reg + RW_I4], %i4; \
  30. ldd [%reg + RW_I6], %i6;
  31. /* Loading and storing struct pt_reg trap frames. */
  32. #define LOAD_PT_INS(base_reg) \
  33. ldd [%base_reg + STACKFRAME_SZ + PT_I0], %i0; \
  34. ldd [%base_reg + STACKFRAME_SZ + PT_I2], %i2; \
  35. ldd [%base_reg + STACKFRAME_SZ + PT_I4], %i4; \
  36. ldd [%base_reg + STACKFRAME_SZ + PT_I6], %i6;
  37. #define LOAD_PT_GLOBALS(base_reg) \
  38. ld [%base_reg + STACKFRAME_SZ + PT_G1], %g1; \
  39. ldd [%base_reg + STACKFRAME_SZ + PT_G2], %g2; \
  40. ldd [%base_reg + STACKFRAME_SZ + PT_G4], %g4; \
  41. ldd [%base_reg + STACKFRAME_SZ + PT_G6], %g6;
  42. #define LOAD_PT_YREG(base_reg, scratch) \
  43. ld [%base_reg + STACKFRAME_SZ + PT_Y], %scratch; \
  44. wr %scratch, 0x0, %y;
  45. #define LOAD_PT_PRIV(base_reg, pt_psr, pt_pc, pt_npc) \
  46. ld [%base_reg + STACKFRAME_SZ + PT_PSR], %pt_psr; \
  47. ld [%base_reg + STACKFRAME_SZ + PT_PC], %pt_pc; \
  48. ld [%base_reg + STACKFRAME_SZ + PT_NPC], %pt_npc;
  49. #define LOAD_PT_ALL(base_reg, pt_psr, pt_pc, pt_npc, scratch) \
  50. LOAD_PT_YREG(base_reg, scratch) \
  51. LOAD_PT_INS(base_reg) \
  52. LOAD_PT_GLOBALS(base_reg) \
  53. LOAD_PT_PRIV(base_reg, pt_psr, pt_pc, pt_npc)
  54. #define STORE_PT_INS(base_reg) \
  55. std %i0, [%base_reg + STACKFRAME_SZ + PT_I0]; \
  56. std %i2, [%base_reg + STACKFRAME_SZ + PT_I2]; \
  57. std %i4, [%base_reg + STACKFRAME_SZ + PT_I4]; \
  58. std %i6, [%base_reg + STACKFRAME_SZ + PT_I6];
  59. #define STORE_PT_GLOBALS(base_reg) \
  60. st %g1, [%base_reg + STACKFRAME_SZ + PT_G1]; \
  61. std %g2, [%base_reg + STACKFRAME_SZ + PT_G2]; \
  62. std %g4, [%base_reg + STACKFRAME_SZ + PT_G4]; \
  63. std %g6, [%base_reg + STACKFRAME_SZ + PT_G6];
  64. #define STORE_PT_YREG(base_reg, scratch) \
  65. rd %y, %scratch; \
  66. st %scratch, [%base_reg + STACKFRAME_SZ + PT_Y];
  67. #define STORE_PT_PRIV(base_reg, pt_psr, pt_pc, pt_npc) \
  68. st %pt_psr, [%base_reg + STACKFRAME_SZ + PT_PSR]; \
  69. st %pt_pc, [%base_reg + STACKFRAME_SZ + PT_PC]; \
  70. st %pt_npc, [%base_reg + STACKFRAME_SZ + PT_NPC];
  71. #define STORE_PT_ALL(base_reg, reg_psr, reg_pc, reg_npc, g_scratch) \
  72. STORE_PT_PRIV(base_reg, reg_psr, reg_pc, reg_npc) \
  73. STORE_PT_GLOBALS(base_reg) \
  74. STORE_PT_YREG(base_reg, g_scratch) \
  75. STORE_PT_INS(base_reg)
  76. #define SAVE_BOLIXED_USER_STACK(cur_reg, scratch) \
  77. ld [%cur_reg + TI_W_SAVED], %scratch; \
  78. sll %scratch, 2, %scratch; \
  79. add %scratch, %cur_reg, %scratch; \
  80. st %sp, [%scratch + TI_RWIN_SPTRS]; \
  81. sub %scratch, %cur_reg, %scratch; \
  82. sll %scratch, 4, %scratch; \
  83. add %scratch, %cur_reg, %scratch; \
  84. STORE_WINDOW(scratch + TI_REG_WINDOW); \
  85. sub %scratch, %cur_reg, %scratch; \
  86. srl %scratch, 6, %scratch; \
  87. add %scratch, 1, %scratch; \
  88. st %scratch, [%cur_reg + TI_W_SAVED];
  89. #ifdef CONFIG_SMP
  90. #define LOAD_CURRENT(dest_reg, idreg) \
  91. 661: rd %tbr, %idreg; \
  92. srl %idreg, 10, %idreg; \
  93. and %idreg, 0xc, %idreg; \
  94. .section .cpuid_patch, "ax"; \
  95. /* Instruction location. */ \
  96. .word 661b; \
  97. /* SUN4D implementation. */ \
  98. lda [%g0] ASI_M_VIKING_TMP1, %idreg; \
  99. sll %idreg, 2, %idreg; \
  100. nop; \
  101. /* LEON implementation. */ \
  102. rd %asr17, %idreg; \
  103. srl %idreg, 0x1c, %idreg; \
  104. sll %idreg, 0x02, %idreg; \
  105. .previous; \
  106. sethi %hi(current_set), %dest_reg; \
  107. or %dest_reg, %lo(current_set), %dest_reg;\
  108. ld [%idreg + %dest_reg], %dest_reg;
  109. #else
  110. #define LOAD_CURRENT(dest_reg, idreg) \
  111. sethi %hi(current_set), %idreg; \
  112. ld [%idreg + %lo(current_set)], %dest_reg;
  113. #endif
  114. #endif /* !(_SPARC_WINMACRO_H) */