leon_pci.c 2.9 KB

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  1. /*
  2. * leon_pci.c: LEON Host PCI support
  3. *
  4. * Copyright (C) 2011 Aeroflex Gaisler AB, Daniel Hellstrom
  5. *
  6. * Code is partially derived from pcic.c
  7. */
  8. #include <linux/of_device.h>
  9. #include <linux/kernel.h>
  10. #include <linux/pci.h>
  11. #include <linux/export.h>
  12. #include <asm/leon.h>
  13. #include <asm/leon_pci.h>
  14. /* The LEON architecture does not rely on a BIOS or bootloader to setup
  15. * PCI for us. The Linux generic routines are used to setup resources,
  16. * reset values of configuration-space register settings are preserved.
  17. *
  18. * PCI Memory and Prefetchable Memory is direct-mapped. However I/O Space is
  19. * accessed through a Window which is translated to low 64KB in PCI space, the
  20. * first 4KB is not used so 60KB is available.
  21. */
  22. void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info)
  23. {
  24. LIST_HEAD(resources);
  25. struct pci_bus *root_bus;
  26. pci_add_resource_offset(&resources, &info->io_space,
  27. info->io_space.start - 0x1000);
  28. pci_add_resource(&resources, &info->mem_space);
  29. info->busn.flags = IORESOURCE_BUS;
  30. pci_add_resource(&resources, &info->busn);
  31. root_bus = pci_scan_root_bus(&ofdev->dev, 0, info->ops, info,
  32. &resources);
  33. if (!root_bus) {
  34. pci_free_resource_list(&resources);
  35. return;
  36. }
  37. /* Setup IRQs of all devices using custom routines */
  38. pci_fixup_irqs(pci_common_swizzle, info->map_irq);
  39. /* Assign devices with resources */
  40. pci_assign_unassigned_resources();
  41. pci_bus_add_devices(root_bus);
  42. }
  43. void pcibios_fixup_bus(struct pci_bus *pbus)
  44. {
  45. struct pci_dev *dev;
  46. int i, has_io, has_mem;
  47. u16 cmd;
  48. list_for_each_entry(dev, &pbus->devices, bus_list) {
  49. /*
  50. * We can not rely on that the bootloader has enabled I/O
  51. * or memory access to PCI devices. Instead we enable it here
  52. * if the device has BARs of respective type.
  53. */
  54. has_io = has_mem = 0;
  55. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  56. unsigned long f = dev->resource[i].flags;
  57. if (f & IORESOURCE_IO)
  58. has_io = 1;
  59. else if (f & IORESOURCE_MEM)
  60. has_mem = 1;
  61. }
  62. /* ROM BARs are mapped into 32-bit memory space */
  63. if (dev->resource[PCI_ROM_RESOURCE].end != 0) {
  64. dev->resource[PCI_ROM_RESOURCE].flags |=
  65. IORESOURCE_ROM_ENABLE;
  66. has_mem = 1;
  67. }
  68. pci_bus_read_config_word(pbus, dev->devfn, PCI_COMMAND, &cmd);
  69. if (has_io && !(cmd & PCI_COMMAND_IO)) {
  70. #ifdef CONFIG_PCI_DEBUG
  71. printk(KERN_INFO "LEONPCI: Enabling I/O for dev %s\n",
  72. pci_name(dev));
  73. #endif
  74. cmd |= PCI_COMMAND_IO;
  75. pci_bus_write_config_word(pbus, dev->devfn, PCI_COMMAND,
  76. cmd);
  77. }
  78. if (has_mem && !(cmd & PCI_COMMAND_MEMORY)) {
  79. #ifdef CONFIG_PCI_DEBUG
  80. printk(KERN_INFO "LEONPCI: Enabling MEMORY for dev"
  81. "%s\n", pci_name(dev));
  82. #endif
  83. cmd |= PCI_COMMAND_MEMORY;
  84. pci_bus_write_config_word(pbus, dev->devfn, PCI_COMMAND,
  85. cmd);
  86. }
  87. }
  88. }
  89. resource_size_t pcibios_align_resource(void *data, const struct resource *res,
  90. resource_size_t size, resource_size_t align)
  91. {
  92. return res->start;
  93. }