drv_mpipe_intf.h 23 KB

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  1. /*
  2. * Copyright 2011 Tilera Corporation. All Rights Reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * as published by the Free Software Foundation, version 2.
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  11. * NON INFRINGEMENT. See the GNU General Public License for
  12. * more details.
  13. */
  14. /**
  15. * Interface definitions for the mpipe driver.
  16. */
  17. #ifndef _SYS_HV_DRV_MPIPE_INTF_H
  18. #define _SYS_HV_DRV_MPIPE_INTF_H
  19. #include <arch/mpipe.h>
  20. #include <arch/mpipe_constants.h>
  21. /** Number of mPIPE instances supported */
  22. #define HV_MPIPE_INSTANCE_MAX (2)
  23. /** Number of buffer stacks (32). */
  24. #define HV_MPIPE_NUM_BUFFER_STACKS \
  25. (MPIPE_MMIO_INIT_DAT_GX36_1__BUFFER_STACK_MASK_WIDTH)
  26. /** Number of NotifRings (256). */
  27. #define HV_MPIPE_NUM_NOTIF_RINGS (MPIPE_NUM_NOTIF_RINGS)
  28. /** Number of NotifGroups (32). */
  29. #define HV_MPIPE_NUM_NOTIF_GROUPS (MPIPE_NUM_NOTIF_GROUPS)
  30. /** Number of buckets (4160). */
  31. #define HV_MPIPE_NUM_BUCKETS (MPIPE_NUM_BUCKETS)
  32. /** Number of "lo" buckets (4096). */
  33. #define HV_MPIPE_NUM_LO_BUCKETS 4096
  34. /** Number of "hi" buckets (64). */
  35. #define HV_MPIPE_NUM_HI_BUCKETS \
  36. (HV_MPIPE_NUM_BUCKETS - HV_MPIPE_NUM_LO_BUCKETS)
  37. /** Number of edma rings (24). */
  38. #define HV_MPIPE_NUM_EDMA_RINGS \
  39. (MPIPE_MMIO_INIT_DAT_GX36_1__EDMA_POST_MASK_WIDTH)
  40. /** A flag bit indicating a fixed resource allocation. */
  41. #define HV_MPIPE_ALLOC_FIXED 0x01
  42. /** Offset for the config register MMIO region. */
  43. #define HV_MPIPE_CONFIG_MMIO_OFFSET \
  44. (MPIPE_MMIO_ADDR__REGION_VAL_CFG << MPIPE_MMIO_ADDR__REGION_SHIFT)
  45. /** Size of the config register MMIO region. */
  46. #define HV_MPIPE_CONFIG_MMIO_SIZE (64 * 1024)
  47. /** Offset for the config register MMIO region. */
  48. #define HV_MPIPE_FAST_MMIO_OFFSET \
  49. (MPIPE_MMIO_ADDR__REGION_VAL_IDMA << MPIPE_MMIO_ADDR__REGION_SHIFT)
  50. /** Size of the fast register MMIO region (IDMA, EDMA, buffer stack). */
  51. #define HV_MPIPE_FAST_MMIO_SIZE \
  52. ((MPIPE_MMIO_ADDR__REGION_VAL_BSM + 1 - MPIPE_MMIO_ADDR__REGION_VAL_IDMA) \
  53. << MPIPE_MMIO_ADDR__REGION_SHIFT)
  54. /*
  55. * Each type of resource allocation comes in quantized chunks, where
  56. * XXX_BITS is the number of chunks, and XXX_RES_PER_BIT is the number
  57. * of resources in each chunk.
  58. */
  59. /** Number of buffer stack chunks available (32). */
  60. #define HV_MPIPE_ALLOC_BUFFER_STACKS_BITS \
  61. MPIPE_MMIO_INIT_DAT_GX36_1__BUFFER_STACK_MASK_WIDTH
  62. /** Granularity of buffer stack allocation (1). */
  63. #define HV_MPIPE_ALLOC_BUFFER_STACKS_RES_PER_BIT \
  64. (HV_MPIPE_NUM_BUFFER_STACKS / HV_MPIPE_ALLOC_BUFFER_STACKS_BITS)
  65. /** Number of NotifRing chunks available (32). */
  66. #define HV_MPIPE_ALLOC_NOTIF_RINGS_BITS \
  67. MPIPE_MMIO_INIT_DAT_GX36_0__NOTIF_RING_MASK_WIDTH
  68. /** Granularity of NotifRing allocation (8). */
  69. #define HV_MPIPE_ALLOC_NOTIF_RINGS_RES_PER_BIT \
  70. (HV_MPIPE_NUM_NOTIF_RINGS / HV_MPIPE_ALLOC_NOTIF_RINGS_BITS)
  71. /** Number of NotifGroup chunks available (32). */
  72. #define HV_MPIPE_ALLOC_NOTIF_GROUPS_BITS \
  73. HV_MPIPE_NUM_NOTIF_GROUPS
  74. /** Granularity of NotifGroup allocation (1). */
  75. #define HV_MPIPE_ALLOC_NOTIF_GROUPS_RES_PER_BIT \
  76. (HV_MPIPE_NUM_NOTIF_GROUPS / HV_MPIPE_ALLOC_NOTIF_GROUPS_BITS)
  77. /** Number of lo bucket chunks available (16). */
  78. #define HV_MPIPE_ALLOC_LO_BUCKETS_BITS \
  79. MPIPE_MMIO_INIT_DAT_GX36_0__BUCKET_RELEASE_MASK_LO_WIDTH
  80. /** Granularity of lo bucket allocation (256). */
  81. #define HV_MPIPE_ALLOC_LO_BUCKETS_RES_PER_BIT \
  82. (HV_MPIPE_NUM_LO_BUCKETS / HV_MPIPE_ALLOC_LO_BUCKETS_BITS)
  83. /** Number of hi bucket chunks available (16). */
  84. #define HV_MPIPE_ALLOC_HI_BUCKETS_BITS \
  85. MPIPE_MMIO_INIT_DAT_GX36_0__BUCKET_RELEASE_MASK_HI_WIDTH
  86. /** Granularity of hi bucket allocation (4). */
  87. #define HV_MPIPE_ALLOC_HI_BUCKETS_RES_PER_BIT \
  88. (HV_MPIPE_NUM_HI_BUCKETS / HV_MPIPE_ALLOC_HI_BUCKETS_BITS)
  89. /** Number of eDMA ring chunks available (24). */
  90. #define HV_MPIPE_ALLOC_EDMA_RINGS_BITS \
  91. MPIPE_MMIO_INIT_DAT_GX36_1__EDMA_POST_MASK_WIDTH
  92. /** Granularity of eDMA ring allocation (1). */
  93. #define HV_MPIPE_ALLOC_EDMA_RINGS_RES_PER_BIT \
  94. (HV_MPIPE_NUM_EDMA_RINGS / HV_MPIPE_ALLOC_EDMA_RINGS_BITS)
  95. /** Bit vector encoding which NotifRings are in a NotifGroup. */
  96. typedef struct
  97. {
  98. /** The actual bits. */
  99. uint64_t ring_mask[4];
  100. } gxio_mpipe_notif_group_bits_t;
  101. /** Another name for MPIPE_LBL_INIT_DAT_BSTS_TBL_t. */
  102. typedef MPIPE_LBL_INIT_DAT_BSTS_TBL_t gxio_mpipe_bucket_info_t;
  103. /** Eight buffer stack ids. */
  104. typedef struct
  105. {
  106. /** The stacks. */
  107. uint8_t stacks[8];
  108. } gxio_mpipe_rules_stacks_t;
  109. /** A destination mac address. */
  110. typedef struct
  111. {
  112. /** The octets. */
  113. uint8_t octets[6];
  114. } gxio_mpipe_rules_dmac_t;
  115. /** A vlan. */
  116. typedef uint16_t gxio_mpipe_rules_vlan_t;
  117. /** Maximum number of characters in a link name. */
  118. #define GXIO_MPIPE_LINK_NAME_LEN 32
  119. /** Structure holding a link name. Only needed, and only typedef'ed,
  120. * because the IORPC stub generator only handles types which are single
  121. * words coming before the parameter name. */
  122. typedef struct
  123. {
  124. /** The name itself. */
  125. char name[GXIO_MPIPE_LINK_NAME_LEN];
  126. }
  127. _gxio_mpipe_link_name_t;
  128. /** Maximum number of characters in a symbol name. */
  129. #define GXIO_MPIPE_SYMBOL_NAME_LEN 128
  130. /** Structure holding a symbol name. Only needed, and only typedef'ed,
  131. * because the IORPC stub generator only handles types which are single
  132. * words coming before the parameter name. */
  133. typedef struct
  134. {
  135. /** The name itself. */
  136. char name[GXIO_MPIPE_SYMBOL_NAME_LEN];
  137. }
  138. _gxio_mpipe_symbol_name_t;
  139. /** Structure holding a MAC address. */
  140. typedef struct
  141. {
  142. /** The address. */
  143. uint8_t mac[6];
  144. }
  145. _gxio_mpipe_link_mac_t;
  146. /** Request shared data permission -- that is, the ability to send and
  147. * receive packets -- on the specified link. Other processes may also
  148. * request shared data permission on the same link.
  149. *
  150. * No more than one of ::GXIO_MPIPE_LINK_DATA, ::GXIO_MPIPE_LINK_NO_DATA,
  151. * or ::GXIO_MPIPE_LINK_EXCL_DATA may be specifed in a gxio_mpipe_link_open()
  152. * call. If none are specified, ::GXIO_MPIPE_LINK_DATA is assumed.
  153. */
  154. #define GXIO_MPIPE_LINK_DATA 0x00000001UL
  155. /** Do not request data permission on the specified link.
  156. *
  157. * No more than one of ::GXIO_MPIPE_LINK_DATA, ::GXIO_MPIPE_LINK_NO_DATA,
  158. * or ::GXIO_MPIPE_LINK_EXCL_DATA may be specifed in a gxio_mpipe_link_open()
  159. * call. If none are specified, ::GXIO_MPIPE_LINK_DATA is assumed.
  160. */
  161. #define GXIO_MPIPE_LINK_NO_DATA 0x00000002UL
  162. /** Request exclusive data permission -- that is, the ability to send and
  163. * receive packets -- on the specified link. No other processes may
  164. * request data permission on this link, and if any process already has
  165. * data permission on it, this open will fail.
  166. *
  167. * No more than one of ::GXIO_MPIPE_LINK_DATA, ::GXIO_MPIPE_LINK_NO_DATA,
  168. * or ::GXIO_MPIPE_LINK_EXCL_DATA may be specifed in a gxio_mpipe_link_open()
  169. * call. If none are specified, ::GXIO_MPIPE_LINK_DATA is assumed.
  170. */
  171. #define GXIO_MPIPE_LINK_EXCL_DATA 0x00000004UL
  172. /** Request shared stats permission -- that is, the ability to read and write
  173. * registers which contain link statistics, and to get link attributes --
  174. * on the specified link. Other processes may also request shared stats
  175. * permission on the same link.
  176. *
  177. * No more than one of ::GXIO_MPIPE_LINK_STATS, ::GXIO_MPIPE_LINK_NO_STATS,
  178. * or ::GXIO_MPIPE_LINK_EXCL_STATS may be specifed in a gxio_mpipe_link_open()
  179. * call. If none are specified, ::GXIO_MPIPE_LINK_STATS is assumed.
  180. */
  181. #define GXIO_MPIPE_LINK_STATS 0x00000008UL
  182. /** Do not request stats permission on the specified link.
  183. *
  184. * No more than one of ::GXIO_MPIPE_LINK_STATS, ::GXIO_MPIPE_LINK_NO_STATS,
  185. * or ::GXIO_MPIPE_LINK_EXCL_STATS may be specifed in a gxio_mpipe_link_open()
  186. * call. If none are specified, ::GXIO_MPIPE_LINK_STATS is assumed.
  187. */
  188. #define GXIO_MPIPE_LINK_NO_STATS 0x00000010UL
  189. /** Request exclusive stats permission -- that is, the ability to read and
  190. * write registers which contain link statistics, and to get link
  191. * attributes -- on the specified link. No other processes may request
  192. * stats permission on this link, and if any process already
  193. * has stats permission on it, this open will fail.
  194. *
  195. * Requesting exclusive stats permission is normally a very bad idea, since
  196. * it prevents programs like mpipe-stat from providing information on this
  197. * link. Applications should only do this if they use MAC statistics
  198. * registers, and cannot tolerate any of the clear-on-read registers being
  199. * reset by other statistics programs.
  200. *
  201. * No more than one of ::GXIO_MPIPE_LINK_STATS, ::GXIO_MPIPE_LINK_NO_STATS,
  202. * or ::GXIO_MPIPE_LINK_EXCL_STATS may be specifed in a gxio_mpipe_link_open()
  203. * call. If none are specified, ::GXIO_MPIPE_LINK_STATS is assumed.
  204. */
  205. #define GXIO_MPIPE_LINK_EXCL_STATS 0x00000020UL
  206. /** Request shared control permission -- that is, the ability to modify link
  207. * attributes, and read and write MAC and MDIO registers -- on the
  208. * specified link. Other processes may also request shared control
  209. * permission on the same link.
  210. *
  211. * No more than one of ::GXIO_MPIPE_LINK_CTL, ::GXIO_MPIPE_LINK_NO_CTL,
  212. * or ::GXIO_MPIPE_LINK_EXCL_CTL may be specifed in a gxio_mpipe_link_open()
  213. * call. If none are specified, ::GXIO_MPIPE_LINK_CTL is assumed.
  214. */
  215. #define GXIO_MPIPE_LINK_CTL 0x00000040UL
  216. /** Do not request control permission on the specified link.
  217. *
  218. * No more than one of ::GXIO_MPIPE_LINK_CTL, ::GXIO_MPIPE_LINK_NO_CTL,
  219. * or ::GXIO_MPIPE_LINK_EXCL_CTL may be specifed in a gxio_mpipe_link_open()
  220. * call. If none are specified, ::GXIO_MPIPE_LINK_CTL is assumed.
  221. */
  222. #define GXIO_MPIPE_LINK_NO_CTL 0x00000080UL
  223. /** Request exclusive control permission -- that is, the ability to modify
  224. * link attributes, and read and write MAC and MDIO registers -- on the
  225. * specified link. No other processes may request control permission on
  226. * this link, and if any process already has control permission on it,
  227. * this open will fail.
  228. *
  229. * Requesting exclusive control permission is not always a good idea, since
  230. * it prevents programs like mpipe-link from configuring the link.
  231. *
  232. * No more than one of ::GXIO_MPIPE_LINK_CTL, ::GXIO_MPIPE_LINK_NO_CTL,
  233. * or ::GXIO_MPIPE_LINK_EXCL_CTL may be specifed in a gxio_mpipe_link_open()
  234. * call. If none are specified, ::GXIO_MPIPE_LINK_CTL is assumed.
  235. */
  236. #define GXIO_MPIPE_LINK_EXCL_CTL 0x00000100UL
  237. /** Set the desired state of the link to up, allowing any speeds which are
  238. * supported by the link hardware, as part of this open operation; do not
  239. * change the desired state of the link when it is closed or the process
  240. * exits. No more than one of ::GXIO_MPIPE_LINK_AUTO_UP,
  241. * ::GXIO_MPIPE_LINK_AUTO_UPDOWN, ::GXIO_MPIPE_LINK_AUTO_DOWN, or
  242. * ::GXIO_MPIPE_LINK_AUTO_NONE may be specifed in a gxio_mpipe_link_open()
  243. * call. If none are specified, ::GXIO_MPIPE_LINK_AUTO_UPDOWN is assumed.
  244. */
  245. #define GXIO_MPIPE_LINK_AUTO_UP 0x00000200UL
  246. /** Set the desired state of the link to up, allowing any speeds which are
  247. * supported by the link hardware, as part of this open operation; when the
  248. * link is closed or this process exits, if no other process has the link
  249. * open, set the desired state of the link to down. No more than one of
  250. * ::GXIO_MPIPE_LINK_AUTO_UP, ::GXIO_MPIPE_LINK_AUTO_UPDOWN,
  251. * ::GXIO_MPIPE_LINK_AUTO_DOWN, or ::GXIO_MPIPE_LINK_AUTO_NONE may be
  252. * specifed in a gxio_mpipe_link_open() call. If none are specified,
  253. * ::GXIO_MPIPE_LINK_AUTO_UPDOWN is assumed.
  254. */
  255. #define GXIO_MPIPE_LINK_AUTO_UPDOWN 0x00000400UL
  256. /** Do not change the desired state of the link as part of the open
  257. * operation; when the link is closed or this process exits, if no other
  258. * process has the link open, set the desired state of the link to down.
  259. * No more than one of ::GXIO_MPIPE_LINK_AUTO_UP,
  260. * ::GXIO_MPIPE_LINK_AUTO_UPDOWN, ::GXIO_MPIPE_LINK_AUTO_DOWN, or
  261. * ::GXIO_MPIPE_LINK_AUTO_NONE may be specifed in a gxio_mpipe_link_open()
  262. * call. If none are specified, ::GXIO_MPIPE_LINK_AUTO_UPDOWN is assumed.
  263. */
  264. #define GXIO_MPIPE_LINK_AUTO_DOWN 0x00000800UL
  265. /** Do not change the desired state of the link as part of the open
  266. * operation; do not change the desired state of the link when it is
  267. * closed or the process exits. No more than one of
  268. * ::GXIO_MPIPE_LINK_AUTO_UP, ::GXIO_MPIPE_LINK_AUTO_UPDOWN,
  269. * ::GXIO_MPIPE_LINK_AUTO_DOWN, or ::GXIO_MPIPE_LINK_AUTO_NONE may be
  270. * specifed in a gxio_mpipe_link_open() call. If none are specified,
  271. * ::GXIO_MPIPE_LINK_AUTO_UPDOWN is assumed.
  272. */
  273. #define GXIO_MPIPE_LINK_AUTO_NONE 0x00001000UL
  274. /** Request that this open call not complete until the network link is up.
  275. * The process will wait as long as necessary for this to happen;
  276. * applications which wish to abandon waiting for the link after a
  277. * specific time period should not specify this flag when opening a link,
  278. * but should instead call gxio_mpipe_link_wait() afterward. The link
  279. * must be opened with stats permission. Note that this flag by itself
  280. * does not change the desired link state; if other open flags or previous
  281. * link state changes have not requested a desired state of up, the open
  282. * call will never complete. This flag is not available to kernel
  283. * clients.
  284. */
  285. #define GXIO_MPIPE_LINK_WAIT 0x00002000UL
  286. /*
  287. * Note: link attributes must fit in 24 bits, since we use the top 8 bits
  288. * of the IORPC offset word for the channel number.
  289. */
  290. /** Determine whether jumbo frames may be received. If this attribute's
  291. * value value is nonzero, the MAC will accept frames of up to 10240 bytes.
  292. * If the value is zero, the MAC will only accept frames of up to 1544
  293. * bytes. The default value is zero. */
  294. #define GXIO_MPIPE_LINK_RECEIVE_JUMBO 0x010000
  295. /** Determine whether to send pause frames on this link if the mPIPE packet
  296. * FIFO is nearly full. If the value is zero, pause frames are not sent.
  297. * If the value is nonzero, it is the delay value which will be sent in any
  298. * pause frames which are output, in units of 512 bit times.
  299. *
  300. * Bear in mind that in almost all circumstances, the mPIPE packet FIFO
  301. * will never fill up, since mPIPE will empty it as fast as or faster than
  302. * the incoming data rate, by either delivering or dropping packets. The
  303. * only situation in which this is not true is if the memory and cache
  304. * subsystem is extremely heavily loaded, and mPIPE cannot perform DMA of
  305. * packet data to memory in a timely fashion. In particular, pause frames
  306. * will <em>not</em> be sent if packets cannot be delivered because
  307. * NotifRings are full, buckets are full, or buffers are not available in
  308. * a buffer stack. */
  309. #define GXIO_MPIPE_LINK_SEND_PAUSE 0x020000
  310. /** Determine whether to suspend output on the receipt of pause frames.
  311. * If the value is nonzero, mPIPE shim will suspend output on the link's
  312. * channel when a pause frame is received. If the value is zero, pause
  313. * frames will be ignored. The default value is zero. */
  314. #define GXIO_MPIPE_LINK_RECEIVE_PAUSE 0x030000
  315. /** Interface MAC address. The value is a 6-byte MAC address, in the least
  316. * significant 48 bits of the value; in other words, an address which would
  317. * be printed as '12:34:56:78:90:AB' in IEEE 802 canonical format would
  318. * be returned as 0x12345678ab.
  319. *
  320. * Depending upon the overall system design, a MAC address may or may not
  321. * be available for each interface. Note that the interface's MAC address
  322. * does not limit the packets received on its channel, although the
  323. * classifier's rules could be configured to do that. Similarly, the MAC
  324. * address is not used when transmitting packets, although applications
  325. * could certainly decide to use the assigned address as a source MAC
  326. * address when doing so. This attribute may only be retrieved with
  327. * gxio_mpipe_link_get_attr(); it may not be modified.
  328. */
  329. #define GXIO_MPIPE_LINK_MAC 0x040000
  330. /** Determine whether to discard egress packets on link down. If this value
  331. * is nonzero, packets sent on this link while the link is down will be
  332. * discarded. If this value is zero, no packets will be sent on this link
  333. * while it is down. The default value is one. */
  334. #define GXIO_MPIPE_LINK_DISCARD_IF_DOWN 0x050000
  335. /** Possible link state. The value is a combination of link state flags,
  336. * ORed together, that indicate link modes which are actually supported by
  337. * the hardware. This attribute may only be retrieved with
  338. * gxio_mpipe_link_get_attr(); it may not be modified. */
  339. #define GXIO_MPIPE_LINK_POSSIBLE_STATE 0x060000
  340. /** Current link state. The value is a combination of link state flags,
  341. * ORed together, that indicate the current state of the hardware. If the
  342. * link is down, the value ANDed with ::GXIO_MPIPE_LINK_SPEED will be zero;
  343. * if the link is up, the value ANDed with ::GXIO_MPIPE_LINK_SPEED will
  344. * result in exactly one of the speed values, indicating the current speed.
  345. * This attribute may only be retrieved with gxio_mpipe_link_get_attr(); it
  346. * may not be modified. */
  347. #define GXIO_MPIPE_LINK_CURRENT_STATE 0x070000
  348. /** Desired link state. The value is a conbination of flags, which specify
  349. * the desired state for the link. With gxio_mpipe_link_set_attr(), this
  350. * will, in the background, attempt to bring up the link using whichever of
  351. * the requested flags are reasonable, or take down the link if the flags
  352. * are zero. The actual link up or down operation may happen after this
  353. * call completes. If the link state changes in the future, the system
  354. * will continue to try to get back to the desired link state; for
  355. * instance, if the link is brought up successfully, and then the network
  356. * cable is disconnected, the link will go down. However, the desired
  357. * state of the link is still up, so if the cable is reconnected, the link
  358. * will be brought up again.
  359. *
  360. * With gxio_mpipe_link_set_attr(), this will indicate the desired state
  361. * for the link, as set with a previous gxio_mpipe_link_set_attr() call,
  362. * or implicitly by a gxio_mpipe_link_open() or link close operation.
  363. * This may not reflect the current state of the link; to get that, use
  364. * ::GXIO_MPIPE_LINK_CURRENT_STATE.
  365. */
  366. #define GXIO_MPIPE_LINK_DESIRED_STATE 0x080000
  367. /** Link can run, should run, or is running at 10 Mbps. */
  368. #define GXIO_MPIPE_LINK_10M 0x0000000000000001UL
  369. /** Link can run, should run, or is running at 100 Mbps. */
  370. #define GXIO_MPIPE_LINK_100M 0x0000000000000002UL
  371. /** Link can run, should run, or is running at 1 Gbps. */
  372. #define GXIO_MPIPE_LINK_1G 0x0000000000000004UL
  373. /** Link can run, should run, or is running at 10 Gbps. */
  374. #define GXIO_MPIPE_LINK_10G 0x0000000000000008UL
  375. /** Link can run, should run, or is running at 20 Gbps. */
  376. #define GXIO_MPIPE_LINK_20G 0x0000000000000010UL
  377. /** Link can run, should run, or is running at 25 Gbps. */
  378. #define GXIO_MPIPE_LINK_25G 0x0000000000000020UL
  379. /** Link can run, should run, or is running at 50 Gbps. */
  380. #define GXIO_MPIPE_LINK_50G 0x0000000000000040UL
  381. /** Link should run at the highest speed supported by the link and by
  382. * the device connected to the link. Only usable as a value for
  383. * the link's desired state; never returned as a value for the current
  384. * or possible states. */
  385. #define GXIO_MPIPE_LINK_ANYSPEED 0x0000000000000800UL
  386. /** All legal link speeds. This value is provided for use in extracting
  387. * the speed-related subset of the link state flags; it is not intended
  388. * to be set directly as a value for one of the GXIO_MPIPE_LINK_xxx_STATE
  389. * attributes. A link is up or is requested to be up if its current or
  390. * desired state, respectively, ANDED with this value, is nonzero. */
  391. #define GXIO_MPIPE_LINK_SPEED_MASK 0x0000000000000FFFUL
  392. /** Link can run, should run, or is running in MAC loopback mode. This
  393. * loops transmitted packets back to the receiver, inside the Tile
  394. * Processor. */
  395. #define GXIO_MPIPE_LINK_LOOP_MAC 0x0000000000001000UL
  396. /** Link can run, should run, or is running in PHY loopback mode. This
  397. * loops transmitted packets back to the receiver, inside the external
  398. * PHY chip. */
  399. #define GXIO_MPIPE_LINK_LOOP_PHY 0x0000000000002000UL
  400. /** Link can run, should run, or is running in external loopback mode.
  401. * This requires that an external loopback plug be installed on the
  402. * Ethernet port. Note that only some links require that this be
  403. * configured via the gxio_mpipe_link routines; other links can do
  404. * external loopack with the plug and no special configuration. */
  405. #define GXIO_MPIPE_LINK_LOOP_EXT 0x0000000000004000UL
  406. /** All legal loopback types. */
  407. #define GXIO_MPIPE_LINK_LOOP_MASK 0x000000000000F000UL
  408. /** Link can run, should run, or is running in full-duplex mode.
  409. * If neither ::GXIO_MPIPE_LINK_FDX nor ::GXIO_MPIPE_LINK_HDX are
  410. * specified in a set of desired state flags, both are assumed. */
  411. #define GXIO_MPIPE_LINK_FDX 0x0000000000010000UL
  412. /** Link can run, should run, or is running in half-duplex mode.
  413. * If neither ::GXIO_MPIPE_LINK_FDX nor ::GXIO_MPIPE_LINK_HDX are
  414. * specified in a set of desired state flags, both are assumed. */
  415. #define GXIO_MPIPE_LINK_HDX 0x0000000000020000UL
  416. /** An individual rule. */
  417. typedef struct
  418. {
  419. /** The total size. */
  420. uint16_t size;
  421. /** The priority. */
  422. int16_t priority;
  423. /** The "headroom" in each buffer. */
  424. uint8_t headroom;
  425. /** The "tailroom" in each buffer. */
  426. uint8_t tailroom;
  427. /** The "capacity" of the largest buffer. */
  428. uint16_t capacity;
  429. /** The mask for converting a flow hash into a bucket. */
  430. uint16_t bucket_mask;
  431. /** The offset for converting a flow hash into a bucket. */
  432. uint16_t bucket_first;
  433. /** The buffer stack ids. */
  434. gxio_mpipe_rules_stacks_t stacks;
  435. /** The actual channels. */
  436. uint32_t channel_bits;
  437. /** The number of dmacs. */
  438. uint16_t num_dmacs;
  439. /** The number of vlans. */
  440. uint16_t num_vlans;
  441. /** The actual dmacs and vlans. */
  442. uint8_t dmacs_and_vlans[];
  443. } gxio_mpipe_rules_rule_t;
  444. /** A list of classifier rules. */
  445. typedef struct
  446. {
  447. /** The offset to the end of the current rule. */
  448. uint16_t tail;
  449. /** The offset to the start of the current rule. */
  450. uint16_t head;
  451. /** The actual rules. */
  452. uint8_t rules[4096 - 4];
  453. } gxio_mpipe_rules_list_t;
  454. /** mPIPE statistics structure. These counters include all relevant
  455. * events occurring on all links within the mPIPE shim. */
  456. typedef struct
  457. {
  458. /** Number of ingress packets dropped for any reason. */
  459. uint64_t ingress_drops;
  460. /** Number of ingress packets dropped because a buffer stack was empty. */
  461. uint64_t ingress_drops_no_buf;
  462. /** Number of ingress packets dropped or truncated due to lack of space in
  463. * the iPkt buffer. */
  464. uint64_t ingress_drops_ipkt;
  465. /** Number of ingress packets dropped by the classifier or load balancer */
  466. uint64_t ingress_drops_cls_lb;
  467. /** Total number of ingress packets. */
  468. uint64_t ingress_packets;
  469. /** Total number of egress packets. */
  470. uint64_t egress_packets;
  471. /** Total number of ingress bytes. */
  472. uint64_t ingress_bytes;
  473. /** Total number of egress bytes. */
  474. uint64_t egress_bytes;
  475. }
  476. gxio_mpipe_stats_t;
  477. #endif /* _SYS_HV_DRV_MPIPE_INTF_H */