amdtopology.c 4.3 KB

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  1. /*
  2. * AMD NUMA support.
  3. * Discover the memory map and associated nodes.
  4. *
  5. * This version reads it directly from the AMD northbridge.
  6. *
  7. * Copyright 2002,2003 Andi Kleen, SuSE Labs.
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/init.h>
  11. #include <linux/string.h>
  12. #include <linux/module.h>
  13. #include <linux/nodemask.h>
  14. #include <linux/memblock.h>
  15. #include <linux/bootmem.h>
  16. #include <asm/io.h>
  17. #include <linux/pci_ids.h>
  18. #include <linux/acpi.h>
  19. #include <asm/types.h>
  20. #include <asm/mmzone.h>
  21. #include <asm/proto.h>
  22. #include <asm/e820.h>
  23. #include <asm/pci-direct.h>
  24. #include <asm/numa.h>
  25. #include <asm/mpspec.h>
  26. #include <asm/apic.h>
  27. #include <asm/amd_nb.h>
  28. static unsigned char __initdata nodeids[8];
  29. static __init int find_northbridge(void)
  30. {
  31. int num;
  32. for (num = 0; num < 32; num++) {
  33. u32 header;
  34. header = read_pci_config(0, num, 0, 0x00);
  35. if (header != (PCI_VENDOR_ID_AMD | (0x1100<<16)) &&
  36. header != (PCI_VENDOR_ID_AMD | (0x1200<<16)) &&
  37. header != (PCI_VENDOR_ID_AMD | (0x1300<<16)))
  38. continue;
  39. header = read_pci_config(0, num, 1, 0x00);
  40. if (header != (PCI_VENDOR_ID_AMD | (0x1101<<16)) &&
  41. header != (PCI_VENDOR_ID_AMD | (0x1201<<16)) &&
  42. header != (PCI_VENDOR_ID_AMD | (0x1301<<16)))
  43. continue;
  44. return num;
  45. }
  46. return -ENOENT;
  47. }
  48. static __init void early_get_boot_cpu_id(void)
  49. {
  50. /*
  51. * need to get the APIC ID of the BSP so can use that to
  52. * create apicid_to_node in amd_scan_nodes()
  53. */
  54. #ifdef CONFIG_X86_MPPARSE
  55. /*
  56. * get boot-time SMP configuration:
  57. */
  58. if (smp_found_config)
  59. early_get_smp_config();
  60. #endif
  61. }
  62. int __init amd_numa_init(void)
  63. {
  64. u64 start = PFN_PHYS(0);
  65. u64 end = PFN_PHYS(max_pfn);
  66. unsigned numnodes;
  67. u64 prevbase;
  68. int i, j, nb;
  69. u32 nodeid, reg;
  70. unsigned int bits, cores, apicid_base;
  71. if (!early_pci_allowed())
  72. return -EINVAL;
  73. nb = find_northbridge();
  74. if (nb < 0)
  75. return nb;
  76. pr_info("Scanning NUMA topology in Northbridge %d\n", nb);
  77. reg = read_pci_config(0, nb, 0, 0x60);
  78. numnodes = ((reg >> 4) & 0xF) + 1;
  79. if (numnodes <= 1)
  80. return -ENOENT;
  81. pr_info("Number of physical nodes %d\n", numnodes);
  82. prevbase = 0;
  83. for (i = 0; i < 8; i++) {
  84. u64 base, limit;
  85. base = read_pci_config(0, nb, 1, 0x40 + i*8);
  86. limit = read_pci_config(0, nb, 1, 0x44 + i*8);
  87. nodeids[i] = nodeid = limit & 7;
  88. if ((base & 3) == 0) {
  89. if (i < numnodes)
  90. pr_info("Skipping disabled node %d\n", i);
  91. continue;
  92. }
  93. if (nodeid >= numnodes) {
  94. pr_info("Ignoring excess node %d (%Lx:%Lx)\n", nodeid,
  95. base, limit);
  96. continue;
  97. }
  98. if (!limit) {
  99. pr_info("Skipping node entry %d (base %Lx)\n",
  100. i, base);
  101. continue;
  102. }
  103. if ((base >> 8) & 3 || (limit >> 8) & 3) {
  104. pr_err("Node %d using interleaving mode %Lx/%Lx\n",
  105. nodeid, (base >> 8) & 3, (limit >> 8) & 3);
  106. return -EINVAL;
  107. }
  108. if (node_isset(nodeid, numa_nodes_parsed)) {
  109. pr_info("Node %d already present, skipping\n",
  110. nodeid);
  111. continue;
  112. }
  113. limit >>= 16;
  114. limit++;
  115. limit <<= 24;
  116. if (limit > end)
  117. limit = end;
  118. if (limit <= base)
  119. continue;
  120. base >>= 16;
  121. base <<= 24;
  122. if (base < start)
  123. base = start;
  124. if (limit > end)
  125. limit = end;
  126. if (limit == base) {
  127. pr_err("Empty node %d\n", nodeid);
  128. continue;
  129. }
  130. if (limit < base) {
  131. pr_err("Node %d bogus settings %Lx-%Lx.\n",
  132. nodeid, base, limit);
  133. continue;
  134. }
  135. /* Could sort here, but pun for now. Should not happen anyroads. */
  136. if (prevbase > base) {
  137. pr_err("Node map not sorted %Lx,%Lx\n",
  138. prevbase, base);
  139. return -EINVAL;
  140. }
  141. pr_info("Node %d MemBase %016Lx Limit %016Lx\n",
  142. nodeid, base, limit);
  143. prevbase = base;
  144. numa_add_memblk(nodeid, base, limit);
  145. node_set(nodeid, numa_nodes_parsed);
  146. }
  147. if (!nodes_weight(numa_nodes_parsed))
  148. return -ENOENT;
  149. /*
  150. * We seem to have valid NUMA configuration. Map apicids to nodes
  151. * using the coreid bits from early_identify_cpu.
  152. */
  153. bits = boot_cpu_data.x86_coreid_bits;
  154. cores = 1 << bits;
  155. apicid_base = 0;
  156. /* get the APIC ID of the BSP early for systems with apicid lifting */
  157. early_get_boot_cpu_id();
  158. if (boot_cpu_physical_apicid > 0) {
  159. pr_info("BSP APIC ID: %02x\n", boot_cpu_physical_apicid);
  160. apicid_base = boot_cpu_physical_apicid;
  161. }
  162. for_each_node_mask(i, numa_nodes_parsed)
  163. for (j = apicid_base; j < cores + apicid_base; j++)
  164. set_apicid_to_node((i << bits) + j, i);
  165. return 0;
  166. }