async_memcpy.c 3.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110
  1. /*
  2. * copy offload engine support
  3. *
  4. * Copyright © 2006, Intel Corporation.
  5. *
  6. * Dan Williams <dan.j.williams@intel.com>
  7. *
  8. * with architecture considerations by:
  9. * Neil Brown <neilb@suse.de>
  10. * Jeff Garzik <jeff@garzik.org>
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms and conditions of the GNU General Public License,
  14. * version 2, as published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope it will be useful, but WITHOUT
  17. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  19. * more details.
  20. *
  21. * You should have received a copy of the GNU General Public License along with
  22. * this program; if not, write to the Free Software Foundation, Inc.,
  23. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  24. *
  25. */
  26. #include <linux/kernel.h>
  27. #include <linux/highmem.h>
  28. #include <linux/module.h>
  29. #include <linux/mm.h>
  30. #include <linux/dma-mapping.h>
  31. #include <linux/async_tx.h>
  32. /**
  33. * async_memcpy - attempt to copy memory with a dma engine.
  34. * @dest: destination page
  35. * @src: src page
  36. * @dest_offset: offset into 'dest' to start transaction
  37. * @src_offset: offset into 'src' to start transaction
  38. * @len: length in bytes
  39. * @submit: submission / completion modifiers
  40. *
  41. * honored flags: ASYNC_TX_ACK
  42. */
  43. struct dma_async_tx_descriptor *
  44. async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset,
  45. unsigned int src_offset, size_t len,
  46. struct async_submit_ctl *submit)
  47. {
  48. struct dma_chan *chan = async_tx_find_channel(submit, DMA_MEMCPY,
  49. &dest, 1, &src, 1, len);
  50. struct dma_device *device = chan ? chan->device : NULL;
  51. struct dma_async_tx_descriptor *tx = NULL;
  52. struct dmaengine_unmap_data *unmap = NULL;
  53. if (device)
  54. unmap = dmaengine_get_unmap_data(device->dev, 2, GFP_NOWAIT);
  55. if (unmap && is_dma_copy_aligned(device, src_offset, dest_offset, len)) {
  56. unsigned long dma_prep_flags = 0;
  57. if (submit->cb_fn)
  58. dma_prep_flags |= DMA_PREP_INTERRUPT;
  59. if (submit->flags & ASYNC_TX_FENCE)
  60. dma_prep_flags |= DMA_PREP_FENCE;
  61. unmap->to_cnt = 1;
  62. unmap->addr[0] = dma_map_page(device->dev, src, src_offset, len,
  63. DMA_TO_DEVICE);
  64. unmap->from_cnt = 1;
  65. unmap->addr[1] = dma_map_page(device->dev, dest, dest_offset, len,
  66. DMA_FROM_DEVICE);
  67. unmap->len = len;
  68. tx = device->device_prep_dma_memcpy(chan, unmap->addr[1],
  69. unmap->addr[0], len,
  70. dma_prep_flags);
  71. }
  72. if (tx) {
  73. pr_debug("%s: (async) len: %zu\n", __func__, len);
  74. dma_set_unmap(tx, unmap);
  75. async_tx_submit(chan, tx, submit);
  76. } else {
  77. void *dest_buf, *src_buf;
  78. pr_debug("%s: (sync) len: %zu\n", __func__, len);
  79. /* wait for any prerequisite operations */
  80. async_tx_quiesce(&submit->depend_tx);
  81. dest_buf = kmap_atomic(dest) + dest_offset;
  82. src_buf = kmap_atomic(src) + src_offset;
  83. memcpy(dest_buf, src_buf, len);
  84. kunmap_atomic(src_buf);
  85. kunmap_atomic(dest_buf);
  86. async_tx_sync_epilog(submit);
  87. }
  88. dmaengine_unmap_put(unmap);
  89. return tx;
  90. }
  91. EXPORT_SYMBOL_GPL(async_memcpy);
  92. MODULE_AUTHOR("Intel Corporation");
  93. MODULE_DESCRIPTION("asynchronous memcpy api");
  94. MODULE_LICENSE("GPL");