sprom.c 21 KB

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  1. /*
  2. * Broadcom specific AMBA
  3. * SPROM reading
  4. *
  5. * Copyright 2011, 2012, Hauke Mehrtens <hauke@hauke-m.de>
  6. *
  7. * Licensed under the GNU/GPL. See COPYING for details.
  8. */
  9. #include "bcma_private.h"
  10. #include <linux/bcma/bcma.h>
  11. #include <linux/bcma/bcma_regs.h>
  12. #include <linux/pci.h>
  13. #include <linux/io.h>
  14. #include <linux/dma-mapping.h>
  15. #include <linux/slab.h>
  16. static int(*get_fallback_sprom)(struct bcma_bus *dev, struct ssb_sprom *out);
  17. /**
  18. * bcma_arch_register_fallback_sprom - Registers a method providing a
  19. * fallback SPROM if no SPROM is found.
  20. *
  21. * @sprom_callback: The callback function.
  22. *
  23. * With this function the architecture implementation may register a
  24. * callback handler which fills the SPROM data structure. The fallback is
  25. * used for PCI based BCMA devices, where no valid SPROM can be found
  26. * in the shadow registers and to provide the SPROM for SoCs where BCMA is
  27. * to controll the system bus.
  28. *
  29. * This function is useful for weird architectures that have a half-assed
  30. * BCMA device hardwired to their PCI bus.
  31. *
  32. * This function is available for architecture code, only. So it is not
  33. * exported.
  34. */
  35. int bcma_arch_register_fallback_sprom(int (*sprom_callback)(struct bcma_bus *bus,
  36. struct ssb_sprom *out))
  37. {
  38. if (get_fallback_sprom)
  39. return -EEXIST;
  40. get_fallback_sprom = sprom_callback;
  41. return 0;
  42. }
  43. static int bcma_fill_sprom_with_fallback(struct bcma_bus *bus,
  44. struct ssb_sprom *out)
  45. {
  46. int err;
  47. if (!get_fallback_sprom) {
  48. err = -ENOENT;
  49. goto fail;
  50. }
  51. err = get_fallback_sprom(bus, out);
  52. if (err)
  53. goto fail;
  54. bcma_debug(bus, "Using SPROM revision %d provided by platform.\n",
  55. bus->sprom.revision);
  56. return 0;
  57. fail:
  58. bcma_warn(bus, "Using fallback SPROM failed (err %d)\n", err);
  59. return err;
  60. }
  61. /**************************************************
  62. * R/W ops.
  63. **************************************************/
  64. static void bcma_sprom_read(struct bcma_bus *bus, u16 offset, u16 *sprom,
  65. size_t words)
  66. {
  67. int i;
  68. for (i = 0; i < words; i++)
  69. sprom[i] = bcma_read16(bus->drv_cc.core, offset + (i * 2));
  70. }
  71. /**************************************************
  72. * Validation.
  73. **************************************************/
  74. static inline u8 bcma_crc8(u8 crc, u8 data)
  75. {
  76. /* Polynomial: x^8 + x^7 + x^6 + x^4 + x^2 + 1 */
  77. static const u8 t[] = {
  78. 0x00, 0xF7, 0xB9, 0x4E, 0x25, 0xD2, 0x9C, 0x6B,
  79. 0x4A, 0xBD, 0xF3, 0x04, 0x6F, 0x98, 0xD6, 0x21,
  80. 0x94, 0x63, 0x2D, 0xDA, 0xB1, 0x46, 0x08, 0xFF,
  81. 0xDE, 0x29, 0x67, 0x90, 0xFB, 0x0C, 0x42, 0xB5,
  82. 0x7F, 0x88, 0xC6, 0x31, 0x5A, 0xAD, 0xE3, 0x14,
  83. 0x35, 0xC2, 0x8C, 0x7B, 0x10, 0xE7, 0xA9, 0x5E,
  84. 0xEB, 0x1C, 0x52, 0xA5, 0xCE, 0x39, 0x77, 0x80,
  85. 0xA1, 0x56, 0x18, 0xEF, 0x84, 0x73, 0x3D, 0xCA,
  86. 0xFE, 0x09, 0x47, 0xB0, 0xDB, 0x2C, 0x62, 0x95,
  87. 0xB4, 0x43, 0x0D, 0xFA, 0x91, 0x66, 0x28, 0xDF,
  88. 0x6A, 0x9D, 0xD3, 0x24, 0x4F, 0xB8, 0xF6, 0x01,
  89. 0x20, 0xD7, 0x99, 0x6E, 0x05, 0xF2, 0xBC, 0x4B,
  90. 0x81, 0x76, 0x38, 0xCF, 0xA4, 0x53, 0x1D, 0xEA,
  91. 0xCB, 0x3C, 0x72, 0x85, 0xEE, 0x19, 0x57, 0xA0,
  92. 0x15, 0xE2, 0xAC, 0x5B, 0x30, 0xC7, 0x89, 0x7E,
  93. 0x5F, 0xA8, 0xE6, 0x11, 0x7A, 0x8D, 0xC3, 0x34,
  94. 0xAB, 0x5C, 0x12, 0xE5, 0x8E, 0x79, 0x37, 0xC0,
  95. 0xE1, 0x16, 0x58, 0xAF, 0xC4, 0x33, 0x7D, 0x8A,
  96. 0x3F, 0xC8, 0x86, 0x71, 0x1A, 0xED, 0xA3, 0x54,
  97. 0x75, 0x82, 0xCC, 0x3B, 0x50, 0xA7, 0xE9, 0x1E,
  98. 0xD4, 0x23, 0x6D, 0x9A, 0xF1, 0x06, 0x48, 0xBF,
  99. 0x9E, 0x69, 0x27, 0xD0, 0xBB, 0x4C, 0x02, 0xF5,
  100. 0x40, 0xB7, 0xF9, 0x0E, 0x65, 0x92, 0xDC, 0x2B,
  101. 0x0A, 0xFD, 0xB3, 0x44, 0x2F, 0xD8, 0x96, 0x61,
  102. 0x55, 0xA2, 0xEC, 0x1B, 0x70, 0x87, 0xC9, 0x3E,
  103. 0x1F, 0xE8, 0xA6, 0x51, 0x3A, 0xCD, 0x83, 0x74,
  104. 0xC1, 0x36, 0x78, 0x8F, 0xE4, 0x13, 0x5D, 0xAA,
  105. 0x8B, 0x7C, 0x32, 0xC5, 0xAE, 0x59, 0x17, 0xE0,
  106. 0x2A, 0xDD, 0x93, 0x64, 0x0F, 0xF8, 0xB6, 0x41,
  107. 0x60, 0x97, 0xD9, 0x2E, 0x45, 0xB2, 0xFC, 0x0B,
  108. 0xBE, 0x49, 0x07, 0xF0, 0x9B, 0x6C, 0x22, 0xD5,
  109. 0xF4, 0x03, 0x4D, 0xBA, 0xD1, 0x26, 0x68, 0x9F,
  110. };
  111. return t[crc ^ data];
  112. }
  113. static u8 bcma_sprom_crc(const u16 *sprom, size_t words)
  114. {
  115. int word;
  116. u8 crc = 0xFF;
  117. for (word = 0; word < words - 1; word++) {
  118. crc = bcma_crc8(crc, sprom[word] & 0x00FF);
  119. crc = bcma_crc8(crc, (sprom[word] & 0xFF00) >> 8);
  120. }
  121. crc = bcma_crc8(crc, sprom[words - 1] & 0x00FF);
  122. crc ^= 0xFF;
  123. return crc;
  124. }
  125. static int bcma_sprom_check_crc(const u16 *sprom, size_t words)
  126. {
  127. u8 crc;
  128. u8 expected_crc;
  129. u16 tmp;
  130. crc = bcma_sprom_crc(sprom, words);
  131. tmp = sprom[words - 1] & SSB_SPROM_REVISION_CRC;
  132. expected_crc = tmp >> SSB_SPROM_REVISION_CRC_SHIFT;
  133. if (crc != expected_crc)
  134. return -EPROTO;
  135. return 0;
  136. }
  137. static int bcma_sprom_valid(struct bcma_bus *bus, const u16 *sprom,
  138. size_t words)
  139. {
  140. u16 revision;
  141. int err;
  142. err = bcma_sprom_check_crc(sprom, words);
  143. if (err)
  144. return err;
  145. revision = sprom[words - 1] & SSB_SPROM_REVISION_REV;
  146. if (revision != 8 && revision != 9 && revision != 10) {
  147. pr_err("Unsupported SPROM revision: %d\n", revision);
  148. return -ENOENT;
  149. }
  150. bus->sprom.revision = revision;
  151. bcma_debug(bus, "Found SPROM revision %d\n", revision);
  152. return 0;
  153. }
  154. /**************************************************
  155. * SPROM extraction.
  156. **************************************************/
  157. #define SPOFF(offset) ((offset) / sizeof(u16))
  158. #define SPEX(_field, _offset, _mask, _shift) \
  159. bus->sprom._field = ((sprom[SPOFF(_offset)] & (_mask)) >> (_shift))
  160. #define SPEX32(_field, _offset, _mask, _shift) \
  161. bus->sprom._field = ((((u32)sprom[SPOFF((_offset)+2)] << 16 | \
  162. sprom[SPOFF(_offset)]) & (_mask)) >> (_shift))
  163. #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \
  164. do { \
  165. SPEX(_field[0], _offset + 0, _mask, _shift); \
  166. SPEX(_field[1], _offset + 2, _mask, _shift); \
  167. SPEX(_field[2], _offset + 4, _mask, _shift); \
  168. SPEX(_field[3], _offset + 6, _mask, _shift); \
  169. SPEX(_field[4], _offset + 8, _mask, _shift); \
  170. SPEX(_field[5], _offset + 10, _mask, _shift); \
  171. SPEX(_field[6], _offset + 12, _mask, _shift); \
  172. SPEX(_field[7], _offset + 14, _mask, _shift); \
  173. } while (0)
  174. static s8 sprom_extract_antgain(const u16 *in, u16 offset, u16 mask, u16 shift)
  175. {
  176. u16 v;
  177. u8 gain;
  178. v = in[SPOFF(offset)];
  179. gain = (v & mask) >> shift;
  180. if (gain == 0xFF) {
  181. gain = 8; /* If unset use 2dBm */
  182. } else {
  183. /* Q5.2 Fractional part is stored in 0xC0 */
  184. gain = ((gain & 0xC0) >> 6) | ((gain & 0x3F) << 2);
  185. }
  186. return (s8)gain;
  187. }
  188. static void bcma_sprom_extract_r8(struct bcma_bus *bus, const u16 *sprom)
  189. {
  190. u16 v, o;
  191. int i;
  192. u16 pwr_info_offset[] = {
  193. SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
  194. SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
  195. };
  196. BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
  197. ARRAY_SIZE(bus->sprom.core_pwr_info));
  198. for (i = 0; i < 3; i++) {
  199. v = sprom[SPOFF(SSB_SPROM8_IL0MAC) + i];
  200. *(((__be16 *)bus->sprom.il0mac) + i) = cpu_to_be16(v);
  201. }
  202. SPEX(board_rev, SSB_SPROM8_BOARDREV, ~0, 0);
  203. SPEX(board_type, SSB_SPROM1_SPID, ~0, 0);
  204. SPEX(txpid2g[0], SSB_SPROM4_TXPID2G01, SSB_SPROM4_TXPID2G0,
  205. SSB_SPROM4_TXPID2G0_SHIFT);
  206. SPEX(txpid2g[1], SSB_SPROM4_TXPID2G01, SSB_SPROM4_TXPID2G1,
  207. SSB_SPROM4_TXPID2G1_SHIFT);
  208. SPEX(txpid2g[2], SSB_SPROM4_TXPID2G23, SSB_SPROM4_TXPID2G2,
  209. SSB_SPROM4_TXPID2G2_SHIFT);
  210. SPEX(txpid2g[3], SSB_SPROM4_TXPID2G23, SSB_SPROM4_TXPID2G3,
  211. SSB_SPROM4_TXPID2G3_SHIFT);
  212. SPEX(txpid5gl[0], SSB_SPROM4_TXPID5GL01, SSB_SPROM4_TXPID5GL0,
  213. SSB_SPROM4_TXPID5GL0_SHIFT);
  214. SPEX(txpid5gl[1], SSB_SPROM4_TXPID5GL01, SSB_SPROM4_TXPID5GL1,
  215. SSB_SPROM4_TXPID5GL1_SHIFT);
  216. SPEX(txpid5gl[2], SSB_SPROM4_TXPID5GL23, SSB_SPROM4_TXPID5GL2,
  217. SSB_SPROM4_TXPID5GL2_SHIFT);
  218. SPEX(txpid5gl[3], SSB_SPROM4_TXPID5GL23, SSB_SPROM4_TXPID5GL3,
  219. SSB_SPROM4_TXPID5GL3_SHIFT);
  220. SPEX(txpid5g[0], SSB_SPROM4_TXPID5G01, SSB_SPROM4_TXPID5G0,
  221. SSB_SPROM4_TXPID5G0_SHIFT);
  222. SPEX(txpid5g[1], SSB_SPROM4_TXPID5G01, SSB_SPROM4_TXPID5G1,
  223. SSB_SPROM4_TXPID5G1_SHIFT);
  224. SPEX(txpid5g[2], SSB_SPROM4_TXPID5G23, SSB_SPROM4_TXPID5G2,
  225. SSB_SPROM4_TXPID5G2_SHIFT);
  226. SPEX(txpid5g[3], SSB_SPROM4_TXPID5G23, SSB_SPROM4_TXPID5G3,
  227. SSB_SPROM4_TXPID5G3_SHIFT);
  228. SPEX(txpid5gh[0], SSB_SPROM4_TXPID5GH01, SSB_SPROM4_TXPID5GH0,
  229. SSB_SPROM4_TXPID5GH0_SHIFT);
  230. SPEX(txpid5gh[1], SSB_SPROM4_TXPID5GH01, SSB_SPROM4_TXPID5GH1,
  231. SSB_SPROM4_TXPID5GH1_SHIFT);
  232. SPEX(txpid5gh[2], SSB_SPROM4_TXPID5GH23, SSB_SPROM4_TXPID5GH2,
  233. SSB_SPROM4_TXPID5GH2_SHIFT);
  234. SPEX(txpid5gh[3], SSB_SPROM4_TXPID5GH23, SSB_SPROM4_TXPID5GH3,
  235. SSB_SPROM4_TXPID5GH3_SHIFT);
  236. SPEX(boardflags_lo, SSB_SPROM8_BFLLO, ~0, 0);
  237. SPEX(boardflags_hi, SSB_SPROM8_BFLHI, ~0, 0);
  238. SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, ~0, 0);
  239. SPEX(boardflags2_hi, SSB_SPROM8_BFL2HI, ~0, 0);
  240. SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
  241. SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
  242. /* Extract cores power info info */
  243. for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
  244. o = pwr_info_offset[i];
  245. SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
  246. SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
  247. SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
  248. SSB_SPROM8_2G_MAXP, 0);
  249. SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
  250. SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
  251. SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
  252. SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
  253. SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
  254. SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
  255. SSB_SPROM8_5G_MAXP, 0);
  256. SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
  257. SSB_SPROM8_5GH_MAXP, 0);
  258. SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
  259. SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
  260. SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
  261. SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
  262. SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
  263. SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
  264. SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
  265. SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
  266. SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
  267. SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
  268. SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
  269. }
  270. SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_TSSIPOS,
  271. SSB_SROM8_FEM_TSSIPOS_SHIFT);
  272. SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_EXTPA_GAIN,
  273. SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
  274. SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_PDET_RANGE,
  275. SSB_SROM8_FEM_PDET_RANGE_SHIFT);
  276. SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_TR_ISO,
  277. SSB_SROM8_FEM_TR_ISO_SHIFT);
  278. SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_ANTSWLUT,
  279. SSB_SROM8_FEM_ANTSWLUT_SHIFT);
  280. SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_TSSIPOS,
  281. SSB_SROM8_FEM_TSSIPOS_SHIFT);
  282. SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_EXTPA_GAIN,
  283. SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
  284. SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_PDET_RANGE,
  285. SSB_SROM8_FEM_PDET_RANGE_SHIFT);
  286. SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_TR_ISO,
  287. SSB_SROM8_FEM_TR_ISO_SHIFT);
  288. SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_ANTSWLUT,
  289. SSB_SROM8_FEM_ANTSWLUT_SHIFT);
  290. SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A,
  291. SSB_SPROM8_ANTAVAIL_A_SHIFT);
  292. SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG,
  293. SSB_SPROM8_ANTAVAIL_BG_SHIFT);
  294. SPEX(maxpwr_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_MAXP_BG_MASK, 0);
  295. SPEX(itssi_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_ITSSI_BG,
  296. SSB_SPROM8_ITSSI_BG_SHIFT);
  297. SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0);
  298. SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A,
  299. SSB_SPROM8_ITSSI_A_SHIFT);
  300. SPEX(maxpwr_ah, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AH_MASK, 0);
  301. SPEX(maxpwr_al, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AL_MASK,
  302. SSB_SPROM8_MAXP_AL_SHIFT);
  303. SPEX(gpio0, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P0, 0);
  304. SPEX(gpio1, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P1,
  305. SSB_SPROM8_GPIOA_P1_SHIFT);
  306. SPEX(gpio2, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P2, 0);
  307. SPEX(gpio3, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P3,
  308. SSB_SPROM8_GPIOB_P3_SHIFT);
  309. SPEX(tri2g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI2G, 0);
  310. SPEX(tri5g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI5G,
  311. SSB_SPROM8_TRI5G_SHIFT);
  312. SPEX(tri5gl, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GL, 0);
  313. SPEX(tri5gh, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GH,
  314. SSB_SPROM8_TRI5GH_SHIFT);
  315. SPEX(rxpo2g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO2G,
  316. SSB_SPROM8_RXPO2G_SHIFT);
  317. SPEX(rxpo5g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO5G,
  318. SSB_SPROM8_RXPO5G_SHIFT);
  319. SPEX(rssismf2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMF2G, 0);
  320. SPEX(rssismc2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMC2G,
  321. SSB_SPROM8_RSSISMC2G_SHIFT);
  322. SPEX(rssisav2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISAV2G,
  323. SSB_SPROM8_RSSISAV2G_SHIFT);
  324. SPEX(bxa2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_BXA2G,
  325. SSB_SPROM8_BXA2G_SHIFT);
  326. SPEX(rssismf5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMF5G, 0);
  327. SPEX(rssismc5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMC5G,
  328. SSB_SPROM8_RSSISMC5G_SHIFT);
  329. SPEX(rssisav5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISAV5G,
  330. SSB_SPROM8_RSSISAV5G_SHIFT);
  331. SPEX(bxa5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_BXA5G,
  332. SSB_SPROM8_BXA5G_SHIFT);
  333. SPEX(pa0b0, SSB_SPROM8_PA0B0, ~0, 0);
  334. SPEX(pa0b1, SSB_SPROM8_PA0B1, ~0, 0);
  335. SPEX(pa0b2, SSB_SPROM8_PA0B2, ~0, 0);
  336. SPEX(pa1b0, SSB_SPROM8_PA1B0, ~0, 0);
  337. SPEX(pa1b1, SSB_SPROM8_PA1B1, ~0, 0);
  338. SPEX(pa1b2, SSB_SPROM8_PA1B2, ~0, 0);
  339. SPEX(pa1lob0, SSB_SPROM8_PA1LOB0, ~0, 0);
  340. SPEX(pa1lob1, SSB_SPROM8_PA1LOB1, ~0, 0);
  341. SPEX(pa1lob2, SSB_SPROM8_PA1LOB2, ~0, 0);
  342. SPEX(pa1hib0, SSB_SPROM8_PA1HIB0, ~0, 0);
  343. SPEX(pa1hib1, SSB_SPROM8_PA1HIB1, ~0, 0);
  344. SPEX(pa1hib2, SSB_SPROM8_PA1HIB2, ~0, 0);
  345. SPEX(cck2gpo, SSB_SPROM8_CCK2GPO, ~0, 0);
  346. SPEX32(ofdm2gpo, SSB_SPROM8_OFDM2GPO, ~0, 0);
  347. SPEX32(ofdm5glpo, SSB_SPROM8_OFDM5GLPO, ~0, 0);
  348. SPEX32(ofdm5gpo, SSB_SPROM8_OFDM5GPO, ~0, 0);
  349. SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, ~0, 0);
  350. /* Extract the antenna gain values. */
  351. bus->sprom.antenna_gain.a0 = sprom_extract_antgain(sprom,
  352. SSB_SPROM8_AGAIN01,
  353. SSB_SPROM8_AGAIN0,
  354. SSB_SPROM8_AGAIN0_SHIFT);
  355. bus->sprom.antenna_gain.a1 = sprom_extract_antgain(sprom,
  356. SSB_SPROM8_AGAIN01,
  357. SSB_SPROM8_AGAIN1,
  358. SSB_SPROM8_AGAIN1_SHIFT);
  359. bus->sprom.antenna_gain.a2 = sprom_extract_antgain(sprom,
  360. SSB_SPROM8_AGAIN23,
  361. SSB_SPROM8_AGAIN2,
  362. SSB_SPROM8_AGAIN2_SHIFT);
  363. bus->sprom.antenna_gain.a3 = sprom_extract_antgain(sprom,
  364. SSB_SPROM8_AGAIN23,
  365. SSB_SPROM8_AGAIN3,
  366. SSB_SPROM8_AGAIN3_SHIFT);
  367. SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
  368. SSB_SPROM8_LEDDC_ON_SHIFT);
  369. SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,
  370. SSB_SPROM8_LEDDC_OFF_SHIFT);
  371. SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,
  372. SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);
  373. SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,
  374. SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);
  375. SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,
  376. SSB_SPROM8_TXRXC_SWITCH_SHIFT);
  377. SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);
  378. SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);
  379. SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);
  380. SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);
  381. SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);
  382. SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,
  383. SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);
  384. SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,
  385. SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);
  386. SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,
  387. SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,
  388. SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);
  389. SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,
  390. SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);
  391. SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,
  392. SSB_SPROM8_OPT_CORRX_TEMP_OPTION,
  393. SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);
  394. SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,
  395. SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,
  396. SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);
  397. SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,
  398. SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,
  399. SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);
  400. SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,
  401. SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);
  402. SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);
  403. SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);
  404. SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);
  405. SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);
  406. SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,
  407. SSB_SPROM8_THERMAL_TRESH_SHIFT);
  408. SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,
  409. SSB_SPROM8_THERMAL_OFFSET_SHIFT);
  410. SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,
  411. SSB_SPROM8_TEMPDELTA_PHYCAL,
  412. SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);
  413. SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,
  414. SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);
  415. SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,
  416. SSB_SPROM8_TEMPDELTA_HYSTERESIS,
  417. SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);
  418. }
  419. /*
  420. * Indicates the presence of external SPROM.
  421. */
  422. static bool bcma_sprom_ext_available(struct bcma_bus *bus)
  423. {
  424. u32 chip_status;
  425. u32 srom_control;
  426. u32 present_mask;
  427. if (bus->drv_cc.core->id.rev >= 31) {
  428. if (!(bus->drv_cc.capabilities & BCMA_CC_CAP_SPROM))
  429. return false;
  430. srom_control = bcma_read32(bus->drv_cc.core,
  431. BCMA_CC_SROM_CONTROL);
  432. return srom_control & BCMA_CC_SROM_CONTROL_PRESENT;
  433. }
  434. /* older chipcommon revisions use chip status register */
  435. chip_status = bcma_read32(bus->drv_cc.core, BCMA_CC_CHIPSTAT);
  436. switch (bus->chipinfo.id) {
  437. case BCMA_CHIP_ID_BCM4313:
  438. present_mask = BCMA_CC_CHIPST_4313_SPROM_PRESENT;
  439. break;
  440. case BCMA_CHIP_ID_BCM4331:
  441. present_mask = BCMA_CC_CHIPST_4331_SPROM_PRESENT;
  442. break;
  443. default:
  444. return true;
  445. }
  446. return chip_status & present_mask;
  447. }
  448. /*
  449. * Indicates that on-chip OTP memory is present and enabled.
  450. */
  451. static bool bcma_sprom_onchip_available(struct bcma_bus *bus)
  452. {
  453. u32 chip_status;
  454. u32 otpsize = 0;
  455. bool present;
  456. chip_status = bcma_read32(bus->drv_cc.core, BCMA_CC_CHIPSTAT);
  457. switch (bus->chipinfo.id) {
  458. case BCMA_CHIP_ID_BCM4313:
  459. present = chip_status & BCMA_CC_CHIPST_4313_OTP_PRESENT;
  460. break;
  461. case BCMA_CHIP_ID_BCM4331:
  462. present = chip_status & BCMA_CC_CHIPST_4331_OTP_PRESENT;
  463. break;
  464. case BCMA_CHIP_ID_BCM43142:
  465. case BCMA_CHIP_ID_BCM43224:
  466. case BCMA_CHIP_ID_BCM43225:
  467. /* for these chips OTP is always available */
  468. present = true;
  469. break;
  470. case BCMA_CHIP_ID_BCM43131:
  471. case BCMA_CHIP_ID_BCM43217:
  472. case BCMA_CHIP_ID_BCM43227:
  473. case BCMA_CHIP_ID_BCM43228:
  474. case BCMA_CHIP_ID_BCM43428:
  475. present = chip_status & BCMA_CC_CHIPST_43228_OTP_PRESENT;
  476. break;
  477. default:
  478. present = false;
  479. break;
  480. }
  481. if (present) {
  482. otpsize = bus->drv_cc.capabilities & BCMA_CC_CAP_OTPS;
  483. otpsize >>= BCMA_CC_CAP_OTPS_SHIFT;
  484. }
  485. return otpsize != 0;
  486. }
  487. /*
  488. * Verify OTP is filled and determine the byte
  489. * offset where SPROM data is located.
  490. *
  491. * On error, returns 0; byte offset otherwise.
  492. */
  493. static int bcma_sprom_onchip_offset(struct bcma_bus *bus)
  494. {
  495. struct bcma_device *cc = bus->drv_cc.core;
  496. u32 offset;
  497. /* verify OTP status */
  498. if ((bcma_read32(cc, BCMA_CC_OTPS) & BCMA_CC_OTPS_GU_PROG_HW) == 0)
  499. return 0;
  500. /* obtain bit offset from otplayout register */
  501. offset = (bcma_read32(cc, BCMA_CC_OTPL) & BCMA_CC_OTPL_GURGN_OFFSET);
  502. return BCMA_CC_SPROM + (offset >> 3);
  503. }
  504. int bcma_sprom_get(struct bcma_bus *bus)
  505. {
  506. u16 offset = BCMA_CC_SPROM;
  507. u16 *sprom;
  508. size_t sprom_sizes[] = { SSB_SPROMSIZE_WORDS_R4,
  509. SSB_SPROMSIZE_WORDS_R10,
  510. SSB_SPROMSIZE_WORDS_R11, };
  511. int i, err = 0;
  512. if (!bus->drv_cc.core)
  513. return -EOPNOTSUPP;
  514. if (!bcma_sprom_ext_available(bus)) {
  515. bool sprom_onchip;
  516. /*
  517. * External SPROM takes precedence so check
  518. * on-chip OTP only when no external SPROM
  519. * is present.
  520. */
  521. sprom_onchip = bcma_sprom_onchip_available(bus);
  522. if (sprom_onchip) {
  523. /* determine offset */
  524. offset = bcma_sprom_onchip_offset(bus);
  525. }
  526. if (!offset || !sprom_onchip) {
  527. /*
  528. * Maybe there is no SPROM on the device?
  529. * Now we ask the arch code if there is some sprom
  530. * available for this device in some other storage.
  531. */
  532. err = bcma_fill_sprom_with_fallback(bus, &bus->sprom);
  533. return err;
  534. }
  535. }
  536. if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4331 ||
  537. bus->chipinfo.id == BCMA_CHIP_ID_BCM43431)
  538. bcma_chipco_bcm4331_ext_pa_lines_ctl(&bus->drv_cc, false);
  539. bcma_debug(bus, "SPROM offset 0x%x\n", offset);
  540. for (i = 0; i < ARRAY_SIZE(sprom_sizes); i++) {
  541. size_t words = sprom_sizes[i];
  542. sprom = kcalloc(words, sizeof(u16), GFP_KERNEL);
  543. if (!sprom)
  544. return -ENOMEM;
  545. bcma_sprom_read(bus, offset, sprom, words);
  546. err = bcma_sprom_valid(bus, sprom, words);
  547. if (!err)
  548. break;
  549. kfree(sprom);
  550. }
  551. if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4331 ||
  552. bus->chipinfo.id == BCMA_CHIP_ID_BCM43431)
  553. bcma_chipco_bcm4331_ext_pa_lines_ctl(&bus->drv_cc, true);
  554. if (err) {
  555. bcma_warn(bus, "Invalid SPROM read from the PCIe card, trying to use fallback SPROM\n");
  556. err = bcma_fill_sprom_with_fallback(bus, &bus->sprom);
  557. } else {
  558. bcma_sprom_extract_r8(bus, sprom);
  559. kfree(sprom);
  560. }
  561. return err;
  562. }