clk.h 4.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150
  1. #ifndef __MACH_IMX_CLK_H
  2. #define __MACH_IMX_CLK_H
  3. #include <linux/spinlock.h>
  4. #include <linux/clk-provider.h>
  5. extern spinlock_t imx_ccm_lock;
  6. void imx_check_clocks(struct clk *clks[], unsigned int count);
  7. void imx_register_uart_clocks(struct clk ** const clks[]);
  8. extern void imx_cscmr1_fixup(u32 *val);
  9. enum imx_pllv1_type {
  10. IMX_PLLV1_IMX1,
  11. IMX_PLLV1_IMX21,
  12. IMX_PLLV1_IMX25,
  13. IMX_PLLV1_IMX27,
  14. IMX_PLLV1_IMX31,
  15. IMX_PLLV1_IMX35,
  16. };
  17. struct clk *imx_clk_pllv1(enum imx_pllv1_type type, const char *name,
  18. const char *parent, void __iomem *base);
  19. struct clk *imx_clk_pllv2(const char *name, const char *parent,
  20. void __iomem *base);
  21. enum imx_pllv3_type {
  22. IMX_PLLV3_GENERIC,
  23. IMX_PLLV3_SYS,
  24. IMX_PLLV3_USB,
  25. IMX_PLLV3_USB_VF610,
  26. IMX_PLLV3_AV,
  27. IMX_PLLV3_ENET,
  28. IMX_PLLV3_ENET_IMX7,
  29. };
  30. struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
  31. const char *parent_name, void __iomem *base, u32 div_mask);
  32. struct clk *clk_register_gate2(struct device *dev, const char *name,
  33. const char *parent_name, unsigned long flags,
  34. void __iomem *reg, u8 bit_idx,
  35. u8 clk_gate_flags, spinlock_t *lock,
  36. unsigned int *share_count);
  37. struct clk * imx_obtain_fixed_clock(
  38. const char *name, unsigned long rate);
  39. struct clk *imx_clk_gate_exclusive(const char *name, const char *parent,
  40. void __iomem *reg, u8 shift, u32 exclusive_mask);
  41. static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
  42. void __iomem *reg, u8 shift)
  43. {
  44. return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
  45. shift, 0, &imx_ccm_lock, NULL);
  46. }
  47. static inline struct clk *imx_clk_gate2_shared(const char *name,
  48. const char *parent, void __iomem *reg, u8 shift,
  49. unsigned int *share_count)
  50. {
  51. return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
  52. shift, 0, &imx_ccm_lock, share_count);
  53. }
  54. struct clk *imx_clk_pfd(const char *name, const char *parent_name,
  55. void __iomem *reg, u8 idx);
  56. struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
  57. void __iomem *reg, u8 shift, u8 width,
  58. void __iomem *busy_reg, u8 busy_shift);
  59. struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
  60. u8 width, void __iomem *busy_reg, u8 busy_shift,
  61. const char **parent_names, int num_parents);
  62. struct clk *imx_clk_fixup_divider(const char *name, const char *parent,
  63. void __iomem *reg, u8 shift, u8 width,
  64. void (*fixup)(u32 *val));
  65. struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
  66. u8 shift, u8 width, const char **parents,
  67. int num_parents, void (*fixup)(u32 *val));
  68. static inline struct clk *imx_clk_fixed(const char *name, int rate)
  69. {
  70. return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
  71. }
  72. static inline struct clk *imx_clk_divider(const char *name, const char *parent,
  73. void __iomem *reg, u8 shift, u8 width)
  74. {
  75. return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
  76. reg, shift, width, 0, &imx_ccm_lock);
  77. }
  78. static inline struct clk *imx_clk_divider_flags(const char *name,
  79. const char *parent, void __iomem *reg, u8 shift, u8 width,
  80. unsigned long flags)
  81. {
  82. return clk_register_divider(NULL, name, parent, flags,
  83. reg, shift, width, 0, &imx_ccm_lock);
  84. }
  85. static inline struct clk *imx_clk_gate(const char *name, const char *parent,
  86. void __iomem *reg, u8 shift)
  87. {
  88. return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
  89. shift, 0, &imx_ccm_lock);
  90. }
  91. static inline struct clk *imx_clk_gate_dis(const char *name, const char *parent,
  92. void __iomem *reg, u8 shift)
  93. {
  94. return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
  95. shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock);
  96. }
  97. static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
  98. u8 shift, u8 width, const char **parents, int num_parents)
  99. {
  100. return clk_register_mux(NULL, name, parents, num_parents,
  101. CLK_SET_RATE_NO_REPARENT, reg, shift,
  102. width, 0, &imx_ccm_lock);
  103. }
  104. static inline struct clk *imx_clk_mux_flags(const char *name,
  105. void __iomem *reg, u8 shift, u8 width, const char **parents,
  106. int num_parents, unsigned long flags)
  107. {
  108. return clk_register_mux(NULL, name, parents, num_parents,
  109. flags | CLK_SET_RATE_NO_REPARENT, reg, shift, width, 0,
  110. &imx_ccm_lock);
  111. }
  112. static inline struct clk *imx_clk_fixed_factor(const char *name,
  113. const char *parent, unsigned int mult, unsigned int div)
  114. {
  115. return clk_register_fixed_factor(NULL, name, parent,
  116. CLK_SET_RATE_PARENT, mult, div);
  117. }
  118. struct clk *imx_clk_cpu(const char *name, const char *parent_name,
  119. struct clk *div, struct clk *mux, struct clk *pll,
  120. struct clk *step);
  121. #endif