clk-sun6i-apb0-gates.c 3.0 KB

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  1. /*
  2. * Copyright (C) 2014 Free Electrons
  3. *
  4. * License Terms: GNU General Public License v2
  5. * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
  6. *
  7. * Allwinner A31 APB0 clock gates driver
  8. *
  9. */
  10. #include <linux/clk-provider.h>
  11. #include <linux/clkdev.h>
  12. #include <linux/module.h>
  13. #include <linux/of.h>
  14. #include <linux/of_device.h>
  15. #include <linux/platform_device.h>
  16. #define SUN6I_APB0_GATES_MAX_SIZE 32
  17. struct gates_data {
  18. DECLARE_BITMAP(mask, SUN6I_APB0_GATES_MAX_SIZE);
  19. };
  20. static const struct gates_data sun6i_a31_apb0_gates __initconst = {
  21. .mask = {0x7F},
  22. };
  23. static const struct gates_data sun8i_a23_apb0_gates __initconst = {
  24. .mask = {0x5D},
  25. };
  26. static const struct of_device_id sun6i_a31_apb0_gates_clk_dt_ids[] = {
  27. { .compatible = "allwinner,sun6i-a31-apb0-gates-clk", .data = &sun6i_a31_apb0_gates },
  28. { .compatible = "allwinner,sun8i-a23-apb0-gates-clk", .data = &sun8i_a23_apb0_gates },
  29. { /* sentinel */ }
  30. };
  31. MODULE_DEVICE_TABLE(of, sun6i_a31_apb0_gates_clk_dt_ids);
  32. static int sun6i_a31_apb0_gates_clk_probe(struct platform_device *pdev)
  33. {
  34. struct device_node *np = pdev->dev.of_node;
  35. struct clk_onecell_data *clk_data;
  36. const struct of_device_id *device;
  37. const struct gates_data *data;
  38. const char *clk_parent;
  39. const char *clk_name;
  40. struct resource *r;
  41. void __iomem *reg;
  42. int ngates;
  43. int i;
  44. int j = 0;
  45. if (!np)
  46. return -ENODEV;
  47. device = of_match_device(sun6i_a31_apb0_gates_clk_dt_ids, &pdev->dev);
  48. if (!device)
  49. return -ENODEV;
  50. data = device->data;
  51. r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  52. reg = devm_ioremap_resource(&pdev->dev, r);
  53. if (IS_ERR(reg))
  54. return PTR_ERR(reg);
  55. clk_parent = of_clk_get_parent_name(np, 0);
  56. if (!clk_parent)
  57. return -EINVAL;
  58. clk_data = devm_kzalloc(&pdev->dev, sizeof(struct clk_onecell_data),
  59. GFP_KERNEL);
  60. if (!clk_data)
  61. return -ENOMEM;
  62. /* Worst-case size approximation and memory allocation */
  63. ngates = find_last_bit(data->mask, SUN6I_APB0_GATES_MAX_SIZE);
  64. clk_data->clks = devm_kcalloc(&pdev->dev, (ngates + 1),
  65. sizeof(struct clk *), GFP_KERNEL);
  66. if (!clk_data->clks)
  67. return -ENOMEM;
  68. for_each_set_bit(i, data->mask, SUN6I_APB0_GATES_MAX_SIZE) {
  69. of_property_read_string_index(np, "clock-output-names",
  70. j, &clk_name);
  71. clk_data->clks[i] = clk_register_gate(&pdev->dev, clk_name,
  72. clk_parent, 0, reg, i,
  73. 0, NULL);
  74. WARN_ON(IS_ERR(clk_data->clks[i]));
  75. clk_register_clkdev(clk_data->clks[i], clk_name, NULL);
  76. j++;
  77. }
  78. clk_data->clk_num = ngates + 1;
  79. return of_clk_add_provider(np, of_clk_src_onecell_get, clk_data);
  80. }
  81. static struct platform_driver sun6i_a31_apb0_gates_clk_driver = {
  82. .driver = {
  83. .name = "sun6i-a31-apb0-gates-clk",
  84. .of_match_table = sun6i_a31_apb0_gates_clk_dt_ids,
  85. },
  86. .probe = sun6i_a31_apb0_gates_clk_probe,
  87. };
  88. module_platform_driver(sun6i_a31_apb0_gates_clk_driver);
  89. MODULE_AUTHOR("Boris BREZILLON <boris.brezillon@free-electrons.com>");
  90. MODULE_DESCRIPTION("Allwinner A31 APB0 gate clocks driver");
  91. MODULE_LICENSE("GPL v2");