cpufreq-dt.c 12 KB

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  1. /*
  2. * Copyright (C) 2012 Freescale Semiconductor, Inc.
  3. *
  4. * Copyright (C) 2014 Linaro.
  5. * Viresh Kumar <viresh.kumar@linaro.org>
  6. *
  7. * The OPP code in function set_target() is reused from
  8. * drivers/cpufreq/omap-cpufreq.c
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  15. #include <linux/clk.h>
  16. #include <linux/cpu.h>
  17. #include <linux/cpu_cooling.h>
  18. #include <linux/cpufreq.h>
  19. #include <linux/cpufreq-dt.h>
  20. #include <linux/cpumask.h>
  21. #include <linux/err.h>
  22. #include <linux/module.h>
  23. #include <linux/of.h>
  24. #include <linux/pm_opp.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/regulator/consumer.h>
  27. #include <linux/slab.h>
  28. #include <linux/thermal.h>
  29. struct private_data {
  30. struct device *cpu_dev;
  31. struct regulator *cpu_reg;
  32. struct thermal_cooling_device *cdev;
  33. unsigned int voltage_tolerance; /* in percentage */
  34. };
  35. static struct freq_attr *cpufreq_dt_attr[] = {
  36. &cpufreq_freq_attr_scaling_available_freqs,
  37. NULL, /* Extra space for boost-attr if required */
  38. NULL,
  39. };
  40. static int set_target(struct cpufreq_policy *policy, unsigned int index)
  41. {
  42. struct dev_pm_opp *opp;
  43. struct cpufreq_frequency_table *freq_table = policy->freq_table;
  44. struct clk *cpu_clk = policy->clk;
  45. struct private_data *priv = policy->driver_data;
  46. struct device *cpu_dev = priv->cpu_dev;
  47. struct regulator *cpu_reg = priv->cpu_reg;
  48. unsigned long volt = 0, volt_old = 0, tol = 0;
  49. unsigned int old_freq, new_freq;
  50. long freq_Hz, freq_exact;
  51. int ret;
  52. freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
  53. if (freq_Hz <= 0)
  54. freq_Hz = freq_table[index].frequency * 1000;
  55. freq_exact = freq_Hz;
  56. new_freq = freq_Hz / 1000;
  57. old_freq = clk_get_rate(cpu_clk) / 1000;
  58. if (!IS_ERR(cpu_reg)) {
  59. unsigned long opp_freq;
  60. rcu_read_lock();
  61. opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
  62. if (IS_ERR(opp)) {
  63. rcu_read_unlock();
  64. dev_err(cpu_dev, "failed to find OPP for %ld\n",
  65. freq_Hz);
  66. return PTR_ERR(opp);
  67. }
  68. volt = dev_pm_opp_get_voltage(opp);
  69. opp_freq = dev_pm_opp_get_freq(opp);
  70. rcu_read_unlock();
  71. tol = volt * priv->voltage_tolerance / 100;
  72. volt_old = regulator_get_voltage(cpu_reg);
  73. dev_dbg(cpu_dev, "Found OPP: %ld kHz, %ld uV\n",
  74. opp_freq / 1000, volt);
  75. }
  76. dev_dbg(cpu_dev, "%u MHz, %ld mV --> %u MHz, %ld mV\n",
  77. old_freq / 1000, (volt_old > 0) ? volt_old / 1000 : -1,
  78. new_freq / 1000, volt ? volt / 1000 : -1);
  79. /* scaling up? scale voltage before frequency */
  80. if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
  81. ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
  82. if (ret) {
  83. dev_err(cpu_dev, "failed to scale voltage up: %d\n",
  84. ret);
  85. return ret;
  86. }
  87. }
  88. ret = clk_set_rate(cpu_clk, freq_exact);
  89. if (ret) {
  90. dev_err(cpu_dev, "failed to set clock rate: %d\n", ret);
  91. if (!IS_ERR(cpu_reg) && volt_old > 0)
  92. regulator_set_voltage_tol(cpu_reg, volt_old, tol);
  93. return ret;
  94. }
  95. /* scaling down? scale voltage after frequency */
  96. if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
  97. ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
  98. if (ret) {
  99. dev_err(cpu_dev, "failed to scale voltage down: %d\n",
  100. ret);
  101. clk_set_rate(cpu_clk, old_freq * 1000);
  102. }
  103. }
  104. return ret;
  105. }
  106. static int allocate_resources(int cpu, struct device **cdev,
  107. struct regulator **creg, struct clk **cclk)
  108. {
  109. struct device *cpu_dev;
  110. struct regulator *cpu_reg;
  111. struct clk *cpu_clk;
  112. int ret = 0;
  113. char *reg_cpu0 = "cpu0", *reg_cpu = "cpu", *reg;
  114. cpu_dev = get_cpu_device(cpu);
  115. if (!cpu_dev) {
  116. pr_err("failed to get cpu%d device\n", cpu);
  117. return -ENODEV;
  118. }
  119. /* Try "cpu0" for older DTs */
  120. if (!cpu)
  121. reg = reg_cpu0;
  122. else
  123. reg = reg_cpu;
  124. try_again:
  125. cpu_reg = regulator_get_optional(cpu_dev, reg);
  126. if (IS_ERR(cpu_reg)) {
  127. /*
  128. * If cpu's regulator supply node is present, but regulator is
  129. * not yet registered, we should try defering probe.
  130. */
  131. if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) {
  132. dev_dbg(cpu_dev, "cpu%d regulator not ready, retry\n",
  133. cpu);
  134. return -EPROBE_DEFER;
  135. }
  136. /* Try with "cpu-supply" */
  137. if (reg == reg_cpu0) {
  138. reg = reg_cpu;
  139. goto try_again;
  140. }
  141. dev_dbg(cpu_dev, "no regulator for cpu%d: %ld\n",
  142. cpu, PTR_ERR(cpu_reg));
  143. }
  144. cpu_clk = clk_get(cpu_dev, NULL);
  145. if (IS_ERR(cpu_clk)) {
  146. /* put regulator */
  147. if (!IS_ERR(cpu_reg))
  148. regulator_put(cpu_reg);
  149. ret = PTR_ERR(cpu_clk);
  150. /*
  151. * If cpu's clk node is present, but clock is not yet
  152. * registered, we should try defering probe.
  153. */
  154. if (ret == -EPROBE_DEFER)
  155. dev_dbg(cpu_dev, "cpu%d clock not ready, retry\n", cpu);
  156. else
  157. dev_err(cpu_dev, "failed to get cpu%d clock: %d\n", cpu,
  158. ret);
  159. } else {
  160. *cdev = cpu_dev;
  161. *creg = cpu_reg;
  162. *cclk = cpu_clk;
  163. }
  164. return ret;
  165. }
  166. static int cpufreq_init(struct cpufreq_policy *policy)
  167. {
  168. struct cpufreq_frequency_table *freq_table;
  169. struct device_node *np;
  170. struct private_data *priv;
  171. struct device *cpu_dev;
  172. struct regulator *cpu_reg;
  173. struct clk *cpu_clk;
  174. struct dev_pm_opp *suspend_opp;
  175. unsigned long min_uV = ~0, max_uV = 0;
  176. unsigned int transition_latency;
  177. bool need_update = false;
  178. int ret;
  179. ret = allocate_resources(policy->cpu, &cpu_dev, &cpu_reg, &cpu_clk);
  180. if (ret) {
  181. pr_err("%s: Failed to allocate resources: %d\n", __func__, ret);
  182. return ret;
  183. }
  184. np = of_node_get(cpu_dev->of_node);
  185. if (!np) {
  186. dev_err(cpu_dev, "failed to find cpu%d node\n", policy->cpu);
  187. ret = -ENOENT;
  188. goto out_put_reg_clk;
  189. }
  190. /* Get OPP-sharing information from "operating-points-v2" bindings */
  191. ret = dev_pm_opp_of_get_sharing_cpus(cpu_dev, policy->cpus);
  192. if (ret) {
  193. /*
  194. * operating-points-v2 not supported, fallback to old method of
  195. * finding shared-OPPs for backward compatibility.
  196. */
  197. if (ret == -ENOENT)
  198. need_update = true;
  199. else
  200. goto out_node_put;
  201. }
  202. /*
  203. * Initialize OPP tables for all policy->cpus. They will be shared by
  204. * all CPUs which have marked their CPUs shared with OPP bindings.
  205. *
  206. * For platforms not using operating-points-v2 bindings, we do this
  207. * before updating policy->cpus. Otherwise, we will end up creating
  208. * duplicate OPPs for policy->cpus.
  209. *
  210. * OPPs might be populated at runtime, don't check for error here
  211. */
  212. dev_pm_opp_of_cpumask_add_table(policy->cpus);
  213. /*
  214. * But we need OPP table to function so if it is not there let's
  215. * give platform code chance to provide it for us.
  216. */
  217. ret = dev_pm_opp_get_opp_count(cpu_dev);
  218. if (ret <= 0) {
  219. pr_debug("OPP table is not ready, deferring probe\n");
  220. ret = -EPROBE_DEFER;
  221. goto out_free_opp;
  222. }
  223. if (need_update) {
  224. struct cpufreq_dt_platform_data *pd = cpufreq_get_driver_data();
  225. if (!pd || !pd->independent_clocks)
  226. cpumask_setall(policy->cpus);
  227. /*
  228. * OPP tables are initialized only for policy->cpu, do it for
  229. * others as well.
  230. */
  231. ret = dev_pm_opp_set_sharing_cpus(cpu_dev, policy->cpus);
  232. if (ret)
  233. dev_err(cpu_dev, "%s: failed to mark OPPs as shared: %d\n",
  234. __func__, ret);
  235. of_property_read_u32(np, "clock-latency", &transition_latency);
  236. } else {
  237. transition_latency = dev_pm_opp_get_max_clock_latency(cpu_dev);
  238. }
  239. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  240. if (!priv) {
  241. ret = -ENOMEM;
  242. goto out_free_opp;
  243. }
  244. of_property_read_u32(np, "voltage-tolerance", &priv->voltage_tolerance);
  245. if (!transition_latency)
  246. transition_latency = CPUFREQ_ETERNAL;
  247. if (!IS_ERR(cpu_reg)) {
  248. unsigned long opp_freq = 0;
  249. /*
  250. * Disable any OPPs where the connected regulator isn't able to
  251. * provide the specified voltage and record minimum and maximum
  252. * voltage levels.
  253. */
  254. while (1) {
  255. struct dev_pm_opp *opp;
  256. unsigned long opp_uV, tol_uV;
  257. rcu_read_lock();
  258. opp = dev_pm_opp_find_freq_ceil(cpu_dev, &opp_freq);
  259. if (IS_ERR(opp)) {
  260. rcu_read_unlock();
  261. break;
  262. }
  263. opp_uV = dev_pm_opp_get_voltage(opp);
  264. rcu_read_unlock();
  265. tol_uV = opp_uV * priv->voltage_tolerance / 100;
  266. if (regulator_is_supported_voltage(cpu_reg,
  267. opp_uV - tol_uV,
  268. opp_uV + tol_uV)) {
  269. if (opp_uV < min_uV)
  270. min_uV = opp_uV;
  271. if (opp_uV > max_uV)
  272. max_uV = opp_uV;
  273. } else {
  274. dev_pm_opp_disable(cpu_dev, opp_freq);
  275. }
  276. opp_freq++;
  277. }
  278. ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
  279. if (ret > 0)
  280. transition_latency += ret * 1000;
  281. }
  282. ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
  283. if (ret) {
  284. pr_err("failed to init cpufreq table: %d\n", ret);
  285. goto out_free_priv;
  286. }
  287. priv->cpu_dev = cpu_dev;
  288. priv->cpu_reg = cpu_reg;
  289. policy->driver_data = priv;
  290. policy->clk = cpu_clk;
  291. rcu_read_lock();
  292. suspend_opp = dev_pm_opp_get_suspend_opp(cpu_dev);
  293. if (suspend_opp)
  294. policy->suspend_freq = dev_pm_opp_get_freq(suspend_opp) / 1000;
  295. rcu_read_unlock();
  296. ret = cpufreq_table_validate_and_show(policy, freq_table);
  297. if (ret) {
  298. dev_err(cpu_dev, "%s: invalid frequency table: %d\n", __func__,
  299. ret);
  300. goto out_free_cpufreq_table;
  301. }
  302. /* Support turbo/boost mode */
  303. if (policy_has_boost_freq(policy)) {
  304. /* This gets disabled by core on driver unregister */
  305. ret = cpufreq_enable_boost_support();
  306. if (ret)
  307. goto out_free_cpufreq_table;
  308. cpufreq_dt_attr[1] = &cpufreq_freq_attr_scaling_boost_freqs;
  309. }
  310. policy->cpuinfo.transition_latency = transition_latency;
  311. of_node_put(np);
  312. return 0;
  313. out_free_cpufreq_table:
  314. dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
  315. out_free_priv:
  316. kfree(priv);
  317. out_free_opp:
  318. dev_pm_opp_of_cpumask_remove_table(policy->cpus);
  319. out_node_put:
  320. of_node_put(np);
  321. out_put_reg_clk:
  322. clk_put(cpu_clk);
  323. if (!IS_ERR(cpu_reg))
  324. regulator_put(cpu_reg);
  325. return ret;
  326. }
  327. static int cpufreq_exit(struct cpufreq_policy *policy)
  328. {
  329. struct private_data *priv = policy->driver_data;
  330. cpufreq_cooling_unregister(priv->cdev);
  331. dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table);
  332. dev_pm_opp_of_cpumask_remove_table(policy->related_cpus);
  333. clk_put(policy->clk);
  334. if (!IS_ERR(priv->cpu_reg))
  335. regulator_put(priv->cpu_reg);
  336. kfree(priv);
  337. return 0;
  338. }
  339. static void cpufreq_ready(struct cpufreq_policy *policy)
  340. {
  341. struct private_data *priv = policy->driver_data;
  342. struct device_node *np = of_node_get(priv->cpu_dev->of_node);
  343. if (WARN_ON(!np))
  344. return;
  345. /*
  346. * For now, just loading the cooling device;
  347. * thermal DT code takes care of matching them.
  348. */
  349. if (of_find_property(np, "#cooling-cells", NULL)) {
  350. priv->cdev = of_cpufreq_cooling_register(np,
  351. policy->related_cpus);
  352. if (IS_ERR(priv->cdev)) {
  353. dev_err(priv->cpu_dev,
  354. "running cpufreq without cooling device: %ld\n",
  355. PTR_ERR(priv->cdev));
  356. priv->cdev = NULL;
  357. }
  358. }
  359. of_node_put(np);
  360. }
  361. static struct cpufreq_driver dt_cpufreq_driver = {
  362. .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
  363. .verify = cpufreq_generic_frequency_table_verify,
  364. .target_index = set_target,
  365. .get = cpufreq_generic_get,
  366. .init = cpufreq_init,
  367. .exit = cpufreq_exit,
  368. .ready = cpufreq_ready,
  369. .name = "cpufreq-dt",
  370. .attr = cpufreq_dt_attr,
  371. .suspend = cpufreq_generic_suspend,
  372. };
  373. static int dt_cpufreq_probe(struct platform_device *pdev)
  374. {
  375. struct device *cpu_dev;
  376. struct regulator *cpu_reg;
  377. struct clk *cpu_clk;
  378. int ret;
  379. /*
  380. * All per-cluster (CPUs sharing clock/voltages) initialization is done
  381. * from ->init(). In probe(), we just need to make sure that clk and
  382. * regulators are available. Else defer probe and retry.
  383. *
  384. * FIXME: Is checking this only for CPU0 sufficient ?
  385. */
  386. ret = allocate_resources(0, &cpu_dev, &cpu_reg, &cpu_clk);
  387. if (ret)
  388. return ret;
  389. clk_put(cpu_clk);
  390. if (!IS_ERR(cpu_reg))
  391. regulator_put(cpu_reg);
  392. dt_cpufreq_driver.driver_data = dev_get_platdata(&pdev->dev);
  393. ret = cpufreq_register_driver(&dt_cpufreq_driver);
  394. if (ret)
  395. dev_err(cpu_dev, "failed register driver: %d\n", ret);
  396. return ret;
  397. }
  398. static int dt_cpufreq_remove(struct platform_device *pdev)
  399. {
  400. cpufreq_unregister_driver(&dt_cpufreq_driver);
  401. return 0;
  402. }
  403. static struct platform_driver dt_cpufreq_platdrv = {
  404. .driver = {
  405. .name = "cpufreq-dt",
  406. },
  407. .probe = dt_cpufreq_probe,
  408. .remove = dt_cpufreq_remove,
  409. };
  410. module_platform_driver(dt_cpufreq_platdrv);
  411. MODULE_ALIAS("platform:cpufreq-dt");
  412. MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.org>");
  413. MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
  414. MODULE_DESCRIPTION("Generic cpufreq driver");
  415. MODULE_LICENSE("GPL");