cpuidle-exynos.c 3.4 KB

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  1. /*
  2. * Copyright (c) 2011-2014 Samsung Electronics Co., Ltd.
  3. * http://www.samsung.com
  4. *
  5. * Coupled cpuidle support based on the work of:
  6. * Colin Cross <ccross@android.com>
  7. * Daniel Lezcano <daniel.lezcano@linaro.org>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/cpuidle.h>
  14. #include <linux/cpu_pm.h>
  15. #include <linux/export.h>
  16. #include <linux/module.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/of.h>
  19. #include <linux/platform_data/cpuidle-exynos.h>
  20. #include <asm/suspend.h>
  21. #include <asm/cpuidle.h>
  22. static atomic_t exynos_idle_barrier;
  23. static struct cpuidle_exynos_data *exynos_cpuidle_pdata;
  24. static void (*exynos_enter_aftr)(void);
  25. static int exynos_enter_coupled_lowpower(struct cpuidle_device *dev,
  26. struct cpuidle_driver *drv,
  27. int index)
  28. {
  29. int ret;
  30. exynos_cpuidle_pdata->pre_enter_aftr();
  31. /*
  32. * Waiting all cpus to reach this point at the same moment
  33. */
  34. cpuidle_coupled_parallel_barrier(dev, &exynos_idle_barrier);
  35. /*
  36. * Both cpus will reach this point at the same time
  37. */
  38. ret = dev->cpu ? exynos_cpuidle_pdata->cpu1_powerdown()
  39. : exynos_cpuidle_pdata->cpu0_enter_aftr();
  40. if (ret)
  41. index = ret;
  42. /*
  43. * Waiting all cpus to finish the power sequence before going further
  44. */
  45. cpuidle_coupled_parallel_barrier(dev, &exynos_idle_barrier);
  46. exynos_cpuidle_pdata->post_enter_aftr();
  47. return index;
  48. }
  49. static int exynos_enter_lowpower(struct cpuidle_device *dev,
  50. struct cpuidle_driver *drv,
  51. int index)
  52. {
  53. int new_index = index;
  54. /* AFTR can only be entered when cores other than CPU0 are offline */
  55. if (num_online_cpus() > 1 || dev->cpu != 0)
  56. new_index = drv->safe_state_index;
  57. if (new_index == 0)
  58. return arm_cpuidle_simple_enter(dev, drv, new_index);
  59. exynos_enter_aftr();
  60. return new_index;
  61. }
  62. static struct cpuidle_driver exynos_idle_driver = {
  63. .name = "exynos_idle",
  64. .owner = THIS_MODULE,
  65. .states = {
  66. [0] = ARM_CPUIDLE_WFI_STATE,
  67. [1] = {
  68. .enter = exynos_enter_lowpower,
  69. .exit_latency = 300,
  70. .target_residency = 100000,
  71. .name = "C1",
  72. .desc = "ARM power down",
  73. },
  74. },
  75. .state_count = 2,
  76. .safe_state_index = 0,
  77. };
  78. static struct cpuidle_driver exynos_coupled_idle_driver = {
  79. .name = "exynos_coupled_idle",
  80. .owner = THIS_MODULE,
  81. .states = {
  82. [0] = ARM_CPUIDLE_WFI_STATE,
  83. [1] = {
  84. .enter = exynos_enter_coupled_lowpower,
  85. .exit_latency = 5000,
  86. .target_residency = 10000,
  87. .flags = CPUIDLE_FLAG_COUPLED |
  88. CPUIDLE_FLAG_TIMER_STOP,
  89. .name = "C1",
  90. .desc = "ARM power down",
  91. },
  92. },
  93. .state_count = 2,
  94. .safe_state_index = 0,
  95. };
  96. static int exynos_cpuidle_probe(struct platform_device *pdev)
  97. {
  98. int ret;
  99. if (IS_ENABLED(CONFIG_SMP) &&
  100. of_machine_is_compatible("samsung,exynos4210")) {
  101. exynos_cpuidle_pdata = pdev->dev.platform_data;
  102. ret = cpuidle_register(&exynos_coupled_idle_driver,
  103. cpu_possible_mask);
  104. } else {
  105. exynos_enter_aftr = (void *)(pdev->dev.platform_data);
  106. ret = cpuidle_register(&exynos_idle_driver, NULL);
  107. }
  108. if (ret) {
  109. dev_err(&pdev->dev, "failed to register cpuidle driver\n");
  110. return ret;
  111. }
  112. return 0;
  113. }
  114. static struct platform_driver exynos_cpuidle_driver = {
  115. .probe = exynos_cpuidle_probe,
  116. .driver = {
  117. .name = "exynos_cpuidle",
  118. },
  119. };
  120. module_platform_driver(exynos_cpuidle_driver);