ccp-dev.c 15 KB

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  1. /*
  2. * AMD Cryptographic Coprocessor (CCP) driver
  3. *
  4. * Copyright (C) 2013 Advanced Micro Devices, Inc.
  5. *
  6. * Author: Tom Lendacky <thomas.lendacky@amd.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/kthread.h>
  15. #include <linux/sched.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/spinlock.h>
  18. #include <linux/mutex.h>
  19. #include <linux/delay.h>
  20. #include <linux/hw_random.h>
  21. #include <linux/cpu.h>
  22. #ifdef CONFIG_X86
  23. #include <asm/cpu_device_id.h>
  24. #endif
  25. #include <linux/ccp.h>
  26. #include "ccp-dev.h"
  27. MODULE_AUTHOR("Tom Lendacky <thomas.lendacky@amd.com>");
  28. MODULE_LICENSE("GPL");
  29. MODULE_VERSION("1.0.0");
  30. MODULE_DESCRIPTION("AMD Cryptographic Coprocessor driver");
  31. struct ccp_tasklet_data {
  32. struct completion completion;
  33. struct ccp_cmd *cmd;
  34. };
  35. static struct ccp_device *ccp_dev;
  36. static inline struct ccp_device *ccp_get_device(void)
  37. {
  38. return ccp_dev;
  39. }
  40. static inline void ccp_add_device(struct ccp_device *ccp)
  41. {
  42. ccp_dev = ccp;
  43. }
  44. static inline void ccp_del_device(struct ccp_device *ccp)
  45. {
  46. ccp_dev = NULL;
  47. }
  48. /**
  49. * ccp_present - check if a CCP device is present
  50. *
  51. * Returns zero if a CCP device is present, -ENODEV otherwise.
  52. */
  53. int ccp_present(void)
  54. {
  55. if (ccp_get_device())
  56. return 0;
  57. return -ENODEV;
  58. }
  59. EXPORT_SYMBOL_GPL(ccp_present);
  60. /**
  61. * ccp_enqueue_cmd - queue an operation for processing by the CCP
  62. *
  63. * @cmd: ccp_cmd struct to be processed
  64. *
  65. * Queue a cmd to be processed by the CCP. If queueing the cmd
  66. * would exceed the defined length of the cmd queue the cmd will
  67. * only be queued if the CCP_CMD_MAY_BACKLOG flag is set and will
  68. * result in a return code of -EBUSY.
  69. *
  70. * The callback routine specified in the ccp_cmd struct will be
  71. * called to notify the caller of completion (if the cmd was not
  72. * backlogged) or advancement out of the backlog. If the cmd has
  73. * advanced out of the backlog the "err" value of the callback
  74. * will be -EINPROGRESS. Any other "err" value during callback is
  75. * the result of the operation.
  76. *
  77. * The cmd has been successfully queued if:
  78. * the return code is -EINPROGRESS or
  79. * the return code is -EBUSY and CCP_CMD_MAY_BACKLOG flag is set
  80. */
  81. int ccp_enqueue_cmd(struct ccp_cmd *cmd)
  82. {
  83. struct ccp_device *ccp = ccp_get_device();
  84. unsigned long flags;
  85. unsigned int i;
  86. int ret;
  87. if (!ccp)
  88. return -ENODEV;
  89. /* Caller must supply a callback routine */
  90. if (!cmd->callback)
  91. return -EINVAL;
  92. cmd->ccp = ccp;
  93. spin_lock_irqsave(&ccp->cmd_lock, flags);
  94. i = ccp->cmd_q_count;
  95. if (ccp->cmd_count >= MAX_CMD_QLEN) {
  96. ret = -EBUSY;
  97. if (cmd->flags & CCP_CMD_MAY_BACKLOG)
  98. list_add_tail(&cmd->entry, &ccp->backlog);
  99. } else {
  100. ret = -EINPROGRESS;
  101. ccp->cmd_count++;
  102. list_add_tail(&cmd->entry, &ccp->cmd);
  103. /* Find an idle queue */
  104. if (!ccp->suspending) {
  105. for (i = 0; i < ccp->cmd_q_count; i++) {
  106. if (ccp->cmd_q[i].active)
  107. continue;
  108. break;
  109. }
  110. }
  111. }
  112. spin_unlock_irqrestore(&ccp->cmd_lock, flags);
  113. /* If we found an idle queue, wake it up */
  114. if (i < ccp->cmd_q_count)
  115. wake_up_process(ccp->cmd_q[i].kthread);
  116. return ret;
  117. }
  118. EXPORT_SYMBOL_GPL(ccp_enqueue_cmd);
  119. static void ccp_do_cmd_backlog(struct work_struct *work)
  120. {
  121. struct ccp_cmd *cmd = container_of(work, struct ccp_cmd, work);
  122. struct ccp_device *ccp = cmd->ccp;
  123. unsigned long flags;
  124. unsigned int i;
  125. cmd->callback(cmd->data, -EINPROGRESS);
  126. spin_lock_irqsave(&ccp->cmd_lock, flags);
  127. ccp->cmd_count++;
  128. list_add_tail(&cmd->entry, &ccp->cmd);
  129. /* Find an idle queue */
  130. for (i = 0; i < ccp->cmd_q_count; i++) {
  131. if (ccp->cmd_q[i].active)
  132. continue;
  133. break;
  134. }
  135. spin_unlock_irqrestore(&ccp->cmd_lock, flags);
  136. /* If we found an idle queue, wake it up */
  137. if (i < ccp->cmd_q_count)
  138. wake_up_process(ccp->cmd_q[i].kthread);
  139. }
  140. static struct ccp_cmd *ccp_dequeue_cmd(struct ccp_cmd_queue *cmd_q)
  141. {
  142. struct ccp_device *ccp = cmd_q->ccp;
  143. struct ccp_cmd *cmd = NULL;
  144. struct ccp_cmd *backlog = NULL;
  145. unsigned long flags;
  146. spin_lock_irqsave(&ccp->cmd_lock, flags);
  147. cmd_q->active = 0;
  148. if (ccp->suspending) {
  149. cmd_q->suspended = 1;
  150. spin_unlock_irqrestore(&ccp->cmd_lock, flags);
  151. wake_up_interruptible(&ccp->suspend_queue);
  152. return NULL;
  153. }
  154. if (ccp->cmd_count) {
  155. cmd_q->active = 1;
  156. cmd = list_first_entry(&ccp->cmd, struct ccp_cmd, entry);
  157. list_del(&cmd->entry);
  158. ccp->cmd_count--;
  159. }
  160. if (!list_empty(&ccp->backlog)) {
  161. backlog = list_first_entry(&ccp->backlog, struct ccp_cmd,
  162. entry);
  163. list_del(&backlog->entry);
  164. }
  165. spin_unlock_irqrestore(&ccp->cmd_lock, flags);
  166. if (backlog) {
  167. INIT_WORK(&backlog->work, ccp_do_cmd_backlog);
  168. schedule_work(&backlog->work);
  169. }
  170. return cmd;
  171. }
  172. static void ccp_do_cmd_complete(unsigned long data)
  173. {
  174. struct ccp_tasklet_data *tdata = (struct ccp_tasklet_data *)data;
  175. struct ccp_cmd *cmd = tdata->cmd;
  176. cmd->callback(cmd->data, cmd->ret);
  177. complete(&tdata->completion);
  178. }
  179. static int ccp_cmd_queue_thread(void *data)
  180. {
  181. struct ccp_cmd_queue *cmd_q = (struct ccp_cmd_queue *)data;
  182. struct ccp_cmd *cmd;
  183. struct ccp_tasklet_data tdata;
  184. struct tasklet_struct tasklet;
  185. tasklet_init(&tasklet, ccp_do_cmd_complete, (unsigned long)&tdata);
  186. set_current_state(TASK_INTERRUPTIBLE);
  187. while (!kthread_should_stop()) {
  188. schedule();
  189. set_current_state(TASK_INTERRUPTIBLE);
  190. cmd = ccp_dequeue_cmd(cmd_q);
  191. if (!cmd)
  192. continue;
  193. __set_current_state(TASK_RUNNING);
  194. /* Execute the command */
  195. cmd->ret = ccp_run_cmd(cmd_q, cmd);
  196. /* Schedule the completion callback */
  197. tdata.cmd = cmd;
  198. init_completion(&tdata.completion);
  199. tasklet_schedule(&tasklet);
  200. wait_for_completion(&tdata.completion);
  201. }
  202. __set_current_state(TASK_RUNNING);
  203. return 0;
  204. }
  205. static int ccp_trng_read(struct hwrng *rng, void *data, size_t max, bool wait)
  206. {
  207. struct ccp_device *ccp = container_of(rng, struct ccp_device, hwrng);
  208. u32 trng_value;
  209. int len = min_t(int, sizeof(trng_value), max);
  210. /*
  211. * Locking is provided by the caller so we can update device
  212. * hwrng-related fields safely
  213. */
  214. trng_value = ioread32(ccp->io_regs + TRNG_OUT_REG);
  215. if (!trng_value) {
  216. /* Zero is returned if not data is available or if a
  217. * bad-entropy error is present. Assume an error if
  218. * we exceed TRNG_RETRIES reads of zero.
  219. */
  220. if (ccp->hwrng_retries++ > TRNG_RETRIES)
  221. return -EIO;
  222. return 0;
  223. }
  224. /* Reset the counter and save the rng value */
  225. ccp->hwrng_retries = 0;
  226. memcpy(data, &trng_value, len);
  227. return len;
  228. }
  229. /**
  230. * ccp_alloc_struct - allocate and initialize the ccp_device struct
  231. *
  232. * @dev: device struct of the CCP
  233. */
  234. struct ccp_device *ccp_alloc_struct(struct device *dev)
  235. {
  236. struct ccp_device *ccp;
  237. ccp = devm_kzalloc(dev, sizeof(*ccp), GFP_KERNEL);
  238. if (!ccp)
  239. return NULL;
  240. ccp->dev = dev;
  241. INIT_LIST_HEAD(&ccp->cmd);
  242. INIT_LIST_HEAD(&ccp->backlog);
  243. spin_lock_init(&ccp->cmd_lock);
  244. mutex_init(&ccp->req_mutex);
  245. mutex_init(&ccp->ksb_mutex);
  246. ccp->ksb_count = KSB_COUNT;
  247. ccp->ksb_start = 0;
  248. return ccp;
  249. }
  250. /**
  251. * ccp_init - initialize the CCP device
  252. *
  253. * @ccp: ccp_device struct
  254. */
  255. int ccp_init(struct ccp_device *ccp)
  256. {
  257. struct device *dev = ccp->dev;
  258. struct ccp_cmd_queue *cmd_q;
  259. struct dma_pool *dma_pool;
  260. char dma_pool_name[MAX_DMAPOOL_NAME_LEN];
  261. unsigned int qmr, qim, i;
  262. int ret;
  263. /* Find available queues */
  264. qim = 0;
  265. qmr = ioread32(ccp->io_regs + Q_MASK_REG);
  266. for (i = 0; i < MAX_HW_QUEUES; i++) {
  267. if (!(qmr & (1 << i)))
  268. continue;
  269. /* Allocate a dma pool for this queue */
  270. snprintf(dma_pool_name, sizeof(dma_pool_name), "ccp_q%d", i);
  271. dma_pool = dma_pool_create(dma_pool_name, dev,
  272. CCP_DMAPOOL_MAX_SIZE,
  273. CCP_DMAPOOL_ALIGN, 0);
  274. if (!dma_pool) {
  275. dev_err(dev, "unable to allocate dma pool\n");
  276. ret = -ENOMEM;
  277. goto e_pool;
  278. }
  279. cmd_q = &ccp->cmd_q[ccp->cmd_q_count];
  280. ccp->cmd_q_count++;
  281. cmd_q->ccp = ccp;
  282. cmd_q->id = i;
  283. cmd_q->dma_pool = dma_pool;
  284. /* Reserve 2 KSB regions for the queue */
  285. cmd_q->ksb_key = KSB_START + ccp->ksb_start++;
  286. cmd_q->ksb_ctx = KSB_START + ccp->ksb_start++;
  287. ccp->ksb_count -= 2;
  288. /* Preset some register values and masks that are queue
  289. * number dependent
  290. */
  291. cmd_q->reg_status = ccp->io_regs + CMD_Q_STATUS_BASE +
  292. (CMD_Q_STATUS_INCR * i);
  293. cmd_q->reg_int_status = ccp->io_regs + CMD_Q_INT_STATUS_BASE +
  294. (CMD_Q_STATUS_INCR * i);
  295. cmd_q->int_ok = 1 << (i * 2);
  296. cmd_q->int_err = 1 << ((i * 2) + 1);
  297. cmd_q->free_slots = CMD_Q_DEPTH(ioread32(cmd_q->reg_status));
  298. init_waitqueue_head(&cmd_q->int_queue);
  299. /* Build queue interrupt mask (two interrupts per queue) */
  300. qim |= cmd_q->int_ok | cmd_q->int_err;
  301. #ifdef CONFIG_ARM64
  302. /* For arm64 set the recommended queue cache settings */
  303. iowrite32(ccp->axcache, ccp->io_regs + CMD_Q_CACHE_BASE +
  304. (CMD_Q_CACHE_INC * i));
  305. #endif
  306. dev_dbg(dev, "queue #%u available\n", i);
  307. }
  308. if (ccp->cmd_q_count == 0) {
  309. dev_notice(dev, "no command queues available\n");
  310. ret = -EIO;
  311. goto e_pool;
  312. }
  313. dev_notice(dev, "%u command queues available\n", ccp->cmd_q_count);
  314. /* Disable and clear interrupts until ready */
  315. iowrite32(0x00, ccp->io_regs + IRQ_MASK_REG);
  316. for (i = 0; i < ccp->cmd_q_count; i++) {
  317. cmd_q = &ccp->cmd_q[i];
  318. ioread32(cmd_q->reg_int_status);
  319. ioread32(cmd_q->reg_status);
  320. }
  321. iowrite32(qim, ccp->io_regs + IRQ_STATUS_REG);
  322. /* Request an irq */
  323. ret = ccp->get_irq(ccp);
  324. if (ret) {
  325. dev_err(dev, "unable to allocate an IRQ\n");
  326. goto e_pool;
  327. }
  328. /* Initialize the queues used to wait for KSB space and suspend */
  329. init_waitqueue_head(&ccp->ksb_queue);
  330. init_waitqueue_head(&ccp->suspend_queue);
  331. /* Create a kthread for each queue */
  332. for (i = 0; i < ccp->cmd_q_count; i++) {
  333. struct task_struct *kthread;
  334. cmd_q = &ccp->cmd_q[i];
  335. kthread = kthread_create(ccp_cmd_queue_thread, cmd_q,
  336. "ccp-q%u", cmd_q->id);
  337. if (IS_ERR(kthread)) {
  338. dev_err(dev, "error creating queue thread (%ld)\n",
  339. PTR_ERR(kthread));
  340. ret = PTR_ERR(kthread);
  341. goto e_kthread;
  342. }
  343. cmd_q->kthread = kthread;
  344. wake_up_process(kthread);
  345. }
  346. /* Register the RNG */
  347. ccp->hwrng.name = "ccp-rng";
  348. ccp->hwrng.read = ccp_trng_read;
  349. ret = hwrng_register(&ccp->hwrng);
  350. if (ret) {
  351. dev_err(dev, "error registering hwrng (%d)\n", ret);
  352. goto e_kthread;
  353. }
  354. /* Make the device struct available before enabling interrupts */
  355. ccp_add_device(ccp);
  356. /* Enable interrupts */
  357. iowrite32(qim, ccp->io_regs + IRQ_MASK_REG);
  358. return 0;
  359. e_kthread:
  360. for (i = 0; i < ccp->cmd_q_count; i++)
  361. if (ccp->cmd_q[i].kthread)
  362. kthread_stop(ccp->cmd_q[i].kthread);
  363. ccp->free_irq(ccp);
  364. e_pool:
  365. for (i = 0; i < ccp->cmd_q_count; i++)
  366. dma_pool_destroy(ccp->cmd_q[i].dma_pool);
  367. return ret;
  368. }
  369. /**
  370. * ccp_destroy - tear down the CCP device
  371. *
  372. * @ccp: ccp_device struct
  373. */
  374. void ccp_destroy(struct ccp_device *ccp)
  375. {
  376. struct ccp_cmd_queue *cmd_q;
  377. struct ccp_cmd *cmd;
  378. unsigned int qim, i;
  379. /* Remove general access to the device struct */
  380. ccp_del_device(ccp);
  381. /* Unregister the RNG */
  382. hwrng_unregister(&ccp->hwrng);
  383. /* Stop the queue kthreads */
  384. for (i = 0; i < ccp->cmd_q_count; i++)
  385. if (ccp->cmd_q[i].kthread)
  386. kthread_stop(ccp->cmd_q[i].kthread);
  387. /* Build queue interrupt mask (two interrupt masks per queue) */
  388. qim = 0;
  389. for (i = 0; i < ccp->cmd_q_count; i++) {
  390. cmd_q = &ccp->cmd_q[i];
  391. qim |= cmd_q->int_ok | cmd_q->int_err;
  392. }
  393. /* Disable and clear interrupts */
  394. iowrite32(0x00, ccp->io_regs + IRQ_MASK_REG);
  395. for (i = 0; i < ccp->cmd_q_count; i++) {
  396. cmd_q = &ccp->cmd_q[i];
  397. ioread32(cmd_q->reg_int_status);
  398. ioread32(cmd_q->reg_status);
  399. }
  400. iowrite32(qim, ccp->io_regs + IRQ_STATUS_REG);
  401. ccp->free_irq(ccp);
  402. for (i = 0; i < ccp->cmd_q_count; i++)
  403. dma_pool_destroy(ccp->cmd_q[i].dma_pool);
  404. /* Flush the cmd and backlog queue */
  405. while (!list_empty(&ccp->cmd)) {
  406. /* Invoke the callback directly with an error code */
  407. cmd = list_first_entry(&ccp->cmd, struct ccp_cmd, entry);
  408. list_del(&cmd->entry);
  409. cmd->callback(cmd->data, -ENODEV);
  410. }
  411. while (!list_empty(&ccp->backlog)) {
  412. /* Invoke the callback directly with an error code */
  413. cmd = list_first_entry(&ccp->backlog, struct ccp_cmd, entry);
  414. list_del(&cmd->entry);
  415. cmd->callback(cmd->data, -ENODEV);
  416. }
  417. }
  418. /**
  419. * ccp_irq_handler - handle interrupts generated by the CCP device
  420. *
  421. * @irq: the irq associated with the interrupt
  422. * @data: the data value supplied when the irq was created
  423. */
  424. irqreturn_t ccp_irq_handler(int irq, void *data)
  425. {
  426. struct device *dev = data;
  427. struct ccp_device *ccp = dev_get_drvdata(dev);
  428. struct ccp_cmd_queue *cmd_q;
  429. u32 q_int, status;
  430. unsigned int i;
  431. status = ioread32(ccp->io_regs + IRQ_STATUS_REG);
  432. for (i = 0; i < ccp->cmd_q_count; i++) {
  433. cmd_q = &ccp->cmd_q[i];
  434. q_int = status & (cmd_q->int_ok | cmd_q->int_err);
  435. if (q_int) {
  436. cmd_q->int_status = status;
  437. cmd_q->q_status = ioread32(cmd_q->reg_status);
  438. cmd_q->q_int_status = ioread32(cmd_q->reg_int_status);
  439. /* On error, only save the first error value */
  440. if ((q_int & cmd_q->int_err) && !cmd_q->cmd_error)
  441. cmd_q->cmd_error = CMD_Q_ERROR(cmd_q->q_status);
  442. cmd_q->int_rcvd = 1;
  443. /* Acknowledge the interrupt and wake the kthread */
  444. iowrite32(q_int, ccp->io_regs + IRQ_STATUS_REG);
  445. wake_up_interruptible(&cmd_q->int_queue);
  446. }
  447. }
  448. return IRQ_HANDLED;
  449. }
  450. #ifdef CONFIG_PM
  451. bool ccp_queues_suspended(struct ccp_device *ccp)
  452. {
  453. unsigned int suspended = 0;
  454. unsigned long flags;
  455. unsigned int i;
  456. spin_lock_irqsave(&ccp->cmd_lock, flags);
  457. for (i = 0; i < ccp->cmd_q_count; i++)
  458. if (ccp->cmd_q[i].suspended)
  459. suspended++;
  460. spin_unlock_irqrestore(&ccp->cmd_lock, flags);
  461. return ccp->cmd_q_count == suspended;
  462. }
  463. #endif
  464. #ifdef CONFIG_X86
  465. static const struct x86_cpu_id ccp_support[] = {
  466. { X86_VENDOR_AMD, 22, },
  467. { },
  468. };
  469. #endif
  470. static int __init ccp_mod_init(void)
  471. {
  472. #ifdef CONFIG_X86
  473. struct cpuinfo_x86 *cpuinfo = &boot_cpu_data;
  474. int ret;
  475. if (!x86_match_cpu(ccp_support))
  476. return -ENODEV;
  477. switch (cpuinfo->x86) {
  478. case 22:
  479. if ((cpuinfo->x86_model < 48) || (cpuinfo->x86_model > 63))
  480. return -ENODEV;
  481. ret = ccp_pci_init();
  482. if (ret)
  483. return ret;
  484. /* Don't leave the driver loaded if init failed */
  485. if (!ccp_get_device()) {
  486. ccp_pci_exit();
  487. return -ENODEV;
  488. }
  489. return 0;
  490. break;
  491. }
  492. #endif
  493. #ifdef CONFIG_ARM64
  494. int ret;
  495. ret = ccp_platform_init();
  496. if (ret)
  497. return ret;
  498. /* Don't leave the driver loaded if init failed */
  499. if (!ccp_get_device()) {
  500. ccp_platform_exit();
  501. return -ENODEV;
  502. }
  503. return 0;
  504. #endif
  505. return -ENODEV;
  506. }
  507. static void __exit ccp_mod_exit(void)
  508. {
  509. #ifdef CONFIG_X86
  510. struct cpuinfo_x86 *cpuinfo = &boot_cpu_data;
  511. switch (cpuinfo->x86) {
  512. case 22:
  513. ccp_pci_exit();
  514. break;
  515. }
  516. #endif
  517. #ifdef CONFIG_ARM64
  518. ccp_platform_exit();
  519. #endif
  520. }
  521. module_init(ccp_mod_init);
  522. module_exit(ccp_mod_exit);