adf_drv.c 12 KB

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  1. /*
  2. This file is provided under a dual BSD/GPLv2 license. When using or
  3. redistributing this file, you may do so under either license.
  4. GPL LICENSE SUMMARY
  5. Copyright(c) 2014 Intel Corporation.
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of version 2 of the GNU General Public License as
  8. published by the Free Software Foundation.
  9. This program is distributed in the hope that it will be useful, but
  10. WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. General Public License for more details.
  13. Contact Information:
  14. qat-linux@intel.com
  15. BSD LICENSE
  16. Copyright(c) 2014 Intel Corporation.
  17. Redistribution and use in source and binary forms, with or without
  18. modification, are permitted provided that the following conditions
  19. are met:
  20. * Redistributions of source code must retain the above copyright
  21. notice, this list of conditions and the following disclaimer.
  22. * Redistributions in binary form must reproduce the above copyright
  23. notice, this list of conditions and the following disclaimer in
  24. the documentation and/or other materials provided with the
  25. distribution.
  26. * Neither the name of Intel Corporation nor the names of its
  27. contributors may be used to endorse or promote products derived
  28. from this software without specific prior written permission.
  29. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  30. "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  31. LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  32. A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  33. OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  34. SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  35. LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  36. DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  37. THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  38. (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  39. OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40. */
  41. #include <linux/kernel.h>
  42. #include <linux/module.h>
  43. #include <linux/pci.h>
  44. #include <linux/init.h>
  45. #include <linux/types.h>
  46. #include <linux/fs.h>
  47. #include <linux/slab.h>
  48. #include <linux/errno.h>
  49. #include <linux/device.h>
  50. #include <linux/dma-mapping.h>
  51. #include <linux/platform_device.h>
  52. #include <linux/workqueue.h>
  53. #include <linux/io.h>
  54. #include <adf_accel_devices.h>
  55. #include <adf_common_drv.h>
  56. #include <adf_cfg.h>
  57. #include <adf_transport_access_macros.h>
  58. #include "adf_dh895xcc_hw_data.h"
  59. #include "adf_drv.h"
  60. static const char adf_driver_name[] = ADF_DH895XCC_DEVICE_NAME;
  61. #define ADF_SYSTEM_DEVICE(device_id) \
  62. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  63. static const struct pci_device_id adf_pci_tbl[] = {
  64. ADF_SYSTEM_DEVICE(ADF_DH895XCC_PCI_DEVICE_ID),
  65. {0,}
  66. };
  67. MODULE_DEVICE_TABLE(pci, adf_pci_tbl);
  68. static int adf_probe(struct pci_dev *dev, const struct pci_device_id *ent);
  69. static void adf_remove(struct pci_dev *dev);
  70. static struct pci_driver adf_driver = {
  71. .id_table = adf_pci_tbl,
  72. .name = adf_driver_name,
  73. .probe = adf_probe,
  74. .remove = adf_remove,
  75. .sriov_configure = adf_sriov_configure,
  76. };
  77. static void adf_cleanup_pci_dev(struct adf_accel_dev *accel_dev)
  78. {
  79. pci_release_regions(accel_dev->accel_pci_dev.pci_dev);
  80. pci_disable_device(accel_dev->accel_pci_dev.pci_dev);
  81. }
  82. static void adf_cleanup_accel(struct adf_accel_dev *accel_dev)
  83. {
  84. struct adf_accel_pci *accel_pci_dev = &accel_dev->accel_pci_dev;
  85. int i;
  86. for (i = 0; i < ADF_PCI_MAX_BARS; i++) {
  87. struct adf_bar *bar = &accel_pci_dev->pci_bars[i];
  88. if (bar->virt_addr)
  89. pci_iounmap(accel_pci_dev->pci_dev, bar->virt_addr);
  90. }
  91. if (accel_dev->hw_device) {
  92. switch (accel_pci_dev->pci_dev->device) {
  93. case ADF_DH895XCC_PCI_DEVICE_ID:
  94. adf_clean_hw_data_dh895xcc(accel_dev->hw_device);
  95. break;
  96. default:
  97. break;
  98. }
  99. kfree(accel_dev->hw_device);
  100. accel_dev->hw_device = NULL;
  101. }
  102. adf_cfg_dev_remove(accel_dev);
  103. debugfs_remove(accel_dev->debugfs_dir);
  104. adf_devmgr_rm_dev(accel_dev, NULL);
  105. }
  106. static int adf_dev_configure(struct adf_accel_dev *accel_dev)
  107. {
  108. int cpus = num_online_cpus();
  109. int banks = GET_MAX_BANKS(accel_dev);
  110. int instances = min(cpus, banks);
  111. char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES];
  112. int i;
  113. unsigned long val;
  114. if (adf_cfg_section_add(accel_dev, ADF_KERNEL_SEC))
  115. goto err;
  116. if (adf_cfg_section_add(accel_dev, "Accelerator0"))
  117. goto err;
  118. for (i = 0; i < instances; i++) {
  119. val = i;
  120. snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_BANK_NUM, i);
  121. if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
  122. key, (void *)&val, ADF_DEC))
  123. goto err;
  124. snprintf(key, sizeof(key), ADF_CY "%d" ADF_ETRMGR_CORE_AFFINITY,
  125. i);
  126. if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
  127. key, (void *)&val, ADF_DEC))
  128. goto err;
  129. snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_SIZE, i);
  130. val = 128;
  131. if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
  132. key, (void *)&val, ADF_DEC))
  133. goto err;
  134. val = 512;
  135. snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_SIZE, i);
  136. if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
  137. key, (void *)&val, ADF_DEC))
  138. goto err;
  139. val = 0;
  140. snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_TX, i);
  141. if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
  142. key, (void *)&val, ADF_DEC))
  143. goto err;
  144. val = 2;
  145. snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_TX, i);
  146. if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
  147. key, (void *)&val, ADF_DEC))
  148. goto err;
  149. val = 8;
  150. snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_RX, i);
  151. if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
  152. key, (void *)&val, ADF_DEC))
  153. goto err;
  154. val = 10;
  155. snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_RX, i);
  156. if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
  157. key, (void *)&val, ADF_DEC))
  158. goto err;
  159. val = ADF_COALESCING_DEF_TIME;
  160. snprintf(key, sizeof(key), ADF_ETRMGR_COALESCE_TIMER_FORMAT, i);
  161. if (adf_cfg_add_key_value_param(accel_dev, "Accelerator0",
  162. key, (void *)&val, ADF_DEC))
  163. goto err;
  164. }
  165. val = i;
  166. if (adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
  167. ADF_NUM_CY, (void *)&val, ADF_DEC))
  168. goto err;
  169. set_bit(ADF_STATUS_CONFIGURED, &accel_dev->status);
  170. return 0;
  171. err:
  172. dev_err(&GET_DEV(accel_dev), "Failed to start QAT accel dev\n");
  173. return -EINVAL;
  174. }
  175. static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  176. {
  177. struct adf_accel_dev *accel_dev;
  178. struct adf_accel_pci *accel_pci_dev;
  179. struct adf_hw_device_data *hw_data;
  180. char name[ADF_DEVICE_NAME_LENGTH];
  181. unsigned int i, bar_nr;
  182. int ret, bar_mask;
  183. switch (ent->device) {
  184. case ADF_DH895XCC_PCI_DEVICE_ID:
  185. break;
  186. default:
  187. dev_err(&pdev->dev, "Invalid device 0x%x.\n", ent->device);
  188. return -ENODEV;
  189. }
  190. if (num_possible_nodes() > 1 && dev_to_node(&pdev->dev) < 0) {
  191. /* If the accelerator is connected to a node with no memory
  192. * there is no point in using the accelerator since the remote
  193. * memory transaction will be very slow. */
  194. dev_err(&pdev->dev, "Invalid NUMA configuration.\n");
  195. return -EINVAL;
  196. }
  197. accel_dev = kzalloc_node(sizeof(*accel_dev), GFP_KERNEL,
  198. dev_to_node(&pdev->dev));
  199. if (!accel_dev)
  200. return -ENOMEM;
  201. INIT_LIST_HEAD(&accel_dev->crypto_list);
  202. accel_pci_dev = &accel_dev->accel_pci_dev;
  203. accel_pci_dev->pci_dev = pdev;
  204. /* Add accel device to accel table.
  205. * This should be called before adf_cleanup_accel is called */
  206. if (adf_devmgr_add_dev(accel_dev, NULL)) {
  207. dev_err(&pdev->dev, "Failed to add new accelerator device.\n");
  208. kfree(accel_dev);
  209. return -EFAULT;
  210. }
  211. accel_dev->owner = THIS_MODULE;
  212. /* Allocate and configure device configuration structure */
  213. hw_data = kzalloc_node(sizeof(*hw_data), GFP_KERNEL,
  214. dev_to_node(&pdev->dev));
  215. if (!hw_data) {
  216. ret = -ENOMEM;
  217. goto out_err;
  218. }
  219. accel_dev->hw_device = hw_data;
  220. switch (ent->device) {
  221. case ADF_DH895XCC_PCI_DEVICE_ID:
  222. adf_init_hw_data_dh895xcc(accel_dev->hw_device);
  223. break;
  224. default:
  225. return -ENODEV;
  226. }
  227. pci_read_config_byte(pdev, PCI_REVISION_ID, &accel_pci_dev->revid);
  228. pci_read_config_dword(pdev, ADF_DH895XCC_FUSECTL_OFFSET,
  229. &hw_data->fuses);
  230. /* Get Accelerators and Accelerators Engines masks */
  231. hw_data->accel_mask = hw_data->get_accel_mask(hw_data->fuses);
  232. hw_data->ae_mask = hw_data->get_ae_mask(hw_data->fuses);
  233. accel_pci_dev->sku = hw_data->get_sku(hw_data);
  234. /* If the device has no acceleration engines then ignore it. */
  235. if (!hw_data->accel_mask || !hw_data->ae_mask ||
  236. ((~hw_data->ae_mask) & 0x01)) {
  237. dev_err(&pdev->dev, "No acceleration units found");
  238. ret = -EFAULT;
  239. goto out_err;
  240. }
  241. /* Create dev top level debugfs entry */
  242. snprintf(name, sizeof(name), "%s%s_%02x:%02d.%02d",
  243. ADF_DEVICE_NAME_PREFIX, hw_data->dev_class->name,
  244. pdev->bus->number, PCI_SLOT(pdev->devfn),
  245. PCI_FUNC(pdev->devfn));
  246. accel_dev->debugfs_dir = debugfs_create_dir(name, NULL);
  247. if (!accel_dev->debugfs_dir) {
  248. dev_err(&pdev->dev, "Could not create debugfs dir %s\n", name);
  249. ret = -EINVAL;
  250. goto out_err;
  251. }
  252. /* Create device configuration table */
  253. ret = adf_cfg_dev_add(accel_dev);
  254. if (ret)
  255. goto out_err;
  256. pcie_set_readrq(pdev, 1024);
  257. /* enable PCI device */
  258. if (pci_enable_device(pdev)) {
  259. ret = -EFAULT;
  260. goto out_err;
  261. }
  262. /* set dma identifier */
  263. if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
  264. if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) {
  265. dev_err(&pdev->dev, "No usable DMA configuration\n");
  266. ret = -EFAULT;
  267. goto out_err_disable;
  268. } else {
  269. pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  270. }
  271. } else {
  272. pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
  273. }
  274. if (pci_request_regions(pdev, adf_driver_name)) {
  275. ret = -EFAULT;
  276. goto out_err_disable;
  277. }
  278. /* Read accelerator capabilities mask */
  279. pci_read_config_dword(pdev, ADF_DH895XCC_LEGFUSE_OFFSET,
  280. &hw_data->accel_capabilities_mask);
  281. /* Find and map all the device's BARS */
  282. i = 0;
  283. bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
  284. for_each_set_bit(bar_nr, (const unsigned long *)&bar_mask,
  285. ADF_PCI_MAX_BARS * 2) {
  286. struct adf_bar *bar = &accel_pci_dev->pci_bars[i++];
  287. bar->base_addr = pci_resource_start(pdev, bar_nr);
  288. if (!bar->base_addr)
  289. break;
  290. bar->size = pci_resource_len(pdev, bar_nr);
  291. bar->virt_addr = pci_iomap(accel_pci_dev->pci_dev, bar_nr, 0);
  292. if (!bar->virt_addr) {
  293. dev_err(&pdev->dev, "Failed to map BAR %d\n", bar_nr);
  294. ret = -EFAULT;
  295. goto out_err_free_reg;
  296. }
  297. }
  298. pci_set_master(pdev);
  299. if (adf_enable_aer(accel_dev, &adf_driver)) {
  300. dev_err(&pdev->dev, "Failed to enable aer\n");
  301. ret = -EFAULT;
  302. goto out_err_free_reg;
  303. }
  304. if (pci_save_state(pdev)) {
  305. dev_err(&pdev->dev, "Failed to save pci state\n");
  306. ret = -ENOMEM;
  307. goto out_err_free_reg;
  308. }
  309. ret = adf_dev_configure(accel_dev);
  310. if (ret)
  311. goto out_err_free_reg;
  312. ret = adf_dev_init(accel_dev);
  313. if (ret)
  314. goto out_err_dev_shutdown;
  315. ret = adf_dev_start(accel_dev);
  316. if (ret)
  317. goto out_err_dev_stop;
  318. return ret;
  319. out_err_dev_stop:
  320. adf_dev_stop(accel_dev);
  321. out_err_dev_shutdown:
  322. adf_dev_shutdown(accel_dev);
  323. out_err_free_reg:
  324. pci_release_regions(accel_pci_dev->pci_dev);
  325. out_err_disable:
  326. pci_disable_device(accel_pci_dev->pci_dev);
  327. out_err:
  328. adf_cleanup_accel(accel_dev);
  329. kfree(accel_dev);
  330. return ret;
  331. }
  332. static void adf_remove(struct pci_dev *pdev)
  333. {
  334. struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);
  335. if (!accel_dev) {
  336. pr_err("QAT: Driver removal failed\n");
  337. return;
  338. }
  339. if (adf_dev_stop(accel_dev))
  340. dev_err(&GET_DEV(accel_dev), "Failed to stop QAT accel dev\n");
  341. adf_dev_shutdown(accel_dev);
  342. adf_disable_aer(accel_dev);
  343. adf_cleanup_accel(accel_dev);
  344. adf_cleanup_pci_dev(accel_dev);
  345. kfree(accel_dev);
  346. }
  347. static int __init adfdrv_init(void)
  348. {
  349. request_module("intel_qat");
  350. if (pci_register_driver(&adf_driver)) {
  351. pr_err("QAT: Driver initialization failed\n");
  352. return -EFAULT;
  353. }
  354. return 0;
  355. }
  356. static void __exit adfdrv_release(void)
  357. {
  358. pci_unregister_driver(&adf_driver);
  359. }
  360. module_init(adfdrv_init);
  361. module_exit(adfdrv_release);
  362. MODULE_LICENSE("Dual BSD/GPL");
  363. MODULE_AUTHOR("Intel");
  364. MODULE_FIRMWARE(ADF_DH895XCC_FW);
  365. MODULE_DESCRIPTION("Intel(R) QuickAssist Technology");
  366. MODULE_VERSION(ADF_DRV_VERSION);