amdgpu_bo_list.c 6.9 KB

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  1. /*
  2. * Copyright 2015 Advanced Micro Devices, Inc.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sub license, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20. *
  21. * The above copyright notice and this permission notice (including the
  22. * next paragraph) shall be included in all copies or substantial portions
  23. * of the Software.
  24. *
  25. */
  26. /*
  27. * Authors:
  28. * Christian König <deathsimple@vodafone.de>
  29. */
  30. #include <drm/drmP.h>
  31. #include "amdgpu.h"
  32. #include "amdgpu_trace.h"
  33. static int amdgpu_bo_list_create(struct amdgpu_fpriv *fpriv,
  34. struct amdgpu_bo_list **result,
  35. int *id)
  36. {
  37. int r;
  38. *result = kzalloc(sizeof(struct amdgpu_bo_list), GFP_KERNEL);
  39. if (!*result)
  40. return -ENOMEM;
  41. mutex_lock(&fpriv->bo_list_lock);
  42. r = idr_alloc(&fpriv->bo_list_handles, *result,
  43. 1, 0, GFP_KERNEL);
  44. if (r < 0) {
  45. mutex_unlock(&fpriv->bo_list_lock);
  46. kfree(*result);
  47. return r;
  48. }
  49. *id = r;
  50. mutex_init(&(*result)->lock);
  51. (*result)->num_entries = 0;
  52. (*result)->array = NULL;
  53. mutex_lock(&(*result)->lock);
  54. mutex_unlock(&fpriv->bo_list_lock);
  55. return 0;
  56. }
  57. static void amdgpu_bo_list_destroy(struct amdgpu_fpriv *fpriv, int id)
  58. {
  59. struct amdgpu_bo_list *list;
  60. mutex_lock(&fpriv->bo_list_lock);
  61. list = idr_find(&fpriv->bo_list_handles, id);
  62. if (list) {
  63. mutex_lock(&list->lock);
  64. idr_remove(&fpriv->bo_list_handles, id);
  65. mutex_unlock(&list->lock);
  66. amdgpu_bo_list_free(list);
  67. }
  68. mutex_unlock(&fpriv->bo_list_lock);
  69. }
  70. static int amdgpu_bo_list_set(struct amdgpu_device *adev,
  71. struct drm_file *filp,
  72. struct amdgpu_bo_list *list,
  73. struct drm_amdgpu_bo_list_entry *info,
  74. unsigned num_entries)
  75. {
  76. struct amdgpu_bo_list_entry *array;
  77. struct amdgpu_bo *gds_obj = adev->gds.gds_gfx_bo;
  78. struct amdgpu_bo *gws_obj = adev->gds.gws_gfx_bo;
  79. struct amdgpu_bo *oa_obj = adev->gds.oa_gfx_bo;
  80. bool has_userptr = false;
  81. unsigned i;
  82. array = drm_malloc_ab(num_entries, sizeof(struct amdgpu_bo_list_entry));
  83. if (!array)
  84. return -ENOMEM;
  85. memset(array, 0, num_entries * sizeof(struct amdgpu_bo_list_entry));
  86. for (i = 0; i < num_entries; ++i) {
  87. struct amdgpu_bo_list_entry *entry = &array[i];
  88. struct drm_gem_object *gobj;
  89. gobj = drm_gem_object_lookup(adev->ddev, filp, info[i].bo_handle);
  90. if (!gobj)
  91. goto error_free;
  92. entry->robj = amdgpu_bo_ref(gem_to_amdgpu_bo(gobj));
  93. drm_gem_object_unreference_unlocked(gobj);
  94. entry->priority = info[i].bo_priority;
  95. entry->prefered_domains = entry->robj->initial_domain;
  96. entry->allowed_domains = entry->prefered_domains;
  97. if (entry->allowed_domains == AMDGPU_GEM_DOMAIN_VRAM)
  98. entry->allowed_domains |= AMDGPU_GEM_DOMAIN_GTT;
  99. if (amdgpu_ttm_tt_has_userptr(entry->robj->tbo.ttm)) {
  100. has_userptr = true;
  101. entry->prefered_domains = AMDGPU_GEM_DOMAIN_GTT;
  102. entry->allowed_domains = AMDGPU_GEM_DOMAIN_GTT;
  103. }
  104. entry->tv.bo = &entry->robj->tbo;
  105. entry->tv.shared = !entry->robj->prime_shared_count;
  106. if (entry->prefered_domains == AMDGPU_GEM_DOMAIN_GDS)
  107. gds_obj = entry->robj;
  108. if (entry->prefered_domains == AMDGPU_GEM_DOMAIN_GWS)
  109. gws_obj = entry->robj;
  110. if (entry->prefered_domains == AMDGPU_GEM_DOMAIN_OA)
  111. oa_obj = entry->robj;
  112. trace_amdgpu_bo_list_set(list, entry->robj);
  113. }
  114. for (i = 0; i < list->num_entries; ++i)
  115. amdgpu_bo_unref(&list->array[i].robj);
  116. drm_free_large(list->array);
  117. list->gds_obj = gds_obj;
  118. list->gws_obj = gws_obj;
  119. list->oa_obj = oa_obj;
  120. list->has_userptr = has_userptr;
  121. list->array = array;
  122. list->num_entries = num_entries;
  123. return 0;
  124. error_free:
  125. drm_free_large(array);
  126. return -ENOENT;
  127. }
  128. struct amdgpu_bo_list *
  129. amdgpu_bo_list_get(struct amdgpu_fpriv *fpriv, int id)
  130. {
  131. struct amdgpu_bo_list *result;
  132. mutex_lock(&fpriv->bo_list_lock);
  133. result = idr_find(&fpriv->bo_list_handles, id);
  134. if (result)
  135. mutex_lock(&result->lock);
  136. mutex_unlock(&fpriv->bo_list_lock);
  137. return result;
  138. }
  139. void amdgpu_bo_list_put(struct amdgpu_bo_list *list)
  140. {
  141. mutex_unlock(&list->lock);
  142. }
  143. void amdgpu_bo_list_free(struct amdgpu_bo_list *list)
  144. {
  145. unsigned i;
  146. for (i = 0; i < list->num_entries; ++i)
  147. amdgpu_bo_unref(&list->array[i].robj);
  148. mutex_destroy(&list->lock);
  149. drm_free_large(list->array);
  150. kfree(list);
  151. }
  152. int amdgpu_bo_list_ioctl(struct drm_device *dev, void *data,
  153. struct drm_file *filp)
  154. {
  155. const uint32_t info_size = sizeof(struct drm_amdgpu_bo_list_entry);
  156. struct amdgpu_device *adev = dev->dev_private;
  157. struct amdgpu_fpriv *fpriv = filp->driver_priv;
  158. union drm_amdgpu_bo_list *args = data;
  159. uint32_t handle = args->in.list_handle;
  160. const void __user *uptr = (const void*)(long)args->in.bo_info_ptr;
  161. struct drm_amdgpu_bo_list_entry *info;
  162. struct amdgpu_bo_list *list;
  163. int r;
  164. info = drm_malloc_ab(args->in.bo_number,
  165. sizeof(struct drm_amdgpu_bo_list_entry));
  166. if (!info)
  167. return -ENOMEM;
  168. /* copy the handle array from userspace to a kernel buffer */
  169. r = -EFAULT;
  170. if (likely(info_size == args->in.bo_info_size)) {
  171. unsigned long bytes = args->in.bo_number *
  172. args->in.bo_info_size;
  173. if (copy_from_user(info, uptr, bytes))
  174. goto error_free;
  175. } else {
  176. unsigned long bytes = min(args->in.bo_info_size, info_size);
  177. unsigned i;
  178. memset(info, 0, args->in.bo_number * info_size);
  179. for (i = 0; i < args->in.bo_number; ++i) {
  180. if (copy_from_user(&info[i], uptr, bytes))
  181. goto error_free;
  182. uptr += args->in.bo_info_size;
  183. }
  184. }
  185. switch (args->in.operation) {
  186. case AMDGPU_BO_LIST_OP_CREATE:
  187. r = amdgpu_bo_list_create(fpriv, &list, &handle);
  188. if (r)
  189. goto error_free;
  190. r = amdgpu_bo_list_set(adev, filp, list, info,
  191. args->in.bo_number);
  192. amdgpu_bo_list_put(list);
  193. if (r)
  194. goto error_free;
  195. break;
  196. case AMDGPU_BO_LIST_OP_DESTROY:
  197. amdgpu_bo_list_destroy(fpriv, handle);
  198. handle = 0;
  199. break;
  200. case AMDGPU_BO_LIST_OP_UPDATE:
  201. r = -ENOENT;
  202. list = amdgpu_bo_list_get(fpriv, handle);
  203. if (!list)
  204. goto error_free;
  205. r = amdgpu_bo_list_set(adev, filp, list, info,
  206. args->in.bo_number);
  207. amdgpu_bo_list_put(list);
  208. if (r)
  209. goto error_free;
  210. break;
  211. default:
  212. r = -EINVAL;
  213. goto error_free;
  214. }
  215. memset(args, 0, sizeof(*args));
  216. args->out.list_handle = handle;
  217. drm_free_large(info);
  218. return 0;
  219. error_free:
  220. drm_free_large(info);
  221. return r;
  222. }