fiji_dpm.c 4.2 KB

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  1. /*
  2. * Copyright 2014 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. */
  23. #include <linux/firmware.h>
  24. #include "drmP.h"
  25. #include "amdgpu.h"
  26. #include "fiji_smumgr.h"
  27. MODULE_FIRMWARE("amdgpu/fiji_smc.bin");
  28. static void fiji_dpm_set_funcs(struct amdgpu_device *adev);
  29. static int fiji_dpm_early_init(void *handle)
  30. {
  31. struct amdgpu_device *adev = (struct amdgpu_device *)handle;
  32. fiji_dpm_set_funcs(adev);
  33. return 0;
  34. }
  35. static int fiji_dpm_init_microcode(struct amdgpu_device *adev)
  36. {
  37. char fw_name[30] = "amdgpu/fiji_smc.bin";
  38. int err;
  39. err = request_firmware(&adev->pm.fw, fw_name, adev->dev);
  40. if (err)
  41. goto out;
  42. err = amdgpu_ucode_validate(adev->pm.fw);
  43. out:
  44. if (err) {
  45. DRM_ERROR("Failed to load firmware \"%s\"", fw_name);
  46. release_firmware(adev->pm.fw);
  47. adev->pm.fw = NULL;
  48. }
  49. return err;
  50. }
  51. static int fiji_dpm_sw_init(void *handle)
  52. {
  53. int ret;
  54. struct amdgpu_device *adev = (struct amdgpu_device *)handle;
  55. ret = fiji_dpm_init_microcode(adev);
  56. if (ret)
  57. return ret;
  58. return 0;
  59. }
  60. static int fiji_dpm_sw_fini(void *handle)
  61. {
  62. return 0;
  63. }
  64. static int fiji_dpm_hw_init(void *handle)
  65. {
  66. int ret;
  67. struct amdgpu_device *adev = (struct amdgpu_device *)handle;
  68. mutex_lock(&adev->pm.mutex);
  69. ret = fiji_smu_init(adev);
  70. if (ret) {
  71. DRM_ERROR("SMU initialization failed\n");
  72. goto fail;
  73. }
  74. ret = fiji_smu_start(adev);
  75. if (ret) {
  76. DRM_ERROR("SMU start failed\n");
  77. goto fail;
  78. }
  79. mutex_unlock(&adev->pm.mutex);
  80. return 0;
  81. fail:
  82. adev->firmware.smu_load = false;
  83. mutex_unlock(&adev->pm.mutex);
  84. return -EINVAL;
  85. }
  86. static int fiji_dpm_hw_fini(void *handle)
  87. {
  88. struct amdgpu_device *adev = (struct amdgpu_device *)handle;
  89. mutex_lock(&adev->pm.mutex);
  90. fiji_smu_fini(adev);
  91. mutex_unlock(&adev->pm.mutex);
  92. return 0;
  93. }
  94. static int fiji_dpm_suspend(void *handle)
  95. {
  96. struct amdgpu_device *adev = (struct amdgpu_device *)handle;
  97. fiji_dpm_hw_fini(adev);
  98. return 0;
  99. }
  100. static int fiji_dpm_resume(void *handle)
  101. {
  102. struct amdgpu_device *adev = (struct amdgpu_device *)handle;
  103. fiji_dpm_hw_init(adev);
  104. return 0;
  105. }
  106. static int fiji_dpm_set_clockgating_state(void *handle,
  107. enum amd_clockgating_state state)
  108. {
  109. return 0;
  110. }
  111. static int fiji_dpm_set_powergating_state(void *handle,
  112. enum amd_powergating_state state)
  113. {
  114. return 0;
  115. }
  116. const struct amd_ip_funcs fiji_dpm_ip_funcs = {
  117. .early_init = fiji_dpm_early_init,
  118. .late_init = NULL,
  119. .sw_init = fiji_dpm_sw_init,
  120. .sw_fini = fiji_dpm_sw_fini,
  121. .hw_init = fiji_dpm_hw_init,
  122. .hw_fini = fiji_dpm_hw_fini,
  123. .suspend = fiji_dpm_suspend,
  124. .resume = fiji_dpm_resume,
  125. .is_idle = NULL,
  126. .wait_for_idle = NULL,
  127. .soft_reset = NULL,
  128. .print_status = NULL,
  129. .set_clockgating_state = fiji_dpm_set_clockgating_state,
  130. .set_powergating_state = fiji_dpm_set_powergating_state,
  131. };
  132. static const struct amdgpu_dpm_funcs fiji_dpm_funcs = {
  133. .get_temperature = NULL,
  134. .pre_set_power_state = NULL,
  135. .set_power_state = NULL,
  136. .post_set_power_state = NULL,
  137. .display_configuration_changed = NULL,
  138. .get_sclk = NULL,
  139. .get_mclk = NULL,
  140. .print_power_state = NULL,
  141. .debugfs_print_current_performance_level = NULL,
  142. .force_performance_level = NULL,
  143. .vblank_too_short = NULL,
  144. .powergate_uvd = NULL,
  145. };
  146. static void fiji_dpm_set_funcs(struct amdgpu_device *adev)
  147. {
  148. if (NULL == adev->pm.funcs)
  149. adev->pm.funcs = &fiji_dpm_funcs;
  150. }