cirrus_drv.h 6.8 KB

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  1. /*
  2. * Copyright 2012 Red Hat
  3. *
  4. * This file is subject to the terms and conditions of the GNU General
  5. * Public License version 2. See the file COPYING in the main
  6. * directory of this archive for more details.
  7. *
  8. * Authors: Matthew Garrett
  9. * Dave Airlie
  10. */
  11. #ifndef __CIRRUS_DRV_H__
  12. #define __CIRRUS_DRV_H__
  13. #include <video/vga.h>
  14. #include <drm/drm_fb_helper.h>
  15. #include <drm/ttm/ttm_bo_api.h>
  16. #include <drm/ttm/ttm_bo_driver.h>
  17. #include <drm/ttm/ttm_placement.h>
  18. #include <drm/ttm/ttm_memory.h>
  19. #include <drm/ttm/ttm_module.h>
  20. #include <drm/drm_gem.h>
  21. #define DRIVER_AUTHOR "Matthew Garrett"
  22. #define DRIVER_NAME "cirrus"
  23. #define DRIVER_DESC "qemu Cirrus emulation"
  24. #define DRIVER_DATE "20110418"
  25. #define DRIVER_MAJOR 1
  26. #define DRIVER_MINOR 0
  27. #define DRIVER_PATCHLEVEL 0
  28. #define CIRRUSFB_CONN_LIMIT 1
  29. #define RREG8(reg) ioread8(((void __iomem *)cdev->rmmio) + (reg))
  30. #define WREG8(reg, v) iowrite8(v, ((void __iomem *)cdev->rmmio) + (reg))
  31. #define RREG32(reg) ioread32(((void __iomem *)cdev->rmmio) + (reg))
  32. #define WREG32(reg, v) iowrite32(v, ((void __iomem *)cdev->rmmio) + (reg))
  33. #define SEQ_INDEX 4
  34. #define SEQ_DATA 5
  35. #define WREG_SEQ(reg, v) \
  36. do { \
  37. WREG8(SEQ_INDEX, reg); \
  38. WREG8(SEQ_DATA, v); \
  39. } while (0) \
  40. #define CRT_INDEX 0x14
  41. #define CRT_DATA 0x15
  42. #define WREG_CRT(reg, v) \
  43. do { \
  44. WREG8(CRT_INDEX, reg); \
  45. WREG8(CRT_DATA, v); \
  46. } while (0) \
  47. #define GFX_INDEX 0xe
  48. #define GFX_DATA 0xf
  49. #define WREG_GFX(reg, v) \
  50. do { \
  51. WREG8(GFX_INDEX, reg); \
  52. WREG8(GFX_DATA, v); \
  53. } while (0) \
  54. /*
  55. * Cirrus has a "hidden" DAC register that can be accessed by writing to
  56. * the pixel mask register to reset the state, then reading from the register
  57. * four times. The next write will then pass to the DAC
  58. */
  59. #define VGA_DAC_MASK 0x6
  60. #define WREG_HDR(v) \
  61. do { \
  62. RREG8(VGA_DAC_MASK); \
  63. RREG8(VGA_DAC_MASK); \
  64. RREG8(VGA_DAC_MASK); \
  65. RREG8(VGA_DAC_MASK); \
  66. WREG8(VGA_DAC_MASK, v); \
  67. } while (0) \
  68. #define CIRRUS_MAX_FB_HEIGHT 4096
  69. #define CIRRUS_MAX_FB_WIDTH 4096
  70. #define CIRRUS_DPMS_CLEARED (-1)
  71. #define to_cirrus_crtc(x) container_of(x, struct cirrus_crtc, base)
  72. #define to_cirrus_encoder(x) container_of(x, struct cirrus_encoder, base)
  73. #define to_cirrus_framebuffer(x) container_of(x, struct cirrus_framebuffer, base)
  74. struct cirrus_crtc {
  75. struct drm_crtc base;
  76. u8 lut_r[256], lut_g[256], lut_b[256];
  77. int last_dpms;
  78. bool enabled;
  79. };
  80. struct cirrus_fbdev;
  81. struct cirrus_mode_info {
  82. bool mode_config_initialized;
  83. struct cirrus_crtc *crtc;
  84. /* pointer to fbdev info structure */
  85. struct cirrus_fbdev *gfbdev;
  86. };
  87. struct cirrus_encoder {
  88. struct drm_encoder base;
  89. int last_dpms;
  90. };
  91. struct cirrus_connector {
  92. struct drm_connector base;
  93. };
  94. struct cirrus_framebuffer {
  95. struct drm_framebuffer base;
  96. struct drm_gem_object *obj;
  97. };
  98. struct cirrus_mc {
  99. resource_size_t vram_size;
  100. resource_size_t vram_base;
  101. };
  102. struct cirrus_device {
  103. struct drm_device *dev;
  104. unsigned long flags;
  105. resource_size_t rmmio_base;
  106. resource_size_t rmmio_size;
  107. void __iomem *rmmio;
  108. struct cirrus_mc mc;
  109. struct cirrus_mode_info mode_info;
  110. int num_crtc;
  111. int fb_mtrr;
  112. struct {
  113. struct drm_global_reference mem_global_ref;
  114. struct ttm_bo_global_ref bo_global_ref;
  115. struct ttm_bo_device bdev;
  116. } ttm;
  117. bool mm_inited;
  118. };
  119. struct cirrus_fbdev {
  120. struct drm_fb_helper helper;
  121. struct cirrus_framebuffer gfb;
  122. struct list_head fbdev_list;
  123. void *sysram;
  124. int size;
  125. int x1, y1, x2, y2; /* dirty rect */
  126. spinlock_t dirty_lock;
  127. };
  128. struct cirrus_bo {
  129. struct ttm_buffer_object bo;
  130. struct ttm_placement placement;
  131. struct ttm_bo_kmap_obj kmap;
  132. struct drm_gem_object gem;
  133. struct ttm_place placements[3];
  134. int pin_count;
  135. };
  136. #define gem_to_cirrus_bo(gobj) container_of((gobj), struct cirrus_bo, gem)
  137. static inline struct cirrus_bo *
  138. cirrus_bo(struct ttm_buffer_object *bo)
  139. {
  140. return container_of(bo, struct cirrus_bo, bo);
  141. }
  142. #define to_cirrus_obj(x) container_of(x, struct cirrus_gem_object, base)
  143. #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
  144. /* cirrus_mode.c */
  145. void cirrus_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
  146. u16 blue, int regno);
  147. void cirrus_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
  148. u16 *blue, int regno);
  149. /* cirrus_main.c */
  150. int cirrus_device_init(struct cirrus_device *cdev,
  151. struct drm_device *ddev,
  152. struct pci_dev *pdev,
  153. uint32_t flags);
  154. void cirrus_device_fini(struct cirrus_device *cdev);
  155. void cirrus_gem_free_object(struct drm_gem_object *obj);
  156. int cirrus_dumb_mmap_offset(struct drm_file *file,
  157. struct drm_device *dev,
  158. uint32_t handle,
  159. uint64_t *offset);
  160. int cirrus_gem_create(struct drm_device *dev,
  161. u32 size, bool iskernel,
  162. struct drm_gem_object **obj);
  163. int cirrus_dumb_create(struct drm_file *file,
  164. struct drm_device *dev,
  165. struct drm_mode_create_dumb *args);
  166. int cirrus_framebuffer_init(struct drm_device *dev,
  167. struct cirrus_framebuffer *gfb,
  168. struct drm_mode_fb_cmd2 *mode_cmd,
  169. struct drm_gem_object *obj);
  170. bool cirrus_check_framebuffer(struct cirrus_device *cdev, int width, int height,
  171. int bpp, int pitch);
  172. /* cirrus_display.c */
  173. int cirrus_modeset_init(struct cirrus_device *cdev);
  174. void cirrus_modeset_fini(struct cirrus_device *cdev);
  175. /* cirrus_fbdev.c */
  176. int cirrus_fbdev_init(struct cirrus_device *cdev);
  177. void cirrus_fbdev_fini(struct cirrus_device *cdev);
  178. /* cirrus_irq.c */
  179. void cirrus_driver_irq_preinstall(struct drm_device *dev);
  180. int cirrus_driver_irq_postinstall(struct drm_device *dev);
  181. void cirrus_driver_irq_uninstall(struct drm_device *dev);
  182. irqreturn_t cirrus_driver_irq_handler(int irq, void *arg);
  183. /* cirrus_kms.c */
  184. int cirrus_driver_load(struct drm_device *dev, unsigned long flags);
  185. int cirrus_driver_unload(struct drm_device *dev);
  186. extern struct drm_ioctl_desc cirrus_ioctls[];
  187. extern int cirrus_max_ioctl;
  188. int cirrus_mm_init(struct cirrus_device *cirrus);
  189. void cirrus_mm_fini(struct cirrus_device *cirrus);
  190. void cirrus_ttm_placement(struct cirrus_bo *bo, int domain);
  191. int cirrus_bo_create(struct drm_device *dev, int size, int align,
  192. uint32_t flags, struct cirrus_bo **pcirrusbo);
  193. int cirrus_mmap(struct file *filp, struct vm_area_struct *vma);
  194. static inline int cirrus_bo_reserve(struct cirrus_bo *bo, bool no_wait)
  195. {
  196. int ret;
  197. ret = ttm_bo_reserve(&bo->bo, true, no_wait, false, NULL);
  198. if (ret) {
  199. if (ret != -ERESTARTSYS && ret != -EBUSY)
  200. DRM_ERROR("reserve failed %p\n", bo);
  201. return ret;
  202. }
  203. return 0;
  204. }
  205. static inline void cirrus_bo_unreserve(struct cirrus_bo *bo)
  206. {
  207. ttm_bo_unreserve(&bo->bo);
  208. }
  209. int cirrus_bo_push_sysram(struct cirrus_bo *bo);
  210. int cirrus_bo_pin(struct cirrus_bo *bo, u32 pl_flag, u64 *gpu_addr);
  211. extern int cirrus_bpp;
  212. #endif /* __CIRRUS_DRV_H__ */