accel_2d.c 9.5 KB

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  1. /**************************************************************************
  2. * Copyright (c) 2007-2011, Intel Corporation.
  3. * All Rights Reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  17. *
  18. * Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
  19. * develop this driver.
  20. *
  21. **************************************************************************/
  22. #include <linux/module.h>
  23. #include <linux/kernel.h>
  24. #include <linux/errno.h>
  25. #include <linux/string.h>
  26. #include <linux/mm.h>
  27. #include <linux/tty.h>
  28. #include <linux/slab.h>
  29. #include <linux/delay.h>
  30. #include <linux/fb.h>
  31. #include <linux/init.h>
  32. #include <linux/console.h>
  33. #include <drm/drmP.h>
  34. #include <drm/drm.h>
  35. #include <drm/drm_crtc.h>
  36. #include "psb_drv.h"
  37. #include "psb_reg.h"
  38. #include "framebuffer.h"
  39. /**
  40. * psb_spank - reset the 2D engine
  41. * @dev_priv: our PSB DRM device
  42. *
  43. * Soft reset the graphics engine and then reload the necessary registers.
  44. * We use this at initialisation time but it will become relevant for
  45. * accelerated X later
  46. */
  47. void psb_spank(struct drm_psb_private *dev_priv)
  48. {
  49. PSB_WSGX32(_PSB_CS_RESET_BIF_RESET | _PSB_CS_RESET_DPM_RESET |
  50. _PSB_CS_RESET_TA_RESET | _PSB_CS_RESET_USE_RESET |
  51. _PSB_CS_RESET_ISP_RESET | _PSB_CS_RESET_TSP_RESET |
  52. _PSB_CS_RESET_TWOD_RESET, PSB_CR_SOFT_RESET);
  53. PSB_RSGX32(PSB_CR_SOFT_RESET);
  54. msleep(1);
  55. PSB_WSGX32(0, PSB_CR_SOFT_RESET);
  56. wmb();
  57. PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_CB_CTRL_CLEAR_FAULT,
  58. PSB_CR_BIF_CTRL);
  59. wmb();
  60. (void) PSB_RSGX32(PSB_CR_BIF_CTRL);
  61. msleep(1);
  62. PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_CB_CTRL_CLEAR_FAULT,
  63. PSB_CR_BIF_CTRL);
  64. (void) PSB_RSGX32(PSB_CR_BIF_CTRL);
  65. PSB_WSGX32(dev_priv->gtt.gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
  66. }
  67. /**
  68. * psb2_2d_wait_available - wait for FIFO room
  69. * @dev_priv: our DRM device
  70. * @size: size (in dwords) of the command we want to issue
  71. *
  72. * Wait until there is room to load the FIFO with our data. If the
  73. * device is not responding then reset it
  74. */
  75. static int psb_2d_wait_available(struct drm_psb_private *dev_priv,
  76. unsigned size)
  77. {
  78. uint32_t avail = PSB_RSGX32(PSB_CR_2D_SOCIF);
  79. unsigned long t = jiffies + HZ;
  80. while (avail < size) {
  81. avail = PSB_RSGX32(PSB_CR_2D_SOCIF);
  82. if (time_after(jiffies, t)) {
  83. psb_spank(dev_priv);
  84. return -EIO;
  85. }
  86. }
  87. return 0;
  88. }
  89. /**
  90. * psb_2d_submit - submit a 2D command
  91. * @dev_priv: our DRM device
  92. * @cmdbuf: command to issue
  93. * @size: length (in dwords)
  94. *
  95. * Issue one or more 2D commands to the accelerator. This needs to be
  96. * serialized later when we add the GEM interfaces for acceleration
  97. */
  98. static int psbfb_2d_submit(struct drm_psb_private *dev_priv, uint32_t *cmdbuf,
  99. unsigned size)
  100. {
  101. int ret = 0;
  102. int i;
  103. unsigned submit_size;
  104. unsigned long flags;
  105. spin_lock_irqsave(&dev_priv->lock_2d, flags);
  106. while (size > 0) {
  107. submit_size = (size < 0x60) ? size : 0x60;
  108. size -= submit_size;
  109. ret = psb_2d_wait_available(dev_priv, submit_size);
  110. if (ret)
  111. break;
  112. submit_size <<= 2;
  113. for (i = 0; i < submit_size; i += 4)
  114. PSB_WSGX32(*cmdbuf++, PSB_SGX_2D_SLAVE_PORT + i);
  115. (void)PSB_RSGX32(PSB_SGX_2D_SLAVE_PORT + i - 4);
  116. }
  117. spin_unlock_irqrestore(&dev_priv->lock_2d, flags);
  118. return ret;
  119. }
  120. /**
  121. * psb_accel_2d_copy_direction - compute blit order
  122. * @xdir: X direction of move
  123. * @ydir: Y direction of move
  124. *
  125. * Compute the correct order setings to ensure that an overlapping blit
  126. * correctly copies all the pixels.
  127. */
  128. static u32 psb_accel_2d_copy_direction(int xdir, int ydir)
  129. {
  130. if (xdir < 0)
  131. return (ydir < 0) ? PSB_2D_COPYORDER_BR2TL :
  132. PSB_2D_COPYORDER_TR2BL;
  133. else
  134. return (ydir < 0) ? PSB_2D_COPYORDER_BL2TR :
  135. PSB_2D_COPYORDER_TL2BR;
  136. }
  137. /**
  138. * psb_accel_2d_copy - accelerated 2D copy
  139. * @dev_priv: our DRM device
  140. * @src_offset in bytes
  141. * @src_stride in bytes
  142. * @src_format psb 2D format defines
  143. * @dst_offset in bytes
  144. * @dst_stride in bytes
  145. * @dst_format psb 2D format defines
  146. * @src_x offset in pixels
  147. * @src_y offset in pixels
  148. * @dst_x offset in pixels
  149. * @dst_y offset in pixels
  150. * @size_x of the copied area
  151. * @size_y of the copied area
  152. *
  153. * Format and issue a 2D accelerated copy command.
  154. */
  155. static int psb_accel_2d_copy(struct drm_psb_private *dev_priv,
  156. uint32_t src_offset, uint32_t src_stride,
  157. uint32_t src_format, uint32_t dst_offset,
  158. uint32_t dst_stride, uint32_t dst_format,
  159. uint16_t src_x, uint16_t src_y,
  160. uint16_t dst_x, uint16_t dst_y,
  161. uint16_t size_x, uint16_t size_y)
  162. {
  163. uint32_t blit_cmd;
  164. uint32_t buffer[10];
  165. uint32_t *buf;
  166. uint32_t direction;
  167. buf = buffer;
  168. direction =
  169. psb_accel_2d_copy_direction(src_x - dst_x, src_y - dst_y);
  170. if (direction == PSB_2D_COPYORDER_BR2TL ||
  171. direction == PSB_2D_COPYORDER_TR2BL) {
  172. src_x += size_x - 1;
  173. dst_x += size_x - 1;
  174. }
  175. if (direction == PSB_2D_COPYORDER_BR2TL ||
  176. direction == PSB_2D_COPYORDER_BL2TR) {
  177. src_y += size_y - 1;
  178. dst_y += size_y - 1;
  179. }
  180. blit_cmd =
  181. PSB_2D_BLIT_BH |
  182. PSB_2D_ROT_NONE |
  183. PSB_2D_DSTCK_DISABLE |
  184. PSB_2D_SRCCK_DISABLE |
  185. PSB_2D_USE_PAT | PSB_2D_ROP3_SRCCOPY | direction;
  186. *buf++ = PSB_2D_FENCE_BH;
  187. *buf++ =
  188. PSB_2D_DST_SURF_BH | dst_format | (dst_stride <<
  189. PSB_2D_DST_STRIDE_SHIFT);
  190. *buf++ = dst_offset;
  191. *buf++ =
  192. PSB_2D_SRC_SURF_BH | src_format | (src_stride <<
  193. PSB_2D_SRC_STRIDE_SHIFT);
  194. *buf++ = src_offset;
  195. *buf++ =
  196. PSB_2D_SRC_OFF_BH | (src_x << PSB_2D_SRCOFF_XSTART_SHIFT) |
  197. (src_y << PSB_2D_SRCOFF_YSTART_SHIFT);
  198. *buf++ = blit_cmd;
  199. *buf++ =
  200. (dst_x << PSB_2D_DST_XSTART_SHIFT) | (dst_y <<
  201. PSB_2D_DST_YSTART_SHIFT);
  202. *buf++ =
  203. (size_x << PSB_2D_DST_XSIZE_SHIFT) | (size_y <<
  204. PSB_2D_DST_YSIZE_SHIFT);
  205. *buf++ = PSB_2D_FLUSH_BH;
  206. return psbfb_2d_submit(dev_priv, buffer, buf - buffer);
  207. }
  208. /**
  209. * psbfb_copyarea_accel - copyarea acceleration for /dev/fb
  210. * @info: our framebuffer
  211. * @a: copyarea parameters from the framebuffer core
  212. *
  213. * Perform a 2D copy via the accelerator
  214. */
  215. static void psbfb_copyarea_accel(struct fb_info *info,
  216. const struct fb_copyarea *a)
  217. {
  218. struct psb_fbdev *fbdev = info->par;
  219. struct psb_framebuffer *psbfb = &fbdev->pfb;
  220. struct drm_device *dev = psbfb->base.dev;
  221. struct drm_framebuffer *fb = fbdev->psb_fb_helper.fb;
  222. struct drm_psb_private *dev_priv = dev->dev_private;
  223. uint32_t offset;
  224. uint32_t stride;
  225. uint32_t src_format;
  226. uint32_t dst_format;
  227. if (!fb)
  228. return;
  229. offset = psbfb->gtt->offset;
  230. stride = fb->pitches[0];
  231. switch (fb->depth) {
  232. case 8:
  233. src_format = PSB_2D_SRC_332RGB;
  234. dst_format = PSB_2D_DST_332RGB;
  235. break;
  236. case 15:
  237. src_format = PSB_2D_SRC_555RGB;
  238. dst_format = PSB_2D_DST_555RGB;
  239. break;
  240. case 16:
  241. src_format = PSB_2D_SRC_565RGB;
  242. dst_format = PSB_2D_DST_565RGB;
  243. break;
  244. case 24:
  245. case 32:
  246. /* this is wrong but since we don't do blending its okay */
  247. src_format = PSB_2D_SRC_8888ARGB;
  248. dst_format = PSB_2D_DST_8888ARGB;
  249. break;
  250. default:
  251. /* software fallback */
  252. drm_fb_helper_cfb_copyarea(info, a);
  253. return;
  254. }
  255. if (!gma_power_begin(dev, false)) {
  256. drm_fb_helper_cfb_copyarea(info, a);
  257. return;
  258. }
  259. psb_accel_2d_copy(dev_priv,
  260. offset, stride, src_format,
  261. offset, stride, dst_format,
  262. a->sx, a->sy, a->dx, a->dy, a->width, a->height);
  263. gma_power_end(dev);
  264. }
  265. /**
  266. * psbfb_copyarea - 2D copy interface
  267. * @info: our framebuffer
  268. * @region: region to copy
  269. *
  270. * Copy an area of the framebuffer console either by the accelerator
  271. * or directly using the cfb helpers according to the request
  272. */
  273. void psbfb_copyarea(struct fb_info *info,
  274. const struct fb_copyarea *region)
  275. {
  276. if (unlikely(info->state != FBINFO_STATE_RUNNING))
  277. return;
  278. /* Avoid the 8 pixel erratum */
  279. if (region->width == 8 || region->height == 8 ||
  280. (info->flags & FBINFO_HWACCEL_DISABLED))
  281. return drm_fb_helper_cfb_copyarea(info, region);
  282. psbfb_copyarea_accel(info, region);
  283. }
  284. /**
  285. * psbfb_sync - synchronize 2D
  286. * @info: our framebuffer
  287. *
  288. * Wait for the 2D engine to quiesce so that we can do CPU
  289. * access to the framebuffer again
  290. */
  291. int psbfb_sync(struct fb_info *info)
  292. {
  293. struct psb_fbdev *fbdev = info->par;
  294. struct psb_framebuffer *psbfb = &fbdev->pfb;
  295. struct drm_device *dev = psbfb->base.dev;
  296. struct drm_psb_private *dev_priv = dev->dev_private;
  297. unsigned long _end = jiffies + HZ;
  298. int busy = 0;
  299. unsigned long flags;
  300. spin_lock_irqsave(&dev_priv->lock_2d, flags);
  301. /*
  302. * First idle the 2D engine.
  303. */
  304. if ((PSB_RSGX32(PSB_CR_2D_SOCIF) == _PSB_C2_SOCIF_EMPTY) &&
  305. ((PSB_RSGX32(PSB_CR_2D_BLIT_STATUS) & _PSB_C2B_STATUS_BUSY) == 0))
  306. goto out;
  307. do {
  308. busy = (PSB_RSGX32(PSB_CR_2D_SOCIF) != _PSB_C2_SOCIF_EMPTY);
  309. cpu_relax();
  310. } while (busy && !time_after_eq(jiffies, _end));
  311. if (busy)
  312. busy = (PSB_RSGX32(PSB_CR_2D_SOCIF) != _PSB_C2_SOCIF_EMPTY);
  313. if (busy)
  314. goto out;
  315. do {
  316. busy = ((PSB_RSGX32(PSB_CR_2D_BLIT_STATUS) &
  317. _PSB_C2B_STATUS_BUSY) != 0);
  318. cpu_relax();
  319. } while (busy && !time_after_eq(jiffies, _end));
  320. if (busy)
  321. busy = ((PSB_RSGX32(PSB_CR_2D_BLIT_STATUS) &
  322. _PSB_C2B_STATUS_BUSY) != 0);
  323. out:
  324. spin_unlock_irqrestore(&dev_priv->lock_2d, flags);
  325. return (busy) ? -EBUSY : 0;
  326. }