cdv_intel_crt.c 8.3 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21. * DEALINGS IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * Eric Anholt <eric@anholt.net>
  25. */
  26. #include <linux/i2c.h>
  27. #include <drm/drmP.h>
  28. #include "intel_bios.h"
  29. #include "psb_drv.h"
  30. #include "psb_intel_drv.h"
  31. #include "psb_intel_reg.h"
  32. #include "power.h"
  33. #include "cdv_device.h"
  34. #include <linux/pm_runtime.h>
  35. static void cdv_intel_crt_dpms(struct drm_encoder *encoder, int mode)
  36. {
  37. struct drm_device *dev = encoder->dev;
  38. u32 temp, reg;
  39. reg = ADPA;
  40. temp = REG_READ(reg);
  41. temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  42. temp &= ~ADPA_DAC_ENABLE;
  43. switch (mode) {
  44. case DRM_MODE_DPMS_ON:
  45. temp |= ADPA_DAC_ENABLE;
  46. break;
  47. case DRM_MODE_DPMS_STANDBY:
  48. temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
  49. break;
  50. case DRM_MODE_DPMS_SUSPEND:
  51. temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
  52. break;
  53. case DRM_MODE_DPMS_OFF:
  54. temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
  55. break;
  56. }
  57. REG_WRITE(reg, temp);
  58. }
  59. static int cdv_intel_crt_mode_valid(struct drm_connector *connector,
  60. struct drm_display_mode *mode)
  61. {
  62. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  63. return MODE_NO_DBLESCAN;
  64. /* The lowest clock for CDV is 20000KHz */
  65. if (mode->clock < 20000)
  66. return MODE_CLOCK_LOW;
  67. /* The max clock for CDV is 355 instead of 400 */
  68. if (mode->clock > 355000)
  69. return MODE_CLOCK_HIGH;
  70. return MODE_OK;
  71. }
  72. static void cdv_intel_crt_mode_set(struct drm_encoder *encoder,
  73. struct drm_display_mode *mode,
  74. struct drm_display_mode *adjusted_mode)
  75. {
  76. struct drm_device *dev = encoder->dev;
  77. struct drm_crtc *crtc = encoder->crtc;
  78. struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
  79. int dpll_md_reg;
  80. u32 adpa, dpll_md;
  81. u32 adpa_reg;
  82. if (gma_crtc->pipe == 0)
  83. dpll_md_reg = DPLL_A_MD;
  84. else
  85. dpll_md_reg = DPLL_B_MD;
  86. adpa_reg = ADPA;
  87. /*
  88. * Disable separate mode multiplier used when cloning SDVO to CRT
  89. * XXX this needs to be adjusted when we really are cloning
  90. */
  91. {
  92. dpll_md = REG_READ(dpll_md_reg);
  93. REG_WRITE(dpll_md_reg,
  94. dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
  95. }
  96. adpa = 0;
  97. if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
  98. adpa |= ADPA_HSYNC_ACTIVE_HIGH;
  99. if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
  100. adpa |= ADPA_VSYNC_ACTIVE_HIGH;
  101. if (gma_crtc->pipe == 0)
  102. adpa |= ADPA_PIPE_A_SELECT;
  103. else
  104. adpa |= ADPA_PIPE_B_SELECT;
  105. REG_WRITE(adpa_reg, adpa);
  106. }
  107. /**
  108. * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
  109. *
  110. * \return true if CRT is connected.
  111. * \return false if CRT is disconnected.
  112. */
  113. static bool cdv_intel_crt_detect_hotplug(struct drm_connector *connector,
  114. bool force)
  115. {
  116. struct drm_device *dev = connector->dev;
  117. u32 hotplug_en;
  118. int i, tries = 0, ret = false;
  119. u32 orig;
  120. /*
  121. * On a CDV thep, CRT detect sequence need to be done twice
  122. * to get a reliable result.
  123. */
  124. tries = 2;
  125. orig = hotplug_en = REG_READ(PORT_HOTPLUG_EN);
  126. hotplug_en &= ~(CRT_HOTPLUG_DETECT_MASK);
  127. hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
  128. hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
  129. hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
  130. for (i = 0; i < tries ; i++) {
  131. unsigned long timeout;
  132. /* turn on the FORCE_DETECT */
  133. REG_WRITE(PORT_HOTPLUG_EN, hotplug_en);
  134. timeout = jiffies + msecs_to_jiffies(1000);
  135. /* wait for FORCE_DETECT to go off */
  136. do {
  137. if (!(REG_READ(PORT_HOTPLUG_EN) &
  138. CRT_HOTPLUG_FORCE_DETECT))
  139. break;
  140. msleep(1);
  141. } while (time_after(timeout, jiffies));
  142. }
  143. if ((REG_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) !=
  144. CRT_HOTPLUG_MONITOR_NONE)
  145. ret = true;
  146. /* clear the interrupt we just generated, if any */
  147. REG_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
  148. /* and put the bits back */
  149. REG_WRITE(PORT_HOTPLUG_EN, orig);
  150. return ret;
  151. }
  152. static enum drm_connector_status cdv_intel_crt_detect(
  153. struct drm_connector *connector, bool force)
  154. {
  155. if (cdv_intel_crt_detect_hotplug(connector, force))
  156. return connector_status_connected;
  157. else
  158. return connector_status_disconnected;
  159. }
  160. static void cdv_intel_crt_destroy(struct drm_connector *connector)
  161. {
  162. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  163. psb_intel_i2c_destroy(gma_encoder->ddc_bus);
  164. drm_connector_unregister(connector);
  165. drm_connector_cleanup(connector);
  166. kfree(connector);
  167. }
  168. static int cdv_intel_crt_get_modes(struct drm_connector *connector)
  169. {
  170. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  171. return psb_intel_ddc_get_modes(connector,
  172. &gma_encoder->ddc_bus->adapter);
  173. }
  174. static int cdv_intel_crt_set_property(struct drm_connector *connector,
  175. struct drm_property *property,
  176. uint64_t value)
  177. {
  178. return 0;
  179. }
  180. /*
  181. * Routines for controlling stuff on the analog port
  182. */
  183. static const struct drm_encoder_helper_funcs cdv_intel_crt_helper_funcs = {
  184. .dpms = cdv_intel_crt_dpms,
  185. .mode_fixup = gma_encoder_mode_fixup,
  186. .prepare = gma_encoder_prepare,
  187. .commit = gma_encoder_commit,
  188. .mode_set = cdv_intel_crt_mode_set,
  189. };
  190. static const struct drm_connector_funcs cdv_intel_crt_connector_funcs = {
  191. .dpms = drm_helper_connector_dpms,
  192. .detect = cdv_intel_crt_detect,
  193. .fill_modes = drm_helper_probe_single_connector_modes,
  194. .destroy = cdv_intel_crt_destroy,
  195. .set_property = cdv_intel_crt_set_property,
  196. };
  197. static const struct drm_connector_helper_funcs
  198. cdv_intel_crt_connector_helper_funcs = {
  199. .mode_valid = cdv_intel_crt_mode_valid,
  200. .get_modes = cdv_intel_crt_get_modes,
  201. .best_encoder = gma_best_encoder,
  202. };
  203. static void cdv_intel_crt_enc_destroy(struct drm_encoder *encoder)
  204. {
  205. drm_encoder_cleanup(encoder);
  206. }
  207. static const struct drm_encoder_funcs cdv_intel_crt_enc_funcs = {
  208. .destroy = cdv_intel_crt_enc_destroy,
  209. };
  210. void cdv_intel_crt_init(struct drm_device *dev,
  211. struct psb_intel_mode_device *mode_dev)
  212. {
  213. struct gma_connector *gma_connector;
  214. struct gma_encoder *gma_encoder;
  215. struct drm_connector *connector;
  216. struct drm_encoder *encoder;
  217. u32 i2c_reg;
  218. gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
  219. if (!gma_encoder)
  220. return;
  221. gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
  222. if (!gma_connector)
  223. goto failed_connector;
  224. connector = &gma_connector->base;
  225. connector->polled = DRM_CONNECTOR_POLL_HPD;
  226. drm_connector_init(dev, connector,
  227. &cdv_intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
  228. encoder = &gma_encoder->base;
  229. drm_encoder_init(dev, encoder,
  230. &cdv_intel_crt_enc_funcs, DRM_MODE_ENCODER_DAC);
  231. gma_connector_attach_encoder(gma_connector, gma_encoder);
  232. /* Set up the DDC bus. */
  233. i2c_reg = GPIOA;
  234. /* Remove the following code for CDV */
  235. /*
  236. if (dev_priv->crt_ddc_bus != 0)
  237. i2c_reg = dev_priv->crt_ddc_bus;
  238. }*/
  239. gma_encoder->ddc_bus = psb_intel_i2c_create(dev,
  240. i2c_reg, "CRTDDC_A");
  241. if (!gma_encoder->ddc_bus) {
  242. dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
  243. "failed.\n");
  244. goto failed_ddc;
  245. }
  246. gma_encoder->type = INTEL_OUTPUT_ANALOG;
  247. /*
  248. psb_intel_output->clone_mask = (1 << INTEL_ANALOG_CLONE_BIT);
  249. psb_intel_output->crtc_mask = (1 << 0) | (1 << 1);
  250. */
  251. connector->interlace_allowed = 0;
  252. connector->doublescan_allowed = 0;
  253. drm_encoder_helper_add(encoder, &cdv_intel_crt_helper_funcs);
  254. drm_connector_helper_add(connector,
  255. &cdv_intel_crt_connector_helper_funcs);
  256. drm_connector_register(connector);
  257. return;
  258. failed_ddc:
  259. drm_encoder_cleanup(&gma_encoder->base);
  260. drm_connector_cleanup(&gma_connector->base);
  261. kfree(gma_connector);
  262. failed_connector:
  263. kfree(gma_encoder);
  264. return;
  265. }