oaktrail_lvds_i2c.c 4.5 KB

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  1. /*
  2. * Copyright (c) 2002-2010, Intel Corporation.
  3. * Copyright (c) 2014 ATRON electronic GmbH
  4. * Author: Jan Safrata <jan.nikitenko@gmail.com>
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a copy
  7. * of this software and associated documentation files (the "Software"), to deal
  8. * in the Software without restriction, including without limitation the rights
  9. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10. * copies of the Software, and to permit persons to whom the Software is
  11. * furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  19. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22. * THE SOFTWARE.
  23. *
  24. */
  25. #include <linux/kernel.h>
  26. #include <linux/module.h>
  27. #include <linux/pci.h>
  28. #include <linux/types.h>
  29. #include <linux/i2c.h>
  30. #include <linux/i2c-algo-bit.h>
  31. #include <linux/init.h>
  32. #include <linux/io.h>
  33. #include <linux/delay.h>
  34. #include <drm/drmP.h>
  35. #include "psb_drv.h"
  36. #include "psb_intel_reg.h"
  37. /*
  38. * LPC GPIO based I2C bus for LVDS of Atom E6xx
  39. */
  40. /*-----------------------------------------------------------------------------
  41. * LPC Register Offsets. Used for LVDS GPIO Bit Bashing. Registers are part
  42. * Atom E6xx [D31:F0]
  43. ----------------------------------------------------------------------------*/
  44. #define RGEN 0x20
  45. #define RGIO 0x24
  46. #define RGLVL 0x28
  47. #define RGTPE 0x2C
  48. #define RGTNE 0x30
  49. #define RGGPE 0x34
  50. #define RGSMI 0x38
  51. #define RGTS 0x3C
  52. /* The LVDS GPIO clock lines are GPIOSUS[3]
  53. * The LVDS GPIO data lines are GPIOSUS[4]
  54. */
  55. #define GPIO_CLOCK 0x08
  56. #define GPIO_DATA 0x10
  57. #define LPC_READ_REG(chan, r) inl((chan)->reg + (r))
  58. #define LPC_WRITE_REG(chan, r, val) outl((val), (chan)->reg + (r))
  59. static int get_clock(void *data)
  60. {
  61. struct psb_intel_i2c_chan *chan = data;
  62. u32 val, tmp;
  63. val = LPC_READ_REG(chan, RGIO);
  64. val |= GPIO_CLOCK;
  65. LPC_WRITE_REG(chan, RGIO, val);
  66. tmp = LPC_READ_REG(chan, RGLVL);
  67. val = (LPC_READ_REG(chan, RGLVL) & GPIO_CLOCK) ? 1 : 0;
  68. return val;
  69. }
  70. static int get_data(void *data)
  71. {
  72. struct psb_intel_i2c_chan *chan = data;
  73. u32 val, tmp;
  74. val = LPC_READ_REG(chan, RGIO);
  75. val |= GPIO_DATA;
  76. LPC_WRITE_REG(chan, RGIO, val);
  77. tmp = LPC_READ_REG(chan, RGLVL);
  78. val = (LPC_READ_REG(chan, RGLVL) & GPIO_DATA) ? 1 : 0;
  79. return val;
  80. }
  81. static void set_clock(void *data, int state_high)
  82. {
  83. struct psb_intel_i2c_chan *chan = data;
  84. u32 val;
  85. if (state_high) {
  86. val = LPC_READ_REG(chan, RGIO);
  87. val |= GPIO_CLOCK;
  88. LPC_WRITE_REG(chan, RGIO, val);
  89. } else {
  90. val = LPC_READ_REG(chan, RGIO);
  91. val &= ~GPIO_CLOCK;
  92. LPC_WRITE_REG(chan, RGIO, val);
  93. val = LPC_READ_REG(chan, RGLVL);
  94. val &= ~GPIO_CLOCK;
  95. LPC_WRITE_REG(chan, RGLVL, val);
  96. }
  97. }
  98. static void set_data(void *data, int state_high)
  99. {
  100. struct psb_intel_i2c_chan *chan = data;
  101. u32 val;
  102. if (state_high) {
  103. val = LPC_READ_REG(chan, RGIO);
  104. val |= GPIO_DATA;
  105. LPC_WRITE_REG(chan, RGIO, val);
  106. } else {
  107. val = LPC_READ_REG(chan, RGIO);
  108. val &= ~GPIO_DATA;
  109. LPC_WRITE_REG(chan, RGIO, val);
  110. val = LPC_READ_REG(chan, RGLVL);
  111. val &= ~GPIO_DATA;
  112. LPC_WRITE_REG(chan, RGLVL, val);
  113. }
  114. }
  115. void oaktrail_lvds_i2c_init(struct drm_encoder *encoder)
  116. {
  117. struct drm_device *dev = encoder->dev;
  118. struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
  119. struct drm_psb_private *dev_priv = dev->dev_private;
  120. struct psb_intel_i2c_chan *chan;
  121. chan = kzalloc(sizeof(struct psb_intel_i2c_chan), GFP_KERNEL);
  122. if (!chan)
  123. return;
  124. chan->drm_dev = dev;
  125. chan->reg = dev_priv->lpc_gpio_base;
  126. strncpy(chan->adapter.name, "gma500 LPC", I2C_NAME_SIZE - 1);
  127. chan->adapter.owner = THIS_MODULE;
  128. chan->adapter.algo_data = &chan->algo;
  129. chan->adapter.dev.parent = &dev->pdev->dev;
  130. chan->algo.setsda = set_data;
  131. chan->algo.setscl = set_clock;
  132. chan->algo.getsda = get_data;
  133. chan->algo.getscl = get_clock;
  134. chan->algo.udelay = 100;
  135. chan->algo.timeout = usecs_to_jiffies(2200);
  136. chan->algo.data = chan;
  137. i2c_set_adapdata(&chan->adapter, chan);
  138. set_data(chan, 1);
  139. set_clock(chan, 1);
  140. udelay(50);
  141. if (i2c_bit_add_bus(&chan->adapter)) {
  142. kfree(chan);
  143. return;
  144. }
  145. gma_encoder->ddc_bus = chan;
  146. }