psb_device.c 9.2 KB

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  1. /**************************************************************************
  2. * Copyright (c) 2011, Intel Corporation.
  3. * All Rights Reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  17. *
  18. **************************************************************************/
  19. #include <linux/backlight.h>
  20. #include <drm/drmP.h>
  21. #include <drm/drm.h>
  22. #include <drm/gma_drm.h>
  23. #include "psb_drv.h"
  24. #include "psb_reg.h"
  25. #include "psb_intel_reg.h"
  26. #include "intel_bios.h"
  27. #include "psb_device.h"
  28. #include "gma_device.h"
  29. static int psb_output_init(struct drm_device *dev)
  30. {
  31. struct drm_psb_private *dev_priv = dev->dev_private;
  32. psb_intel_lvds_init(dev, &dev_priv->mode_dev);
  33. psb_intel_sdvo_init(dev, SDVOB);
  34. return 0;
  35. }
  36. #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
  37. /*
  38. * Poulsbo Backlight Interfaces
  39. */
  40. #define BLC_PWM_PRECISION_FACTOR 100 /* 10000000 */
  41. #define BLC_PWM_FREQ_CALC_CONSTANT 32
  42. #define MHz 1000000
  43. #define PSB_BLC_PWM_PRECISION_FACTOR 10
  44. #define PSB_BLC_MAX_PWM_REG_FREQ 0xFFFE
  45. #define PSB_BLC_MIN_PWM_REG_FREQ 0x2
  46. #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
  47. #define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
  48. static int psb_brightness;
  49. static struct backlight_device *psb_backlight_device;
  50. static int psb_get_brightness(struct backlight_device *bd)
  51. {
  52. /* return locally cached var instead of HW read (due to DPST etc.) */
  53. /* FIXME: ideally return actual value in case firmware fiddled with
  54. it */
  55. return psb_brightness;
  56. }
  57. static int psb_backlight_setup(struct drm_device *dev)
  58. {
  59. struct drm_psb_private *dev_priv = dev->dev_private;
  60. unsigned long core_clock;
  61. /* u32 bl_max_freq; */
  62. /* unsigned long value; */
  63. u16 bl_max_freq;
  64. uint32_t value;
  65. uint32_t blc_pwm_precision_factor;
  66. /* get bl_max_freq and pol from dev_priv*/
  67. if (!dev_priv->lvds_bl) {
  68. dev_err(dev->dev, "Has no valid LVDS backlight info\n");
  69. return -ENOENT;
  70. }
  71. bl_max_freq = dev_priv->lvds_bl->freq;
  72. blc_pwm_precision_factor = PSB_BLC_PWM_PRECISION_FACTOR;
  73. core_clock = dev_priv->core_freq;
  74. value = (core_clock * MHz) / BLC_PWM_FREQ_CALC_CONSTANT;
  75. value *= blc_pwm_precision_factor;
  76. value /= bl_max_freq;
  77. value /= blc_pwm_precision_factor;
  78. if (value > (unsigned long long)PSB_BLC_MAX_PWM_REG_FREQ ||
  79. value < (unsigned long long)PSB_BLC_MIN_PWM_REG_FREQ)
  80. return -ERANGE;
  81. else {
  82. value &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
  83. REG_WRITE(BLC_PWM_CTL,
  84. (value << PSB_BACKLIGHT_PWM_CTL_SHIFT) | (value));
  85. }
  86. return 0;
  87. }
  88. static int psb_set_brightness(struct backlight_device *bd)
  89. {
  90. struct drm_device *dev = bl_get_data(psb_backlight_device);
  91. int level = bd->props.brightness;
  92. /* Percentage 1-100% being valid */
  93. if (level < 1)
  94. level = 1;
  95. psb_intel_lvds_set_brightness(dev, level);
  96. psb_brightness = level;
  97. return 0;
  98. }
  99. static const struct backlight_ops psb_ops = {
  100. .get_brightness = psb_get_brightness,
  101. .update_status = psb_set_brightness,
  102. };
  103. static int psb_backlight_init(struct drm_device *dev)
  104. {
  105. struct drm_psb_private *dev_priv = dev->dev_private;
  106. int ret;
  107. struct backlight_properties props;
  108. memset(&props, 0, sizeof(struct backlight_properties));
  109. props.max_brightness = 100;
  110. props.type = BACKLIGHT_PLATFORM;
  111. psb_backlight_device = backlight_device_register("psb-bl",
  112. NULL, (void *)dev, &psb_ops, &props);
  113. if (IS_ERR(psb_backlight_device))
  114. return PTR_ERR(psb_backlight_device);
  115. ret = psb_backlight_setup(dev);
  116. if (ret < 0) {
  117. backlight_device_unregister(psb_backlight_device);
  118. psb_backlight_device = NULL;
  119. return ret;
  120. }
  121. psb_backlight_device->props.brightness = 100;
  122. psb_backlight_device->props.max_brightness = 100;
  123. backlight_update_status(psb_backlight_device);
  124. dev_priv->backlight_device = psb_backlight_device;
  125. /* This must occur after the backlight is properly initialised */
  126. psb_lid_timer_init(dev_priv);
  127. return 0;
  128. }
  129. #endif
  130. /*
  131. * Provide the Poulsbo specific chip logic and low level methods
  132. * for power management
  133. */
  134. static void psb_init_pm(struct drm_device *dev)
  135. {
  136. struct drm_psb_private *dev_priv = dev->dev_private;
  137. u32 gating = PSB_RSGX32(PSB_CR_CLKGATECTL);
  138. gating &= ~3; /* Disable 2D clock gating */
  139. gating |= 1;
  140. PSB_WSGX32(gating, PSB_CR_CLKGATECTL);
  141. PSB_RSGX32(PSB_CR_CLKGATECTL);
  142. }
  143. /**
  144. * psb_save_display_registers - save registers lost on suspend
  145. * @dev: our DRM device
  146. *
  147. * Save the state we need in order to be able to restore the interface
  148. * upon resume from suspend
  149. */
  150. static int psb_save_display_registers(struct drm_device *dev)
  151. {
  152. struct drm_psb_private *dev_priv = dev->dev_private;
  153. struct drm_crtc *crtc;
  154. struct drm_connector *connector;
  155. struct psb_state *regs = &dev_priv->regs.psb;
  156. /* Display arbitration control + watermarks */
  157. regs->saveDSPARB = PSB_RVDC32(DSPARB);
  158. regs->saveDSPFW1 = PSB_RVDC32(DSPFW1);
  159. regs->saveDSPFW2 = PSB_RVDC32(DSPFW2);
  160. regs->saveDSPFW3 = PSB_RVDC32(DSPFW3);
  161. regs->saveDSPFW4 = PSB_RVDC32(DSPFW4);
  162. regs->saveDSPFW5 = PSB_RVDC32(DSPFW5);
  163. regs->saveDSPFW6 = PSB_RVDC32(DSPFW6);
  164. regs->saveCHICKENBIT = PSB_RVDC32(DSPCHICKENBIT);
  165. /* Save crtc and output state */
  166. drm_modeset_lock_all(dev);
  167. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  168. if (drm_helper_crtc_in_use(crtc))
  169. crtc->funcs->save(crtc);
  170. }
  171. list_for_each_entry(connector, &dev->mode_config.connector_list, head)
  172. if (connector->funcs->save)
  173. connector->funcs->save(connector);
  174. drm_modeset_unlock_all(dev);
  175. return 0;
  176. }
  177. /**
  178. * psb_restore_display_registers - restore lost register state
  179. * @dev: our DRM device
  180. *
  181. * Restore register state that was lost during suspend and resume.
  182. */
  183. static int psb_restore_display_registers(struct drm_device *dev)
  184. {
  185. struct drm_psb_private *dev_priv = dev->dev_private;
  186. struct drm_crtc *crtc;
  187. struct drm_connector *connector;
  188. struct psb_state *regs = &dev_priv->regs.psb;
  189. /* Display arbitration + watermarks */
  190. PSB_WVDC32(regs->saveDSPARB, DSPARB);
  191. PSB_WVDC32(regs->saveDSPFW1, DSPFW1);
  192. PSB_WVDC32(regs->saveDSPFW2, DSPFW2);
  193. PSB_WVDC32(regs->saveDSPFW3, DSPFW3);
  194. PSB_WVDC32(regs->saveDSPFW4, DSPFW4);
  195. PSB_WVDC32(regs->saveDSPFW5, DSPFW5);
  196. PSB_WVDC32(regs->saveDSPFW6, DSPFW6);
  197. PSB_WVDC32(regs->saveCHICKENBIT, DSPCHICKENBIT);
  198. /*make sure VGA plane is off. it initializes to on after reset!*/
  199. PSB_WVDC32(0x80000000, VGACNTRL);
  200. drm_modeset_lock_all(dev);
  201. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
  202. if (drm_helper_crtc_in_use(crtc))
  203. crtc->funcs->restore(crtc);
  204. list_for_each_entry(connector, &dev->mode_config.connector_list, head)
  205. if (connector->funcs->restore)
  206. connector->funcs->restore(connector);
  207. drm_modeset_unlock_all(dev);
  208. return 0;
  209. }
  210. static int psb_power_down(struct drm_device *dev)
  211. {
  212. return 0;
  213. }
  214. static int psb_power_up(struct drm_device *dev)
  215. {
  216. return 0;
  217. }
  218. /* Poulsbo */
  219. static const struct psb_offset psb_regmap[2] = {
  220. {
  221. .fp0 = FPA0,
  222. .fp1 = FPA1,
  223. .cntr = DSPACNTR,
  224. .conf = PIPEACONF,
  225. .src = PIPEASRC,
  226. .dpll = DPLL_A,
  227. .htotal = HTOTAL_A,
  228. .hblank = HBLANK_A,
  229. .hsync = HSYNC_A,
  230. .vtotal = VTOTAL_A,
  231. .vblank = VBLANK_A,
  232. .vsync = VSYNC_A,
  233. .stride = DSPASTRIDE,
  234. .size = DSPASIZE,
  235. .pos = DSPAPOS,
  236. .base = DSPABASE,
  237. .surf = DSPASURF,
  238. .addr = DSPABASE,
  239. .status = PIPEASTAT,
  240. .linoff = DSPALINOFF,
  241. .tileoff = DSPATILEOFF,
  242. .palette = PALETTE_A,
  243. },
  244. {
  245. .fp0 = FPB0,
  246. .fp1 = FPB1,
  247. .cntr = DSPBCNTR,
  248. .conf = PIPEBCONF,
  249. .src = PIPEBSRC,
  250. .dpll = DPLL_B,
  251. .htotal = HTOTAL_B,
  252. .hblank = HBLANK_B,
  253. .hsync = HSYNC_B,
  254. .vtotal = VTOTAL_B,
  255. .vblank = VBLANK_B,
  256. .vsync = VSYNC_B,
  257. .stride = DSPBSTRIDE,
  258. .size = DSPBSIZE,
  259. .pos = DSPBPOS,
  260. .base = DSPBBASE,
  261. .surf = DSPBSURF,
  262. .addr = DSPBBASE,
  263. .status = PIPEBSTAT,
  264. .linoff = DSPBLINOFF,
  265. .tileoff = DSPBTILEOFF,
  266. .palette = PALETTE_B,
  267. }
  268. };
  269. static int psb_chip_setup(struct drm_device *dev)
  270. {
  271. struct drm_psb_private *dev_priv = dev->dev_private;
  272. dev_priv->regmap = psb_regmap;
  273. gma_get_core_freq(dev);
  274. gma_intel_setup_gmbus(dev);
  275. psb_intel_opregion_init(dev);
  276. psb_intel_init_bios(dev);
  277. return 0;
  278. }
  279. static void psb_chip_teardown(struct drm_device *dev)
  280. {
  281. struct drm_psb_private *dev_priv = dev->dev_private;
  282. psb_lid_timer_takedown(dev_priv);
  283. gma_intel_teardown_gmbus(dev);
  284. }
  285. const struct psb_ops psb_chip_ops = {
  286. .name = "Poulsbo",
  287. .accel_2d = 1,
  288. .pipes = 2,
  289. .crtcs = 2,
  290. .hdmi_mask = (1 << 0),
  291. .lvds_mask = (1 << 1),
  292. .sdvo_mask = (1 << 0),
  293. .cursor_needs_phys = 1,
  294. .sgx_offset = PSB_SGX_OFFSET,
  295. .chip_setup = psb_chip_setup,
  296. .chip_teardown = psb_chip_teardown,
  297. .crtc_helper = &psb_intel_helper_funcs,
  298. .crtc_funcs = &psb_intel_crtc_funcs,
  299. .clock_funcs = &psb_clock_funcs,
  300. .output_init = psb_output_init,
  301. #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
  302. .backlight_init = psb_backlight_init,
  303. #endif
  304. .init_pm = psb_init_pm,
  305. .save_regs = psb_save_display_registers,
  306. .restore_regs = psb_restore_display_registers,
  307. .power_down = psb_power_down,
  308. .power_up = psb_power_up,
  309. };