psb_drv.c 16 KB

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  1. /**************************************************************************
  2. * Copyright (c) 2007-2011, Intel Corporation.
  3. * All Rights Reserved.
  4. * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA.
  5. * All Rights Reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms and conditions of the GNU General Public License,
  9. * version 2, as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  19. *
  20. **************************************************************************/
  21. #include <drm/drmP.h>
  22. #include <drm/drm.h>
  23. #include "psb_drv.h"
  24. #include "framebuffer.h"
  25. #include "psb_reg.h"
  26. #include "psb_intel_reg.h"
  27. #include "intel_bios.h"
  28. #include "mid_bios.h"
  29. #include <drm/drm_pciids.h>
  30. #include "power.h"
  31. #include <linux/cpu.h>
  32. #include <linux/notifier.h>
  33. #include <linux/spinlock.h>
  34. #include <linux/pm_runtime.h>
  35. #include <acpi/video.h>
  36. #include <linux/module.h>
  37. static struct drm_driver driver;
  38. static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  39. /*
  40. * The table below contains a mapping of the PCI vendor ID and the PCI Device ID
  41. * to the different groups of PowerVR 5-series chip designs
  42. *
  43. * 0x8086 = Intel Corporation
  44. *
  45. * PowerVR SGX535 - Poulsbo - Intel GMA 500, Intel Atom Z5xx
  46. * PowerVR SGX535 - Moorestown - Intel GMA 600
  47. * PowerVR SGX535 - Oaktrail - Intel GMA 600, Intel Atom Z6xx, E6xx
  48. * PowerVR SGX540 - Medfield - Intel Atom Z2460
  49. * PowerVR SGX544MP2 - Medfield -
  50. * PowerVR SGX545 - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600
  51. * PowerVR SGX545 - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700,
  52. * N2800
  53. */
  54. static const struct pci_device_id pciidlist[] = {
  55. { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
  56. { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
  57. #if defined(CONFIG_DRM_GMA600)
  58. { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  59. { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  60. { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  61. { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  62. { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  63. { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  64. { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  65. { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  66. { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  67. #endif
  68. #if defined(CONFIG_DRM_MEDFIELD)
  69. { 0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  70. { 0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  71. { 0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  72. { 0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  73. { 0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  74. { 0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  75. { 0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  76. { 0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  77. #endif
  78. #if defined(CONFIG_DRM_GMA3600)
  79. { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  80. { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  81. { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  82. { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  83. { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  84. { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  85. { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  86. { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  87. { 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  88. { 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  89. { 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  90. { 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  91. { 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  92. { 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  93. { 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  94. { 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  95. #endif
  96. { 0, }
  97. };
  98. MODULE_DEVICE_TABLE(pci, pciidlist);
  99. /*
  100. * Standard IOCTLs.
  101. */
  102. static const struct drm_ioctl_desc psb_ioctls[] = {
  103. };
  104. static void psb_driver_lastclose(struct drm_device *dev)
  105. {
  106. int ret;
  107. struct drm_psb_private *dev_priv = dev->dev_private;
  108. struct psb_fbdev *fbdev = dev_priv->fbdev;
  109. ret = drm_fb_helper_restore_fbdev_mode_unlocked(&fbdev->psb_fb_helper);
  110. if (ret)
  111. DRM_DEBUG("failed to restore crtc mode\n");
  112. return;
  113. }
  114. static int psb_do_init(struct drm_device *dev)
  115. {
  116. struct drm_psb_private *dev_priv = dev->dev_private;
  117. struct psb_gtt *pg = &dev_priv->gtt;
  118. uint32_t stolen_gtt;
  119. if (pg->mmu_gatt_start & 0x0FFFFFFF) {
  120. dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n");
  121. return -EINVAL;
  122. }
  123. stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4;
  124. stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT;
  125. stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages;
  126. dev_priv->gatt_free_offset = pg->mmu_gatt_start +
  127. (stolen_gtt << PAGE_SHIFT) * 1024;
  128. spin_lock_init(&dev_priv->irqmask_lock);
  129. spin_lock_init(&dev_priv->lock_2d);
  130. PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);
  131. PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);
  132. PSB_RSGX32(PSB_CR_BIF_BANK1);
  133. /* Do not bypass any MMU access, let them pagefault instead */
  134. PSB_WSGX32((PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_MMU_ER_MASK),
  135. PSB_CR_BIF_CTRL);
  136. PSB_RSGX32(PSB_CR_BIF_CTRL);
  137. psb_spank(dev_priv);
  138. /* mmu_gatt ?? */
  139. PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
  140. PSB_RSGX32(PSB_CR_BIF_TWOD_REQ_BASE); /* Post */
  141. return 0;
  142. }
  143. static int psb_driver_unload(struct drm_device *dev)
  144. {
  145. struct drm_psb_private *dev_priv = dev->dev_private;
  146. /* TODO: Kill vblank etc here */
  147. if (dev_priv) {
  148. if (dev_priv->backlight_device)
  149. gma_backlight_exit(dev);
  150. psb_modeset_cleanup(dev);
  151. if (dev_priv->ops->chip_teardown)
  152. dev_priv->ops->chip_teardown(dev);
  153. psb_intel_opregion_fini(dev);
  154. if (dev_priv->pf_pd) {
  155. psb_mmu_free_pagedir(dev_priv->pf_pd);
  156. dev_priv->pf_pd = NULL;
  157. }
  158. if (dev_priv->mmu) {
  159. struct psb_gtt *pg = &dev_priv->gtt;
  160. down_read(&pg->sem);
  161. psb_mmu_remove_pfn_sequence(
  162. psb_mmu_get_default_pd
  163. (dev_priv->mmu),
  164. pg->mmu_gatt_start,
  165. dev_priv->vram_stolen_size >> PAGE_SHIFT);
  166. up_read(&pg->sem);
  167. psb_mmu_driver_takedown(dev_priv->mmu);
  168. dev_priv->mmu = NULL;
  169. }
  170. psb_gtt_takedown(dev);
  171. if (dev_priv->scratch_page) {
  172. set_pages_wb(dev_priv->scratch_page, 1);
  173. __free_page(dev_priv->scratch_page);
  174. dev_priv->scratch_page = NULL;
  175. }
  176. if (dev_priv->vdc_reg) {
  177. iounmap(dev_priv->vdc_reg);
  178. dev_priv->vdc_reg = NULL;
  179. }
  180. if (dev_priv->sgx_reg) {
  181. iounmap(dev_priv->sgx_reg);
  182. dev_priv->sgx_reg = NULL;
  183. }
  184. if (dev_priv->aux_reg) {
  185. iounmap(dev_priv->aux_reg);
  186. dev_priv->aux_reg = NULL;
  187. }
  188. if (dev_priv->aux_pdev)
  189. pci_dev_put(dev_priv->aux_pdev);
  190. if (dev_priv->lpc_pdev)
  191. pci_dev_put(dev_priv->lpc_pdev);
  192. /* Destroy VBT data */
  193. psb_intel_destroy_bios(dev);
  194. kfree(dev_priv);
  195. dev->dev_private = NULL;
  196. }
  197. gma_power_uninit(dev);
  198. return 0;
  199. }
  200. static int psb_driver_load(struct drm_device *dev, unsigned long flags)
  201. {
  202. struct drm_psb_private *dev_priv;
  203. unsigned long resource_start, resource_len;
  204. unsigned long irqflags;
  205. int ret = -ENOMEM;
  206. struct drm_connector *connector;
  207. struct gma_encoder *gma_encoder;
  208. struct psb_gtt *pg;
  209. /* allocating and initializing driver private data */
  210. dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
  211. if (dev_priv == NULL)
  212. return -ENOMEM;
  213. dev_priv->ops = (struct psb_ops *)flags;
  214. dev_priv->dev = dev;
  215. dev->dev_private = (void *) dev_priv;
  216. pg = &dev_priv->gtt;
  217. pci_set_master(dev->pdev);
  218. dev_priv->num_pipe = dev_priv->ops->pipes;
  219. resource_start = pci_resource_start(dev->pdev, PSB_MMIO_RESOURCE);
  220. dev_priv->vdc_reg =
  221. ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE);
  222. if (!dev_priv->vdc_reg)
  223. goto out_err;
  224. dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset,
  225. PSB_SGX_SIZE);
  226. if (!dev_priv->sgx_reg)
  227. goto out_err;
  228. if (IS_MRST(dev)) {
  229. dev_priv->aux_pdev = pci_get_bus_and_slot(0, PCI_DEVFN(3, 0));
  230. if (dev_priv->aux_pdev) {
  231. resource_start = pci_resource_start(dev_priv->aux_pdev,
  232. PSB_AUX_RESOURCE);
  233. resource_len = pci_resource_len(dev_priv->aux_pdev,
  234. PSB_AUX_RESOURCE);
  235. dev_priv->aux_reg = ioremap_nocache(resource_start,
  236. resource_len);
  237. if (!dev_priv->aux_reg)
  238. goto out_err;
  239. DRM_DEBUG_KMS("Found aux vdc");
  240. } else {
  241. /* Couldn't find the aux vdc so map to primary vdc */
  242. dev_priv->aux_reg = dev_priv->vdc_reg;
  243. DRM_DEBUG_KMS("Couldn't find aux pci device");
  244. }
  245. dev_priv->gmbus_reg = dev_priv->aux_reg;
  246. dev_priv->lpc_pdev = pci_get_bus_and_slot(0, PCI_DEVFN(31, 0));
  247. if (dev_priv->lpc_pdev) {
  248. pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
  249. &dev_priv->lpc_gpio_base);
  250. pci_write_config_dword(dev_priv->lpc_pdev, PSB_LPC_GBA,
  251. (u32)dev_priv->lpc_gpio_base | (1L<<31));
  252. pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
  253. &dev_priv->lpc_gpio_base);
  254. dev_priv->lpc_gpio_base &= 0xffc0;
  255. if (dev_priv->lpc_gpio_base)
  256. DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n",
  257. dev_priv->lpc_gpio_base);
  258. else {
  259. pci_dev_put(dev_priv->lpc_pdev);
  260. dev_priv->lpc_pdev = NULL;
  261. }
  262. }
  263. } else {
  264. dev_priv->gmbus_reg = dev_priv->vdc_reg;
  265. }
  266. psb_intel_opregion_setup(dev);
  267. ret = dev_priv->ops->chip_setup(dev);
  268. if (ret)
  269. goto out_err;
  270. /* Init OSPM support */
  271. gma_power_init(dev);
  272. ret = -ENOMEM;
  273. dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO);
  274. if (!dev_priv->scratch_page)
  275. goto out_err;
  276. set_pages_uc(dev_priv->scratch_page, 1);
  277. ret = psb_gtt_init(dev, 0);
  278. if (ret)
  279. goto out_err;
  280. dev_priv->mmu = psb_mmu_driver_init(dev, 1, 0, 0);
  281. if (!dev_priv->mmu)
  282. goto out_err;
  283. dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0);
  284. if (!dev_priv->pf_pd)
  285. goto out_err;
  286. ret = psb_do_init(dev);
  287. if (ret)
  288. return ret;
  289. /* Add stolen memory to SGX MMU */
  290. down_read(&pg->sem);
  291. ret = psb_mmu_insert_pfn_sequence(psb_mmu_get_default_pd(dev_priv->mmu),
  292. dev_priv->stolen_base >> PAGE_SHIFT,
  293. pg->gatt_start,
  294. pg->stolen_size >> PAGE_SHIFT, 0);
  295. up_read(&pg->sem);
  296. psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
  297. psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
  298. PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
  299. PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
  300. acpi_video_register();
  301. /* Setup vertical blanking handling */
  302. ret = drm_vblank_init(dev, dev_priv->num_pipe);
  303. if (ret)
  304. goto out_err;
  305. /*
  306. * Install interrupt handlers prior to powering off SGX or else we will
  307. * crash.
  308. */
  309. dev_priv->vdc_irq_mask = 0;
  310. dev_priv->pipestat[0] = 0;
  311. dev_priv->pipestat[1] = 0;
  312. dev_priv->pipestat[2] = 0;
  313. spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
  314. PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
  315. PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
  316. PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
  317. spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
  318. drm_irq_install(dev, dev->pdev->irq);
  319. dev->vblank_disable_allowed = true;
  320. dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
  321. dev->driver->get_vblank_counter = psb_get_vblank_counter;
  322. psb_modeset_init(dev);
  323. psb_fbdev_init(dev);
  324. drm_kms_helper_poll_init(dev);
  325. /* Only add backlight support if we have LVDS output */
  326. list_for_each_entry(connector, &dev->mode_config.connector_list,
  327. head) {
  328. gma_encoder = gma_attached_encoder(connector);
  329. switch (gma_encoder->type) {
  330. case INTEL_OUTPUT_LVDS:
  331. case INTEL_OUTPUT_MIPI:
  332. ret = gma_backlight_init(dev);
  333. break;
  334. }
  335. }
  336. if (ret)
  337. return ret;
  338. psb_intel_opregion_enable_asle(dev);
  339. #if 0
  340. /* Enable runtime pm at last */
  341. pm_runtime_enable(&dev->pdev->dev);
  342. pm_runtime_set_active(&dev->pdev->dev);
  343. #endif
  344. /* Intel drm driver load is done, continue doing pvr load */
  345. return 0;
  346. out_err:
  347. psb_driver_unload(dev);
  348. return ret;
  349. }
  350. static int psb_driver_device_is_agp(struct drm_device *dev)
  351. {
  352. return 0;
  353. }
  354. static inline void get_brightness(struct backlight_device *bd)
  355. {
  356. #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
  357. if (bd) {
  358. bd->props.brightness = bd->ops->get_brightness(bd);
  359. backlight_update_status(bd);
  360. }
  361. #endif
  362. }
  363. static long psb_unlocked_ioctl(struct file *filp, unsigned int cmd,
  364. unsigned long arg)
  365. {
  366. struct drm_file *file_priv = filp->private_data;
  367. struct drm_device *dev = file_priv->minor->dev;
  368. struct drm_psb_private *dev_priv = dev->dev_private;
  369. static unsigned int runtime_allowed;
  370. if (runtime_allowed == 1 && dev_priv->is_lvds_on) {
  371. runtime_allowed++;
  372. pm_runtime_allow(&dev->pdev->dev);
  373. dev_priv->rpm_enabled = 1;
  374. }
  375. return drm_ioctl(filp, cmd, arg);
  376. /* FIXME: do we need to wrap the other side of this */
  377. }
  378. /*
  379. * When a client dies:
  380. * - Check for and clean up flipped page state
  381. */
  382. static void psb_driver_preclose(struct drm_device *dev, struct drm_file *priv)
  383. {
  384. }
  385. static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  386. {
  387. return drm_get_pci_dev(pdev, ent, &driver);
  388. }
  389. static void psb_pci_remove(struct pci_dev *pdev)
  390. {
  391. struct drm_device *dev = pci_get_drvdata(pdev);
  392. drm_put_dev(dev);
  393. }
  394. static const struct dev_pm_ops psb_pm_ops = {
  395. .resume = gma_power_resume,
  396. .suspend = gma_power_suspend,
  397. .thaw = gma_power_thaw,
  398. .freeze = gma_power_freeze,
  399. .restore = gma_power_restore,
  400. .runtime_suspend = psb_runtime_suspend,
  401. .runtime_resume = psb_runtime_resume,
  402. .runtime_idle = psb_runtime_idle,
  403. };
  404. static const struct vm_operations_struct psb_gem_vm_ops = {
  405. .fault = psb_gem_fault,
  406. .open = drm_gem_vm_open,
  407. .close = drm_gem_vm_close,
  408. };
  409. static const struct file_operations psb_gem_fops = {
  410. .owner = THIS_MODULE,
  411. .open = drm_open,
  412. .release = drm_release,
  413. .unlocked_ioctl = psb_unlocked_ioctl,
  414. #ifdef CONFIG_COMPAT
  415. .compat_ioctl = drm_compat_ioctl,
  416. #endif
  417. .mmap = drm_gem_mmap,
  418. .poll = drm_poll,
  419. .read = drm_read,
  420. };
  421. static struct drm_driver driver = {
  422. .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | \
  423. DRIVER_MODESET | DRIVER_GEM,
  424. .load = psb_driver_load,
  425. .unload = psb_driver_unload,
  426. .lastclose = psb_driver_lastclose,
  427. .preclose = psb_driver_preclose,
  428. .set_busid = drm_pci_set_busid,
  429. .num_ioctls = ARRAY_SIZE(psb_ioctls),
  430. .device_is_agp = psb_driver_device_is_agp,
  431. .irq_preinstall = psb_irq_preinstall,
  432. .irq_postinstall = psb_irq_postinstall,
  433. .irq_uninstall = psb_irq_uninstall,
  434. .irq_handler = psb_irq_handler,
  435. .enable_vblank = psb_enable_vblank,
  436. .disable_vblank = psb_disable_vblank,
  437. .get_vblank_counter = psb_get_vblank_counter,
  438. .gem_free_object = psb_gem_free_object,
  439. .gem_vm_ops = &psb_gem_vm_ops,
  440. .dumb_create = psb_gem_dumb_create,
  441. .dumb_map_offset = psb_gem_dumb_map_gtt,
  442. .dumb_destroy = drm_gem_dumb_destroy,
  443. .ioctls = psb_ioctls,
  444. .fops = &psb_gem_fops,
  445. .name = DRIVER_NAME,
  446. .desc = DRIVER_DESC,
  447. .date = DRIVER_DATE,
  448. .major = DRIVER_MAJOR,
  449. .minor = DRIVER_MINOR,
  450. .patchlevel = DRIVER_PATCHLEVEL
  451. };
  452. static struct pci_driver psb_pci_driver = {
  453. .name = DRIVER_NAME,
  454. .id_table = pciidlist,
  455. .probe = psb_pci_probe,
  456. .remove = psb_pci_remove,
  457. .driver.pm = &psb_pm_ops,
  458. };
  459. static int __init psb_init(void)
  460. {
  461. return drm_pci_init(&driver, &psb_pci_driver);
  462. }
  463. static void __exit psb_exit(void)
  464. {
  465. drm_pci_exit(&driver, &psb_pci_driver);
  466. }
  467. late_initcall(psb_init);
  468. module_exit(psb_exit);
  469. MODULE_AUTHOR(DRIVER_AUTHOR);
  470. MODULE_DESCRIPTION(DRIVER_DESC);
  471. MODULE_LICENSE(DRIVER_LICENSE);