psb_intel_lvds.c 24 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * You should have received a copy of the GNU General Public License along with
  14. * this program; if not, write to the Free Software Foundation, Inc.,
  15. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  16. *
  17. * Authors:
  18. * Eric Anholt <eric@anholt.net>
  19. * Dave Airlie <airlied@linux.ie>
  20. * Jesse Barnes <jesse.barnes@intel.com>
  21. */
  22. #include <linux/i2c.h>
  23. #include <drm/drmP.h>
  24. #include "intel_bios.h"
  25. #include "psb_drv.h"
  26. #include "psb_intel_drv.h"
  27. #include "psb_intel_reg.h"
  28. #include "power.h"
  29. #include <linux/pm_runtime.h>
  30. /*
  31. * LVDS I2C backlight control macros
  32. */
  33. #define BRIGHTNESS_MAX_LEVEL 100
  34. #define BRIGHTNESS_MASK 0xFF
  35. #define BLC_I2C_TYPE 0x01
  36. #define BLC_PWM_TYPT 0x02
  37. #define BLC_POLARITY_NORMAL 0
  38. #define BLC_POLARITY_INVERSE 1
  39. #define PSB_BLC_MAX_PWM_REG_FREQ (0xFFFE)
  40. #define PSB_BLC_MIN_PWM_REG_FREQ (0x2)
  41. #define PSB_BLC_PWM_PRECISION_FACTOR (10)
  42. #define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
  43. #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
  44. struct psb_intel_lvds_priv {
  45. /*
  46. * Saved LVDO output states
  47. */
  48. uint32_t savePP_ON;
  49. uint32_t savePP_OFF;
  50. uint32_t saveLVDS;
  51. uint32_t savePP_CONTROL;
  52. uint32_t savePP_CYCLE;
  53. uint32_t savePFIT_CONTROL;
  54. uint32_t savePFIT_PGM_RATIOS;
  55. uint32_t saveBLC_PWM_CTL;
  56. struct psb_intel_i2c_chan *i2c_bus;
  57. struct psb_intel_i2c_chan *ddc_bus;
  58. };
  59. /*
  60. * Returns the maximum level of the backlight duty cycle field.
  61. */
  62. static u32 psb_intel_lvds_get_max_backlight(struct drm_device *dev)
  63. {
  64. struct drm_psb_private *dev_priv = dev->dev_private;
  65. u32 ret;
  66. if (gma_power_begin(dev, false)) {
  67. ret = REG_READ(BLC_PWM_CTL);
  68. gma_power_end(dev);
  69. } else /* Powered off, use the saved value */
  70. ret = dev_priv->regs.saveBLC_PWM_CTL;
  71. /* Top 15bits hold the frequency mask */
  72. ret = (ret & BACKLIGHT_MODULATION_FREQ_MASK) >>
  73. BACKLIGHT_MODULATION_FREQ_SHIFT;
  74. ret *= 2; /* Return a 16bit range as needed for setting */
  75. if (ret == 0)
  76. dev_err(dev->dev, "BL bug: Reg %08x save %08X\n",
  77. REG_READ(BLC_PWM_CTL), dev_priv->regs.saveBLC_PWM_CTL);
  78. return ret;
  79. }
  80. /*
  81. * Set LVDS backlight level by I2C command
  82. *
  83. * FIXME: at some point we need to both track this for PM and also
  84. * disable runtime pm on MRST if the brightness is nil (ie blanked)
  85. */
  86. static int psb_lvds_i2c_set_brightness(struct drm_device *dev,
  87. unsigned int level)
  88. {
  89. struct drm_psb_private *dev_priv =
  90. (struct drm_psb_private *)dev->dev_private;
  91. struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
  92. u8 out_buf[2];
  93. unsigned int blc_i2c_brightness;
  94. struct i2c_msg msgs[] = {
  95. {
  96. .addr = lvds_i2c_bus->slave_addr,
  97. .flags = 0,
  98. .len = 2,
  99. .buf = out_buf,
  100. }
  101. };
  102. blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level *
  103. BRIGHTNESS_MASK /
  104. BRIGHTNESS_MAX_LEVEL);
  105. if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
  106. blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness;
  107. out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
  108. out_buf[1] = (u8)blc_i2c_brightness;
  109. if (i2c_transfer(&lvds_i2c_bus->adapter, msgs, 1) == 1) {
  110. dev_dbg(dev->dev, "I2C set brightness.(command, value) (%d, %d)\n",
  111. dev_priv->lvds_bl->brightnesscmd,
  112. blc_i2c_brightness);
  113. return 0;
  114. }
  115. dev_err(dev->dev, "I2C transfer error\n");
  116. return -1;
  117. }
  118. static int psb_lvds_pwm_set_brightness(struct drm_device *dev, int level)
  119. {
  120. struct drm_psb_private *dev_priv =
  121. (struct drm_psb_private *)dev->dev_private;
  122. u32 max_pwm_blc;
  123. u32 blc_pwm_duty_cycle;
  124. max_pwm_blc = psb_intel_lvds_get_max_backlight(dev);
  125. /*BLC_PWM_CTL Should be initiated while backlight device init*/
  126. BUG_ON(max_pwm_blc == 0);
  127. blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL;
  128. if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
  129. blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle;
  130. blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
  131. REG_WRITE(BLC_PWM_CTL,
  132. (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
  133. (blc_pwm_duty_cycle));
  134. dev_info(dev->dev, "Backlight lvds set brightness %08x\n",
  135. (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
  136. (blc_pwm_duty_cycle));
  137. return 0;
  138. }
  139. /*
  140. * Set LVDS backlight level either by I2C or PWM
  141. */
  142. void psb_intel_lvds_set_brightness(struct drm_device *dev, int level)
  143. {
  144. struct drm_psb_private *dev_priv = dev->dev_private;
  145. dev_dbg(dev->dev, "backlight level is %d\n", level);
  146. if (!dev_priv->lvds_bl) {
  147. dev_err(dev->dev, "NO LVDS backlight info\n");
  148. return;
  149. }
  150. if (dev_priv->lvds_bl->type == BLC_I2C_TYPE)
  151. psb_lvds_i2c_set_brightness(dev, level);
  152. else
  153. psb_lvds_pwm_set_brightness(dev, level);
  154. }
  155. /*
  156. * Sets the backlight level.
  157. *
  158. * level: backlight level, from 0 to psb_intel_lvds_get_max_backlight().
  159. */
  160. static void psb_intel_lvds_set_backlight(struct drm_device *dev, int level)
  161. {
  162. struct drm_psb_private *dev_priv = dev->dev_private;
  163. u32 blc_pwm_ctl;
  164. if (gma_power_begin(dev, false)) {
  165. blc_pwm_ctl = REG_READ(BLC_PWM_CTL);
  166. blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
  167. REG_WRITE(BLC_PWM_CTL,
  168. (blc_pwm_ctl |
  169. (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
  170. dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
  171. (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
  172. gma_power_end(dev);
  173. } else {
  174. blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
  175. ~BACKLIGHT_DUTY_CYCLE_MASK;
  176. dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
  177. (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
  178. }
  179. }
  180. /*
  181. * Sets the power state for the panel.
  182. */
  183. static void psb_intel_lvds_set_power(struct drm_device *dev, bool on)
  184. {
  185. struct drm_psb_private *dev_priv = dev->dev_private;
  186. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  187. u32 pp_status;
  188. if (!gma_power_begin(dev, true)) {
  189. dev_err(dev->dev, "set power, chip off!\n");
  190. return;
  191. }
  192. if (on) {
  193. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
  194. POWER_TARGET_ON);
  195. do {
  196. pp_status = REG_READ(PP_STATUS);
  197. } while ((pp_status & PP_ON) == 0);
  198. psb_intel_lvds_set_backlight(dev,
  199. mode_dev->backlight_duty_cycle);
  200. } else {
  201. psb_intel_lvds_set_backlight(dev, 0);
  202. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
  203. ~POWER_TARGET_ON);
  204. do {
  205. pp_status = REG_READ(PP_STATUS);
  206. } while (pp_status & PP_ON);
  207. }
  208. gma_power_end(dev);
  209. }
  210. static void psb_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
  211. {
  212. struct drm_device *dev = encoder->dev;
  213. if (mode == DRM_MODE_DPMS_ON)
  214. psb_intel_lvds_set_power(dev, true);
  215. else
  216. psb_intel_lvds_set_power(dev, false);
  217. /* XXX: We never power down the LVDS pairs. */
  218. }
  219. static void psb_intel_lvds_save(struct drm_connector *connector)
  220. {
  221. struct drm_device *dev = connector->dev;
  222. struct drm_psb_private *dev_priv =
  223. (struct drm_psb_private *)dev->dev_private;
  224. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  225. struct psb_intel_lvds_priv *lvds_priv =
  226. (struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
  227. lvds_priv->savePP_ON = REG_READ(LVDSPP_ON);
  228. lvds_priv->savePP_OFF = REG_READ(LVDSPP_OFF);
  229. lvds_priv->saveLVDS = REG_READ(LVDS);
  230. lvds_priv->savePP_CONTROL = REG_READ(PP_CONTROL);
  231. lvds_priv->savePP_CYCLE = REG_READ(PP_CYCLE);
  232. /*lvds_priv->savePP_DIVISOR = REG_READ(PP_DIVISOR);*/
  233. lvds_priv->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
  234. lvds_priv->savePFIT_CONTROL = REG_READ(PFIT_CONTROL);
  235. lvds_priv->savePFIT_PGM_RATIOS = REG_READ(PFIT_PGM_RATIOS);
  236. /*TODO: move backlight_duty_cycle to psb_intel_lvds_priv*/
  237. dev_priv->backlight_duty_cycle = (dev_priv->regs.saveBLC_PWM_CTL &
  238. BACKLIGHT_DUTY_CYCLE_MASK);
  239. /*
  240. * If the light is off at server startup,
  241. * just make it full brightness
  242. */
  243. if (dev_priv->backlight_duty_cycle == 0)
  244. dev_priv->backlight_duty_cycle =
  245. psb_intel_lvds_get_max_backlight(dev);
  246. dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
  247. lvds_priv->savePP_ON,
  248. lvds_priv->savePP_OFF,
  249. lvds_priv->saveLVDS,
  250. lvds_priv->savePP_CONTROL,
  251. lvds_priv->savePP_CYCLE,
  252. lvds_priv->saveBLC_PWM_CTL);
  253. }
  254. static void psb_intel_lvds_restore(struct drm_connector *connector)
  255. {
  256. struct drm_device *dev = connector->dev;
  257. u32 pp_status;
  258. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  259. struct psb_intel_lvds_priv *lvds_priv =
  260. (struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
  261. dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
  262. lvds_priv->savePP_ON,
  263. lvds_priv->savePP_OFF,
  264. lvds_priv->saveLVDS,
  265. lvds_priv->savePP_CONTROL,
  266. lvds_priv->savePP_CYCLE,
  267. lvds_priv->saveBLC_PWM_CTL);
  268. REG_WRITE(BLC_PWM_CTL, lvds_priv->saveBLC_PWM_CTL);
  269. REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL);
  270. REG_WRITE(PFIT_PGM_RATIOS, lvds_priv->savePFIT_PGM_RATIOS);
  271. REG_WRITE(LVDSPP_ON, lvds_priv->savePP_ON);
  272. REG_WRITE(LVDSPP_OFF, lvds_priv->savePP_OFF);
  273. /*REG_WRITE(PP_DIVISOR, lvds_priv->savePP_DIVISOR);*/
  274. REG_WRITE(PP_CYCLE, lvds_priv->savePP_CYCLE);
  275. REG_WRITE(PP_CONTROL, lvds_priv->savePP_CONTROL);
  276. REG_WRITE(LVDS, lvds_priv->saveLVDS);
  277. if (lvds_priv->savePP_CONTROL & POWER_TARGET_ON) {
  278. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
  279. POWER_TARGET_ON);
  280. do {
  281. pp_status = REG_READ(PP_STATUS);
  282. } while ((pp_status & PP_ON) == 0);
  283. } else {
  284. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
  285. ~POWER_TARGET_ON);
  286. do {
  287. pp_status = REG_READ(PP_STATUS);
  288. } while (pp_status & PP_ON);
  289. }
  290. }
  291. enum drm_mode_status psb_intel_lvds_mode_valid(struct drm_connector *connector,
  292. struct drm_display_mode *mode)
  293. {
  294. struct drm_psb_private *dev_priv = connector->dev->dev_private;
  295. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  296. struct drm_display_mode *fixed_mode =
  297. dev_priv->mode_dev.panel_fixed_mode;
  298. if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
  299. fixed_mode = dev_priv->mode_dev.panel_fixed_mode2;
  300. /* just in case */
  301. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  302. return MODE_NO_DBLESCAN;
  303. /* just in case */
  304. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  305. return MODE_NO_INTERLACE;
  306. if (fixed_mode) {
  307. if (mode->hdisplay > fixed_mode->hdisplay)
  308. return MODE_PANEL;
  309. if (mode->vdisplay > fixed_mode->vdisplay)
  310. return MODE_PANEL;
  311. }
  312. return MODE_OK;
  313. }
  314. bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder,
  315. const struct drm_display_mode *mode,
  316. struct drm_display_mode *adjusted_mode)
  317. {
  318. struct drm_device *dev = encoder->dev;
  319. struct drm_psb_private *dev_priv = dev->dev_private;
  320. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  321. struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
  322. struct drm_encoder *tmp_encoder;
  323. struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
  324. struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
  325. if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
  326. panel_fixed_mode = mode_dev->panel_fixed_mode2;
  327. /* PSB requires the LVDS is on pipe B, MRST has only one pipe anyway */
  328. if (!IS_MRST(dev) && gma_crtc->pipe == 0) {
  329. printk(KERN_ERR "Can't support LVDS on pipe A\n");
  330. return false;
  331. }
  332. if (IS_MRST(dev) && gma_crtc->pipe != 0) {
  333. printk(KERN_ERR "Must use PIPE A\n");
  334. return false;
  335. }
  336. /* Should never happen!! */
  337. list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
  338. head) {
  339. if (tmp_encoder != encoder
  340. && tmp_encoder->crtc == encoder->crtc) {
  341. printk(KERN_ERR "Can't enable LVDS and another "
  342. "encoder on the same pipe\n");
  343. return false;
  344. }
  345. }
  346. /*
  347. * If we have timings from the BIOS for the panel, put them in
  348. * to the adjusted mode. The CRTC will be set up for this mode,
  349. * with the panel scaling set up to source from the H/VDisplay
  350. * of the original mode.
  351. */
  352. if (panel_fixed_mode != NULL) {
  353. adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
  354. adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
  355. adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
  356. adjusted_mode->htotal = panel_fixed_mode->htotal;
  357. adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
  358. adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
  359. adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
  360. adjusted_mode->vtotal = panel_fixed_mode->vtotal;
  361. adjusted_mode->clock = panel_fixed_mode->clock;
  362. drm_mode_set_crtcinfo(adjusted_mode,
  363. CRTC_INTERLACE_HALVE_V);
  364. }
  365. /*
  366. * XXX: It would be nice to support lower refresh rates on the
  367. * panels to reduce power consumption, and perhaps match the
  368. * user's requested refresh rate.
  369. */
  370. return true;
  371. }
  372. static void psb_intel_lvds_prepare(struct drm_encoder *encoder)
  373. {
  374. struct drm_device *dev = encoder->dev;
  375. struct drm_psb_private *dev_priv = dev->dev_private;
  376. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  377. if (!gma_power_begin(dev, true))
  378. return;
  379. mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
  380. mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
  381. BACKLIGHT_DUTY_CYCLE_MASK);
  382. psb_intel_lvds_set_power(dev, false);
  383. gma_power_end(dev);
  384. }
  385. static void psb_intel_lvds_commit(struct drm_encoder *encoder)
  386. {
  387. struct drm_device *dev = encoder->dev;
  388. struct drm_psb_private *dev_priv = dev->dev_private;
  389. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  390. if (mode_dev->backlight_duty_cycle == 0)
  391. mode_dev->backlight_duty_cycle =
  392. psb_intel_lvds_get_max_backlight(dev);
  393. psb_intel_lvds_set_power(dev, true);
  394. }
  395. static void psb_intel_lvds_mode_set(struct drm_encoder *encoder,
  396. struct drm_display_mode *mode,
  397. struct drm_display_mode *adjusted_mode)
  398. {
  399. struct drm_device *dev = encoder->dev;
  400. struct drm_psb_private *dev_priv = dev->dev_private;
  401. u32 pfit_control;
  402. /*
  403. * The LVDS pin pair will already have been turned on in the
  404. * psb_intel_crtc_mode_set since it has a large impact on the DPLL
  405. * settings.
  406. */
  407. /*
  408. * Enable automatic panel scaling so that non-native modes fill the
  409. * screen. Should be enabled before the pipe is enabled, according to
  410. * register description and PRM.
  411. */
  412. if (mode->hdisplay != adjusted_mode->hdisplay ||
  413. mode->vdisplay != adjusted_mode->vdisplay)
  414. pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
  415. HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
  416. HORIZ_INTERP_BILINEAR);
  417. else
  418. pfit_control = 0;
  419. if (dev_priv->lvds_dither)
  420. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  421. REG_WRITE(PFIT_CONTROL, pfit_control);
  422. }
  423. /*
  424. * Detect the LVDS connection.
  425. *
  426. * This always returns CONNECTOR_STATUS_CONNECTED.
  427. * This connector should only have
  428. * been set up if the LVDS was actually connected anyway.
  429. */
  430. static enum drm_connector_status psb_intel_lvds_detect(struct drm_connector
  431. *connector, bool force)
  432. {
  433. return connector_status_connected;
  434. }
  435. /*
  436. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  437. */
  438. static int psb_intel_lvds_get_modes(struct drm_connector *connector)
  439. {
  440. struct drm_device *dev = connector->dev;
  441. struct drm_psb_private *dev_priv = dev->dev_private;
  442. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  443. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  444. struct psb_intel_lvds_priv *lvds_priv = gma_encoder->dev_priv;
  445. int ret = 0;
  446. if (!IS_MRST(dev))
  447. ret = psb_intel_ddc_get_modes(connector, &lvds_priv->i2c_bus->adapter);
  448. if (ret)
  449. return ret;
  450. /* Didn't get an EDID, so
  451. * Set wide sync ranges so we get all modes
  452. * handed to valid_mode for checking
  453. */
  454. connector->display_info.min_vfreq = 0;
  455. connector->display_info.max_vfreq = 200;
  456. connector->display_info.min_hfreq = 0;
  457. connector->display_info.max_hfreq = 200;
  458. if (mode_dev->panel_fixed_mode != NULL) {
  459. struct drm_display_mode *mode =
  460. drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
  461. drm_mode_probed_add(connector, mode);
  462. return 1;
  463. }
  464. return 0;
  465. }
  466. /**
  467. * psb_intel_lvds_destroy - unregister and free LVDS structures
  468. * @connector: connector to free
  469. *
  470. * Unregister the DDC bus for this connector then free the driver private
  471. * structure.
  472. */
  473. void psb_intel_lvds_destroy(struct drm_connector *connector)
  474. {
  475. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  476. struct psb_intel_lvds_priv *lvds_priv = gma_encoder->dev_priv;
  477. if (lvds_priv->ddc_bus)
  478. psb_intel_i2c_destroy(lvds_priv->ddc_bus);
  479. drm_connector_unregister(connector);
  480. drm_connector_cleanup(connector);
  481. kfree(connector);
  482. }
  483. int psb_intel_lvds_set_property(struct drm_connector *connector,
  484. struct drm_property *property,
  485. uint64_t value)
  486. {
  487. struct drm_encoder *encoder = connector->encoder;
  488. if (!encoder)
  489. return -1;
  490. if (!strcmp(property->name, "scaling mode")) {
  491. struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
  492. uint64_t curval;
  493. if (!crtc)
  494. goto set_prop_error;
  495. switch (value) {
  496. case DRM_MODE_SCALE_FULLSCREEN:
  497. break;
  498. case DRM_MODE_SCALE_NO_SCALE:
  499. break;
  500. case DRM_MODE_SCALE_ASPECT:
  501. break;
  502. default:
  503. goto set_prop_error;
  504. }
  505. if (drm_object_property_get_value(&connector->base,
  506. property,
  507. &curval))
  508. goto set_prop_error;
  509. if (curval == value)
  510. goto set_prop_done;
  511. if (drm_object_property_set_value(&connector->base,
  512. property,
  513. value))
  514. goto set_prop_error;
  515. if (crtc->saved_mode.hdisplay != 0 &&
  516. crtc->saved_mode.vdisplay != 0) {
  517. if (!drm_crtc_helper_set_mode(encoder->crtc,
  518. &crtc->saved_mode,
  519. encoder->crtc->x,
  520. encoder->crtc->y,
  521. encoder->crtc->primary->fb))
  522. goto set_prop_error;
  523. }
  524. } else if (!strcmp(property->name, "backlight")) {
  525. if (drm_object_property_set_value(&connector->base,
  526. property,
  527. value))
  528. goto set_prop_error;
  529. else
  530. gma_backlight_set(encoder->dev, value);
  531. } else if (!strcmp(property->name, "DPMS")) {
  532. const struct drm_encoder_helper_funcs *hfuncs
  533. = encoder->helper_private;
  534. hfuncs->dpms(encoder, value);
  535. }
  536. set_prop_done:
  537. return 0;
  538. set_prop_error:
  539. return -1;
  540. }
  541. static const struct drm_encoder_helper_funcs psb_intel_lvds_helper_funcs = {
  542. .dpms = psb_intel_lvds_encoder_dpms,
  543. .mode_fixup = psb_intel_lvds_mode_fixup,
  544. .prepare = psb_intel_lvds_prepare,
  545. .mode_set = psb_intel_lvds_mode_set,
  546. .commit = psb_intel_lvds_commit,
  547. };
  548. const struct drm_connector_helper_funcs
  549. psb_intel_lvds_connector_helper_funcs = {
  550. .get_modes = psb_intel_lvds_get_modes,
  551. .mode_valid = psb_intel_lvds_mode_valid,
  552. .best_encoder = gma_best_encoder,
  553. };
  554. const struct drm_connector_funcs psb_intel_lvds_connector_funcs = {
  555. .dpms = drm_helper_connector_dpms,
  556. .save = psb_intel_lvds_save,
  557. .restore = psb_intel_lvds_restore,
  558. .detect = psb_intel_lvds_detect,
  559. .fill_modes = drm_helper_probe_single_connector_modes,
  560. .set_property = psb_intel_lvds_set_property,
  561. .destroy = psb_intel_lvds_destroy,
  562. };
  563. static void psb_intel_lvds_enc_destroy(struct drm_encoder *encoder)
  564. {
  565. drm_encoder_cleanup(encoder);
  566. }
  567. const struct drm_encoder_funcs psb_intel_lvds_enc_funcs = {
  568. .destroy = psb_intel_lvds_enc_destroy,
  569. };
  570. /**
  571. * psb_intel_lvds_init - setup LVDS connectors on this device
  572. * @dev: drm device
  573. *
  574. * Create the connector, register the LVDS DDC bus, and try to figure out what
  575. * modes we can display on the LVDS panel (if present).
  576. */
  577. void psb_intel_lvds_init(struct drm_device *dev,
  578. struct psb_intel_mode_device *mode_dev)
  579. {
  580. struct gma_encoder *gma_encoder;
  581. struct gma_connector *gma_connector;
  582. struct psb_intel_lvds_priv *lvds_priv;
  583. struct drm_connector *connector;
  584. struct drm_encoder *encoder;
  585. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  586. struct drm_crtc *crtc;
  587. struct drm_psb_private *dev_priv = dev->dev_private;
  588. u32 lvds;
  589. int pipe;
  590. gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
  591. if (!gma_encoder) {
  592. dev_err(dev->dev, "gma_encoder allocation error\n");
  593. return;
  594. }
  595. gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
  596. if (!gma_connector) {
  597. dev_err(dev->dev, "gma_connector allocation error\n");
  598. goto failed_encoder;
  599. }
  600. lvds_priv = kzalloc(sizeof(struct psb_intel_lvds_priv), GFP_KERNEL);
  601. if (!lvds_priv) {
  602. dev_err(dev->dev, "LVDS private allocation error\n");
  603. goto failed_connector;
  604. }
  605. gma_encoder->dev_priv = lvds_priv;
  606. connector = &gma_connector->base;
  607. encoder = &gma_encoder->base;
  608. drm_connector_init(dev, connector,
  609. &psb_intel_lvds_connector_funcs,
  610. DRM_MODE_CONNECTOR_LVDS);
  611. drm_encoder_init(dev, encoder,
  612. &psb_intel_lvds_enc_funcs,
  613. DRM_MODE_ENCODER_LVDS);
  614. gma_connector_attach_encoder(gma_connector, gma_encoder);
  615. gma_encoder->type = INTEL_OUTPUT_LVDS;
  616. drm_encoder_helper_add(encoder, &psb_intel_lvds_helper_funcs);
  617. drm_connector_helper_add(connector,
  618. &psb_intel_lvds_connector_helper_funcs);
  619. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  620. connector->interlace_allowed = false;
  621. connector->doublescan_allowed = false;
  622. /*Attach connector properties*/
  623. drm_object_attach_property(&connector->base,
  624. dev->mode_config.scaling_mode_property,
  625. DRM_MODE_SCALE_FULLSCREEN);
  626. drm_object_attach_property(&connector->base,
  627. dev_priv->backlight_property,
  628. BRIGHTNESS_MAX_LEVEL);
  629. /*
  630. * Set up I2C bus
  631. * FIXME: distroy i2c_bus when exit
  632. */
  633. lvds_priv->i2c_bus = psb_intel_i2c_create(dev, GPIOB, "LVDSBLC_B");
  634. if (!lvds_priv->i2c_bus) {
  635. dev_printk(KERN_ERR,
  636. &dev->pdev->dev, "I2C bus registration failed.\n");
  637. goto failed_blc_i2c;
  638. }
  639. lvds_priv->i2c_bus->slave_addr = 0x2C;
  640. dev_priv->lvds_i2c_bus = lvds_priv->i2c_bus;
  641. /*
  642. * LVDS discovery:
  643. * 1) check for EDID on DDC
  644. * 2) check for VBT data
  645. * 3) check to see if LVDS is already on
  646. * if none of the above, no panel
  647. * 4) make sure lid is open
  648. * if closed, act like it's not there for now
  649. */
  650. /* Set up the DDC bus. */
  651. lvds_priv->ddc_bus = psb_intel_i2c_create(dev, GPIOC, "LVDSDDC_C");
  652. if (!lvds_priv->ddc_bus) {
  653. dev_printk(KERN_ERR, &dev->pdev->dev,
  654. "DDC bus registration " "failed.\n");
  655. goto failed_ddc;
  656. }
  657. /*
  658. * Attempt to get the fixed panel mode from DDC. Assume that the
  659. * preferred mode is the right one.
  660. */
  661. mutex_lock(&dev->mode_config.mutex);
  662. psb_intel_ddc_get_modes(connector, &lvds_priv->ddc_bus->adapter);
  663. list_for_each_entry(scan, &connector->probed_modes, head) {
  664. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  665. mode_dev->panel_fixed_mode =
  666. drm_mode_duplicate(dev, scan);
  667. DRM_DEBUG_KMS("Using mode from DDC\n");
  668. goto out; /* FIXME: check for quirks */
  669. }
  670. }
  671. /* Failed to get EDID, what about VBT? do we need this? */
  672. if (dev_priv->lfp_lvds_vbt_mode) {
  673. mode_dev->panel_fixed_mode =
  674. drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  675. if (mode_dev->panel_fixed_mode) {
  676. mode_dev->panel_fixed_mode->type |=
  677. DRM_MODE_TYPE_PREFERRED;
  678. DRM_DEBUG_KMS("Using mode from VBT\n");
  679. goto out;
  680. }
  681. }
  682. /*
  683. * If we didn't get EDID, try checking if the panel is already turned
  684. * on. If so, assume that whatever is currently programmed is the
  685. * correct mode.
  686. */
  687. lvds = REG_READ(LVDS);
  688. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  689. crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
  690. if (crtc && (lvds & LVDS_PORT_EN)) {
  691. mode_dev->panel_fixed_mode =
  692. psb_intel_crtc_mode_get(dev, crtc);
  693. if (mode_dev->panel_fixed_mode) {
  694. mode_dev->panel_fixed_mode->type |=
  695. DRM_MODE_TYPE_PREFERRED;
  696. DRM_DEBUG_KMS("Using pre-programmed mode\n");
  697. goto out; /* FIXME: check for quirks */
  698. }
  699. }
  700. /* If we still don't have a mode after all that, give up. */
  701. if (!mode_dev->panel_fixed_mode) {
  702. dev_err(dev->dev, "Found no modes on the lvds, ignoring the LVDS\n");
  703. goto failed_find;
  704. }
  705. /*
  706. * Blacklist machines with BIOSes that list an LVDS panel without
  707. * actually having one.
  708. */
  709. out:
  710. mutex_unlock(&dev->mode_config.mutex);
  711. drm_connector_register(connector);
  712. return;
  713. failed_find:
  714. mutex_unlock(&dev->mode_config.mutex);
  715. if (lvds_priv->ddc_bus)
  716. psb_intel_i2c_destroy(lvds_priv->ddc_bus);
  717. failed_ddc:
  718. if (lvds_priv->i2c_bus)
  719. psb_intel_i2c_destroy(lvds_priv->i2c_bus);
  720. failed_blc_i2c:
  721. drm_encoder_cleanup(encoder);
  722. drm_connector_cleanup(connector);
  723. failed_connector:
  724. kfree(gma_connector);
  725. failed_encoder:
  726. kfree(gma_encoder);
  727. }