adv7511.c 28 KB

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  1. /*
  2. * Analog Devices ADV7511 HDMI transmitter driver
  3. *
  4. * Copyright 2012 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/gpio/consumer.h>
  10. #include <linux/i2c.h>
  11. #include <linux/module.h>
  12. #include <linux/regmap.h>
  13. #include <linux/slab.h>
  14. #include <drm/drmP.h>
  15. #include <drm/drm_crtc_helper.h>
  16. #include <drm/drm_edid.h>
  17. #include <drm/drm_encoder_slave.h>
  18. #include "adv7511.h"
  19. struct adv7511 {
  20. struct i2c_client *i2c_main;
  21. struct i2c_client *i2c_edid;
  22. struct regmap *regmap;
  23. struct regmap *packet_memory_regmap;
  24. enum drm_connector_status status;
  25. bool powered;
  26. unsigned int f_tmds;
  27. unsigned int current_edid_segment;
  28. uint8_t edid_buf[256];
  29. bool edid_read;
  30. wait_queue_head_t wq;
  31. struct work_struct hpd_work;
  32. struct drm_encoder *encoder;
  33. struct drm_connector connector;
  34. bool embedded_sync;
  35. enum adv7511_sync_polarity vsync_polarity;
  36. enum adv7511_sync_polarity hsync_polarity;
  37. bool rgb;
  38. struct edid *edid;
  39. struct gpio_desc *gpio_pd;
  40. };
  41. static const int edid_i2c_addr = 0x7e;
  42. static const int packet_i2c_addr = 0x70;
  43. static const int cec_i2c_addr = 0x78;
  44. static struct adv7511 *encoder_to_adv7511(struct drm_encoder *encoder)
  45. {
  46. return to_encoder_slave(encoder)->slave_priv;
  47. }
  48. /* ADI recommended values for proper operation. */
  49. static const struct reg_sequence adv7511_fixed_registers[] = {
  50. { 0x98, 0x03 },
  51. { 0x9a, 0xe0 },
  52. { 0x9c, 0x30 },
  53. { 0x9d, 0x61 },
  54. { 0xa2, 0xa4 },
  55. { 0xa3, 0xa4 },
  56. { 0xe0, 0xd0 },
  57. { 0xf9, 0x00 },
  58. { 0x55, 0x02 },
  59. };
  60. /* -----------------------------------------------------------------------------
  61. * Register access
  62. */
  63. static const uint8_t adv7511_register_defaults[] = {
  64. 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 00 */
  65. 0x00, 0x00, 0x01, 0x0e, 0xbc, 0x18, 0x01, 0x13,
  66. 0x25, 0x37, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 10 */
  67. 0x46, 0x62, 0x04, 0xa8, 0x00, 0x00, 0x1c, 0x84,
  68. 0x1c, 0xbf, 0x04, 0xa8, 0x1e, 0x70, 0x02, 0x1e, /* 20 */
  69. 0x00, 0x00, 0x04, 0xa8, 0x08, 0x12, 0x1b, 0xac,
  70. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 30 */
  71. 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0xb0,
  72. 0x00, 0x50, 0x90, 0x7e, 0x79, 0x70, 0x00, 0x00, /* 40 */
  73. 0x00, 0xa8, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
  74. 0x00, 0x00, 0x02, 0x0d, 0x00, 0x00, 0x00, 0x00, /* 50 */
  75. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  76. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 60 */
  77. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  78. 0x01, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 70 */
  79. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  80. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 80 */
  81. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  82. 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, /* 90 */
  83. 0x0b, 0x02, 0x00, 0x18, 0x5a, 0x60, 0x00, 0x00,
  84. 0x00, 0x00, 0x80, 0x80, 0x08, 0x04, 0x00, 0x00, /* a0 */
  85. 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x40, 0x14,
  86. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* b0 */
  87. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  88. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* c0 */
  89. 0x00, 0x03, 0x00, 0x00, 0x02, 0x00, 0x01, 0x04,
  90. 0x30, 0xff, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, /* d0 */
  91. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x01,
  92. 0x80, 0x75, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, /* e0 */
  93. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  94. 0x00, 0x00, 0x00, 0x00, 0x00, 0x75, 0x11, 0x00, /* f0 */
  95. 0x00, 0x7c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  96. };
  97. static bool adv7511_register_volatile(struct device *dev, unsigned int reg)
  98. {
  99. switch (reg) {
  100. case ADV7511_REG_CHIP_REVISION:
  101. case ADV7511_REG_SPDIF_FREQ:
  102. case ADV7511_REG_CTS_AUTOMATIC1:
  103. case ADV7511_REG_CTS_AUTOMATIC2:
  104. case ADV7511_REG_VIC_DETECTED:
  105. case ADV7511_REG_VIC_SEND:
  106. case ADV7511_REG_AUX_VIC_DETECTED:
  107. case ADV7511_REG_STATUS:
  108. case ADV7511_REG_GC(1):
  109. case ADV7511_REG_INT(0):
  110. case ADV7511_REG_INT(1):
  111. case ADV7511_REG_PLL_STATUS:
  112. case ADV7511_REG_AN(0):
  113. case ADV7511_REG_AN(1):
  114. case ADV7511_REG_AN(2):
  115. case ADV7511_REG_AN(3):
  116. case ADV7511_REG_AN(4):
  117. case ADV7511_REG_AN(5):
  118. case ADV7511_REG_AN(6):
  119. case ADV7511_REG_AN(7):
  120. case ADV7511_REG_HDCP_STATUS:
  121. case ADV7511_REG_BCAPS:
  122. case ADV7511_REG_BKSV(0):
  123. case ADV7511_REG_BKSV(1):
  124. case ADV7511_REG_BKSV(2):
  125. case ADV7511_REG_BKSV(3):
  126. case ADV7511_REG_BKSV(4):
  127. case ADV7511_REG_DDC_STATUS:
  128. case ADV7511_REG_BSTATUS(0):
  129. case ADV7511_REG_BSTATUS(1):
  130. case ADV7511_REG_CHIP_ID_HIGH:
  131. case ADV7511_REG_CHIP_ID_LOW:
  132. return true;
  133. }
  134. return false;
  135. }
  136. static const struct regmap_config adv7511_regmap_config = {
  137. .reg_bits = 8,
  138. .val_bits = 8,
  139. .max_register = 0xff,
  140. .cache_type = REGCACHE_RBTREE,
  141. .reg_defaults_raw = adv7511_register_defaults,
  142. .num_reg_defaults_raw = ARRAY_SIZE(adv7511_register_defaults),
  143. .volatile_reg = adv7511_register_volatile,
  144. };
  145. /* -----------------------------------------------------------------------------
  146. * Hardware configuration
  147. */
  148. static void adv7511_set_colormap(struct adv7511 *adv7511, bool enable,
  149. const uint16_t *coeff,
  150. unsigned int scaling_factor)
  151. {
  152. unsigned int i;
  153. regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(1),
  154. ADV7511_CSC_UPDATE_MODE, ADV7511_CSC_UPDATE_MODE);
  155. if (enable) {
  156. for (i = 0; i < 12; ++i) {
  157. regmap_update_bits(adv7511->regmap,
  158. ADV7511_REG_CSC_UPPER(i),
  159. 0x1f, coeff[i] >> 8);
  160. regmap_write(adv7511->regmap,
  161. ADV7511_REG_CSC_LOWER(i),
  162. coeff[i] & 0xff);
  163. }
  164. }
  165. if (enable)
  166. regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(0),
  167. 0xe0, 0x80 | (scaling_factor << 5));
  168. else
  169. regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(0),
  170. 0x80, 0x00);
  171. regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(1),
  172. ADV7511_CSC_UPDATE_MODE, 0);
  173. }
  174. static int adv7511_packet_enable(struct adv7511 *adv7511, unsigned int packet)
  175. {
  176. if (packet & 0xff)
  177. regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE0,
  178. packet, 0xff);
  179. if (packet & 0xff00) {
  180. packet >>= 8;
  181. regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE1,
  182. packet, 0xff);
  183. }
  184. return 0;
  185. }
  186. static int adv7511_packet_disable(struct adv7511 *adv7511, unsigned int packet)
  187. {
  188. if (packet & 0xff)
  189. regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE0,
  190. packet, 0x00);
  191. if (packet & 0xff00) {
  192. packet >>= 8;
  193. regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE1,
  194. packet, 0x00);
  195. }
  196. return 0;
  197. }
  198. /* Coefficients for adv7511 color space conversion */
  199. static const uint16_t adv7511_csc_ycbcr_to_rgb[] = {
  200. 0x0734, 0x04ad, 0x0000, 0x1c1b,
  201. 0x1ddc, 0x04ad, 0x1f24, 0x0135,
  202. 0x0000, 0x04ad, 0x087c, 0x1b77,
  203. };
  204. static void adv7511_set_config_csc(struct adv7511 *adv7511,
  205. struct drm_connector *connector,
  206. bool rgb)
  207. {
  208. struct adv7511_video_config config;
  209. bool output_format_422, output_format_ycbcr;
  210. unsigned int mode;
  211. uint8_t infoframe[17];
  212. if (adv7511->edid)
  213. config.hdmi_mode = drm_detect_hdmi_monitor(adv7511->edid);
  214. else
  215. config.hdmi_mode = false;
  216. hdmi_avi_infoframe_init(&config.avi_infoframe);
  217. config.avi_infoframe.scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
  218. if (rgb) {
  219. config.csc_enable = false;
  220. config.avi_infoframe.colorspace = HDMI_COLORSPACE_RGB;
  221. } else {
  222. config.csc_scaling_factor = ADV7511_CSC_SCALING_4;
  223. config.csc_coefficents = adv7511_csc_ycbcr_to_rgb;
  224. if ((connector->display_info.color_formats &
  225. DRM_COLOR_FORMAT_YCRCB422) &&
  226. config.hdmi_mode) {
  227. config.csc_enable = false;
  228. config.avi_infoframe.colorspace =
  229. HDMI_COLORSPACE_YUV422;
  230. } else {
  231. config.csc_enable = true;
  232. config.avi_infoframe.colorspace = HDMI_COLORSPACE_RGB;
  233. }
  234. }
  235. if (config.hdmi_mode) {
  236. mode = ADV7511_HDMI_CFG_MODE_HDMI;
  237. switch (config.avi_infoframe.colorspace) {
  238. case HDMI_COLORSPACE_YUV444:
  239. output_format_422 = false;
  240. output_format_ycbcr = true;
  241. break;
  242. case HDMI_COLORSPACE_YUV422:
  243. output_format_422 = true;
  244. output_format_ycbcr = true;
  245. break;
  246. default:
  247. output_format_422 = false;
  248. output_format_ycbcr = false;
  249. break;
  250. }
  251. } else {
  252. mode = ADV7511_HDMI_CFG_MODE_DVI;
  253. output_format_422 = false;
  254. output_format_ycbcr = false;
  255. }
  256. adv7511_packet_disable(adv7511, ADV7511_PACKET_ENABLE_AVI_INFOFRAME);
  257. adv7511_set_colormap(adv7511, config.csc_enable,
  258. config.csc_coefficents,
  259. config.csc_scaling_factor);
  260. regmap_update_bits(adv7511->regmap, ADV7511_REG_VIDEO_INPUT_CFG1, 0x81,
  261. (output_format_422 << 7) | output_format_ycbcr);
  262. regmap_update_bits(adv7511->regmap, ADV7511_REG_HDCP_HDMI_CFG,
  263. ADV7511_HDMI_CFG_MODE_MASK, mode);
  264. hdmi_avi_infoframe_pack(&config.avi_infoframe, infoframe,
  265. sizeof(infoframe));
  266. /* The AVI infoframe id is not configurable */
  267. regmap_bulk_write(adv7511->regmap, ADV7511_REG_AVI_INFOFRAME_VERSION,
  268. infoframe + 1, sizeof(infoframe) - 1);
  269. adv7511_packet_enable(adv7511, ADV7511_PACKET_ENABLE_AVI_INFOFRAME);
  270. }
  271. static void adv7511_set_link_config(struct adv7511 *adv7511,
  272. const struct adv7511_link_config *config)
  273. {
  274. /*
  275. * The input style values documented in the datasheet don't match the
  276. * hardware register field values :-(
  277. */
  278. static const unsigned int input_styles[4] = { 0, 2, 1, 3 };
  279. unsigned int clock_delay;
  280. unsigned int color_depth;
  281. unsigned int input_id;
  282. clock_delay = (config->clock_delay + 1200) / 400;
  283. color_depth = config->input_color_depth == 8 ? 3
  284. : (config->input_color_depth == 10 ? 1 : 2);
  285. /* TODO Support input ID 6 */
  286. if (config->input_colorspace != HDMI_COLORSPACE_YUV422)
  287. input_id = config->input_clock == ADV7511_INPUT_CLOCK_DDR
  288. ? 5 : 0;
  289. else if (config->input_clock == ADV7511_INPUT_CLOCK_DDR)
  290. input_id = config->embedded_sync ? 8 : 7;
  291. else if (config->input_clock == ADV7511_INPUT_CLOCK_2X)
  292. input_id = config->embedded_sync ? 4 : 3;
  293. else
  294. input_id = config->embedded_sync ? 2 : 1;
  295. regmap_update_bits(adv7511->regmap, ADV7511_REG_I2C_FREQ_ID_CFG, 0xf,
  296. input_id);
  297. regmap_update_bits(adv7511->regmap, ADV7511_REG_VIDEO_INPUT_CFG1, 0x7e,
  298. (color_depth << 4) |
  299. (input_styles[config->input_style] << 2));
  300. regmap_write(adv7511->regmap, ADV7511_REG_VIDEO_INPUT_CFG2,
  301. config->input_justification << 3);
  302. regmap_write(adv7511->regmap, ADV7511_REG_TIMING_GEN_SEQ,
  303. config->sync_pulse << 2);
  304. regmap_write(adv7511->regmap, 0xba, clock_delay << 5);
  305. adv7511->embedded_sync = config->embedded_sync;
  306. adv7511->hsync_polarity = config->hsync_polarity;
  307. adv7511->vsync_polarity = config->vsync_polarity;
  308. adv7511->rgb = config->input_colorspace == HDMI_COLORSPACE_RGB;
  309. }
  310. static void adv7511_power_on(struct adv7511 *adv7511)
  311. {
  312. adv7511->current_edid_segment = -1;
  313. regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER,
  314. ADV7511_POWER_POWER_DOWN, 0);
  315. if (adv7511->i2c_main->irq) {
  316. /*
  317. * Documentation says the INT_ENABLE registers are reset in
  318. * POWER_DOWN mode. My 7511w preserved the bits, however.
  319. * Still, let's be safe and stick to the documentation.
  320. */
  321. regmap_write(adv7511->regmap, ADV7511_REG_INT_ENABLE(0),
  322. ADV7511_INT0_EDID_READY);
  323. regmap_write(adv7511->regmap, ADV7511_REG_INT_ENABLE(1),
  324. ADV7511_INT1_DDC_ERROR);
  325. }
  326. /*
  327. * Per spec it is allowed to pulse the HDP signal to indicate that the
  328. * EDID information has changed. Some monitors do this when they wakeup
  329. * from standby or are enabled. When the HDP goes low the adv7511 is
  330. * reset and the outputs are disabled which might cause the monitor to
  331. * go to standby again. To avoid this we ignore the HDP pin for the
  332. * first few seconds after enabling the output.
  333. */
  334. regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER2,
  335. ADV7511_REG_POWER2_HDP_SRC_MASK,
  336. ADV7511_REG_POWER2_HDP_SRC_NONE);
  337. /*
  338. * Most of the registers are reset during power down or when HPD is low.
  339. */
  340. regcache_sync(adv7511->regmap);
  341. adv7511->powered = true;
  342. }
  343. static void adv7511_power_off(struct adv7511 *adv7511)
  344. {
  345. /* TODO: setup additional power down modes */
  346. regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER,
  347. ADV7511_POWER_POWER_DOWN,
  348. ADV7511_POWER_POWER_DOWN);
  349. regcache_mark_dirty(adv7511->regmap);
  350. adv7511->powered = false;
  351. }
  352. /* -----------------------------------------------------------------------------
  353. * Interrupt and hotplug detection
  354. */
  355. static bool adv7511_hpd(struct adv7511 *adv7511)
  356. {
  357. unsigned int irq0;
  358. int ret;
  359. ret = regmap_read(adv7511->regmap, ADV7511_REG_INT(0), &irq0);
  360. if (ret < 0)
  361. return false;
  362. if (irq0 & ADV7511_INT0_HDP) {
  363. regmap_write(adv7511->regmap, ADV7511_REG_INT(0),
  364. ADV7511_INT0_HDP);
  365. return true;
  366. }
  367. return false;
  368. }
  369. static void adv7511_hpd_work(struct work_struct *work)
  370. {
  371. struct adv7511 *adv7511 = container_of(work, struct adv7511, hpd_work);
  372. enum drm_connector_status status;
  373. unsigned int val;
  374. int ret;
  375. ret = regmap_read(adv7511->regmap, ADV7511_REG_STATUS, &val);
  376. if (ret < 0)
  377. status = connector_status_disconnected;
  378. else if (val & ADV7511_STATUS_HPD)
  379. status = connector_status_connected;
  380. else
  381. status = connector_status_disconnected;
  382. /*
  383. * The bridge resets its registers on unplug. So when we get a plug
  384. * event and we're already supposed to be powered, cycle the bridge to
  385. * restore its state.
  386. */
  387. if (status == connector_status_connected &&
  388. adv7511->connector.status == connector_status_disconnected &&
  389. adv7511->powered) {
  390. regcache_mark_dirty(adv7511->regmap);
  391. adv7511_power_on(adv7511);
  392. }
  393. if (adv7511->connector.status != status) {
  394. adv7511->connector.status = status;
  395. drm_kms_helper_hotplug_event(adv7511->connector.dev);
  396. }
  397. }
  398. static int adv7511_irq_process(struct adv7511 *adv7511, bool process_hpd)
  399. {
  400. unsigned int irq0, irq1;
  401. int ret;
  402. ret = regmap_read(adv7511->regmap, ADV7511_REG_INT(0), &irq0);
  403. if (ret < 0)
  404. return ret;
  405. ret = regmap_read(adv7511->regmap, ADV7511_REG_INT(1), &irq1);
  406. if (ret < 0)
  407. return ret;
  408. regmap_write(adv7511->regmap, ADV7511_REG_INT(0), irq0);
  409. regmap_write(adv7511->regmap, ADV7511_REG_INT(1), irq1);
  410. if (process_hpd && irq0 & ADV7511_INT0_HDP && adv7511->encoder)
  411. schedule_work(&adv7511->hpd_work);
  412. if (irq0 & ADV7511_INT0_EDID_READY || irq1 & ADV7511_INT1_DDC_ERROR) {
  413. adv7511->edid_read = true;
  414. if (adv7511->i2c_main->irq)
  415. wake_up_all(&adv7511->wq);
  416. }
  417. return 0;
  418. }
  419. static irqreturn_t adv7511_irq_handler(int irq, void *devid)
  420. {
  421. struct adv7511 *adv7511 = devid;
  422. int ret;
  423. ret = adv7511_irq_process(adv7511, true);
  424. return ret < 0 ? IRQ_NONE : IRQ_HANDLED;
  425. }
  426. /* -----------------------------------------------------------------------------
  427. * EDID retrieval
  428. */
  429. static int adv7511_wait_for_edid(struct adv7511 *adv7511, int timeout)
  430. {
  431. int ret;
  432. if (adv7511->i2c_main->irq) {
  433. ret = wait_event_interruptible_timeout(adv7511->wq,
  434. adv7511->edid_read, msecs_to_jiffies(timeout));
  435. } else {
  436. for (; timeout > 0; timeout -= 25) {
  437. ret = adv7511_irq_process(adv7511, false);
  438. if (ret < 0)
  439. break;
  440. if (adv7511->edid_read)
  441. break;
  442. msleep(25);
  443. }
  444. }
  445. return adv7511->edid_read ? 0 : -EIO;
  446. }
  447. static int adv7511_get_edid_block(void *data, u8 *buf, unsigned int block,
  448. size_t len)
  449. {
  450. struct adv7511 *adv7511 = data;
  451. struct i2c_msg xfer[2];
  452. uint8_t offset;
  453. unsigned int i;
  454. int ret;
  455. if (len > 128)
  456. return -EINVAL;
  457. if (adv7511->current_edid_segment != block / 2) {
  458. unsigned int status;
  459. ret = regmap_read(adv7511->regmap, ADV7511_REG_DDC_STATUS,
  460. &status);
  461. if (ret < 0)
  462. return ret;
  463. if (status != 2) {
  464. adv7511->edid_read = false;
  465. regmap_write(adv7511->regmap, ADV7511_REG_EDID_SEGMENT,
  466. block);
  467. ret = adv7511_wait_for_edid(adv7511, 200);
  468. if (ret < 0)
  469. return ret;
  470. }
  471. /* Break this apart, hopefully more I2C controllers will
  472. * support 64 byte transfers than 256 byte transfers
  473. */
  474. xfer[0].addr = adv7511->i2c_edid->addr;
  475. xfer[0].flags = 0;
  476. xfer[0].len = 1;
  477. xfer[0].buf = &offset;
  478. xfer[1].addr = adv7511->i2c_edid->addr;
  479. xfer[1].flags = I2C_M_RD;
  480. xfer[1].len = 64;
  481. xfer[1].buf = adv7511->edid_buf;
  482. offset = 0;
  483. for (i = 0; i < 4; ++i) {
  484. ret = i2c_transfer(adv7511->i2c_edid->adapter, xfer,
  485. ARRAY_SIZE(xfer));
  486. if (ret < 0)
  487. return ret;
  488. else if (ret != 2)
  489. return -EIO;
  490. xfer[1].buf += 64;
  491. offset += 64;
  492. }
  493. adv7511->current_edid_segment = block / 2;
  494. }
  495. if (block % 2 == 0)
  496. memcpy(buf, adv7511->edid_buf, len);
  497. else
  498. memcpy(buf, adv7511->edid_buf + 128, len);
  499. return 0;
  500. }
  501. /* -----------------------------------------------------------------------------
  502. * Encoder operations
  503. */
  504. static int adv7511_get_modes(struct drm_encoder *encoder,
  505. struct drm_connector *connector)
  506. {
  507. struct adv7511 *adv7511 = encoder_to_adv7511(encoder);
  508. struct edid *edid;
  509. unsigned int count;
  510. /* Reading the EDID only works if the device is powered */
  511. if (!adv7511->powered) {
  512. regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER,
  513. ADV7511_POWER_POWER_DOWN, 0);
  514. if (adv7511->i2c_main->irq) {
  515. regmap_write(adv7511->regmap, ADV7511_REG_INT_ENABLE(0),
  516. ADV7511_INT0_EDID_READY);
  517. regmap_write(adv7511->regmap, ADV7511_REG_INT_ENABLE(1),
  518. ADV7511_INT1_DDC_ERROR);
  519. }
  520. adv7511->current_edid_segment = -1;
  521. /* Reset the EDID_I2C_ADDR register as it might be cleared */
  522. regmap_write(adv7511->regmap, ADV7511_REG_EDID_I2C_ADDR,
  523. edid_i2c_addr);
  524. }
  525. edid = drm_do_get_edid(connector, adv7511_get_edid_block, adv7511);
  526. if (!adv7511->powered)
  527. regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER,
  528. ADV7511_POWER_POWER_DOWN,
  529. ADV7511_POWER_POWER_DOWN);
  530. kfree(adv7511->edid);
  531. adv7511->edid = edid;
  532. if (!edid)
  533. return 0;
  534. drm_mode_connector_update_edid_property(connector, edid);
  535. count = drm_add_edid_modes(connector, edid);
  536. adv7511_set_config_csc(adv7511, connector, adv7511->rgb);
  537. return count;
  538. }
  539. static void adv7511_encoder_dpms(struct drm_encoder *encoder, int mode)
  540. {
  541. struct adv7511 *adv7511 = encoder_to_adv7511(encoder);
  542. if (mode == DRM_MODE_DPMS_ON)
  543. adv7511_power_on(adv7511);
  544. else
  545. adv7511_power_off(adv7511);
  546. }
  547. static enum drm_connector_status
  548. adv7511_encoder_detect(struct drm_encoder *encoder,
  549. struct drm_connector *connector)
  550. {
  551. struct adv7511 *adv7511 = encoder_to_adv7511(encoder);
  552. enum drm_connector_status status;
  553. unsigned int val;
  554. bool hpd;
  555. int ret;
  556. ret = regmap_read(adv7511->regmap, ADV7511_REG_STATUS, &val);
  557. if (ret < 0)
  558. return connector_status_disconnected;
  559. if (val & ADV7511_STATUS_HPD)
  560. status = connector_status_connected;
  561. else
  562. status = connector_status_disconnected;
  563. hpd = adv7511_hpd(adv7511);
  564. /* The chip resets itself when the cable is disconnected, so in case
  565. * there is a pending HPD interrupt and the cable is connected there was
  566. * at least one transition from disconnected to connected and the chip
  567. * has to be reinitialized. */
  568. if (status == connector_status_connected && hpd && adv7511->powered) {
  569. regcache_mark_dirty(adv7511->regmap);
  570. adv7511_power_on(adv7511);
  571. adv7511_get_modes(encoder, connector);
  572. if (adv7511->status == connector_status_connected)
  573. status = connector_status_disconnected;
  574. } else {
  575. /* Renable HDP sensing */
  576. regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER2,
  577. ADV7511_REG_POWER2_HDP_SRC_MASK,
  578. ADV7511_REG_POWER2_HDP_SRC_BOTH);
  579. }
  580. adv7511->status = status;
  581. return status;
  582. }
  583. static int adv7511_encoder_mode_valid(struct drm_encoder *encoder,
  584. struct drm_display_mode *mode)
  585. {
  586. if (mode->clock > 165000)
  587. return MODE_CLOCK_HIGH;
  588. return MODE_OK;
  589. }
  590. static void adv7511_encoder_mode_set(struct drm_encoder *encoder,
  591. struct drm_display_mode *mode,
  592. struct drm_display_mode *adj_mode)
  593. {
  594. struct adv7511 *adv7511 = encoder_to_adv7511(encoder);
  595. unsigned int low_refresh_rate;
  596. unsigned int hsync_polarity = 0;
  597. unsigned int vsync_polarity = 0;
  598. if (adv7511->embedded_sync) {
  599. unsigned int hsync_offset, hsync_len;
  600. unsigned int vsync_offset, vsync_len;
  601. hsync_offset = adj_mode->crtc_hsync_start -
  602. adj_mode->crtc_hdisplay;
  603. vsync_offset = adj_mode->crtc_vsync_start -
  604. adj_mode->crtc_vdisplay;
  605. hsync_len = adj_mode->crtc_hsync_end -
  606. adj_mode->crtc_hsync_start;
  607. vsync_len = adj_mode->crtc_vsync_end -
  608. adj_mode->crtc_vsync_start;
  609. /* The hardware vsync generator has a off-by-one bug */
  610. vsync_offset += 1;
  611. regmap_write(adv7511->regmap, ADV7511_REG_HSYNC_PLACEMENT_MSB,
  612. ((hsync_offset >> 10) & 0x7) << 5);
  613. regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(0),
  614. (hsync_offset >> 2) & 0xff);
  615. regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(1),
  616. ((hsync_offset & 0x3) << 6) |
  617. ((hsync_len >> 4) & 0x3f));
  618. regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(2),
  619. ((hsync_len & 0xf) << 4) |
  620. ((vsync_offset >> 6) & 0xf));
  621. regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(3),
  622. ((vsync_offset & 0x3f) << 2) |
  623. ((vsync_len >> 8) & 0x3));
  624. regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(4),
  625. vsync_len & 0xff);
  626. hsync_polarity = !(adj_mode->flags & DRM_MODE_FLAG_PHSYNC);
  627. vsync_polarity = !(adj_mode->flags & DRM_MODE_FLAG_PVSYNC);
  628. } else {
  629. enum adv7511_sync_polarity mode_hsync_polarity;
  630. enum adv7511_sync_polarity mode_vsync_polarity;
  631. /**
  632. * If the input signal is always low or always high we want to
  633. * invert or let it passthrough depending on the polarity of the
  634. * current mode.
  635. **/
  636. if (adj_mode->flags & DRM_MODE_FLAG_NHSYNC)
  637. mode_hsync_polarity = ADV7511_SYNC_POLARITY_LOW;
  638. else
  639. mode_hsync_polarity = ADV7511_SYNC_POLARITY_HIGH;
  640. if (adj_mode->flags & DRM_MODE_FLAG_NVSYNC)
  641. mode_vsync_polarity = ADV7511_SYNC_POLARITY_LOW;
  642. else
  643. mode_vsync_polarity = ADV7511_SYNC_POLARITY_HIGH;
  644. if (adv7511->hsync_polarity != mode_hsync_polarity &&
  645. adv7511->hsync_polarity !=
  646. ADV7511_SYNC_POLARITY_PASSTHROUGH)
  647. hsync_polarity = 1;
  648. if (adv7511->vsync_polarity != mode_vsync_polarity &&
  649. adv7511->vsync_polarity !=
  650. ADV7511_SYNC_POLARITY_PASSTHROUGH)
  651. vsync_polarity = 1;
  652. }
  653. if (mode->vrefresh <= 24000)
  654. low_refresh_rate = ADV7511_LOW_REFRESH_RATE_24HZ;
  655. else if (mode->vrefresh <= 25000)
  656. low_refresh_rate = ADV7511_LOW_REFRESH_RATE_25HZ;
  657. else if (mode->vrefresh <= 30000)
  658. low_refresh_rate = ADV7511_LOW_REFRESH_RATE_30HZ;
  659. else
  660. low_refresh_rate = ADV7511_LOW_REFRESH_RATE_NONE;
  661. regmap_update_bits(adv7511->regmap, 0xfb,
  662. 0x6, low_refresh_rate << 1);
  663. regmap_update_bits(adv7511->regmap, 0x17,
  664. 0x60, (vsync_polarity << 6) | (hsync_polarity << 5));
  665. /*
  666. * TODO Test first order 4:2:2 to 4:4:4 up conversion method, which is
  667. * supposed to give better results.
  668. */
  669. adv7511->f_tmds = mode->clock;
  670. }
  671. static struct drm_encoder_slave_funcs adv7511_encoder_funcs = {
  672. .dpms = adv7511_encoder_dpms,
  673. .mode_valid = adv7511_encoder_mode_valid,
  674. .mode_set = adv7511_encoder_mode_set,
  675. .detect = adv7511_encoder_detect,
  676. .get_modes = adv7511_get_modes,
  677. };
  678. /* -----------------------------------------------------------------------------
  679. * Probe & remove
  680. */
  681. static int adv7511_parse_dt(struct device_node *np,
  682. struct adv7511_link_config *config)
  683. {
  684. const char *str;
  685. int ret;
  686. memset(config, 0, sizeof(*config));
  687. of_property_read_u32(np, "adi,input-depth", &config->input_color_depth);
  688. if (config->input_color_depth != 8 && config->input_color_depth != 10 &&
  689. config->input_color_depth != 12)
  690. return -EINVAL;
  691. ret = of_property_read_string(np, "adi,input-colorspace", &str);
  692. if (ret < 0)
  693. return ret;
  694. if (!strcmp(str, "rgb"))
  695. config->input_colorspace = HDMI_COLORSPACE_RGB;
  696. else if (!strcmp(str, "yuv422"))
  697. config->input_colorspace = HDMI_COLORSPACE_YUV422;
  698. else if (!strcmp(str, "yuv444"))
  699. config->input_colorspace = HDMI_COLORSPACE_YUV444;
  700. else
  701. return -EINVAL;
  702. ret = of_property_read_string(np, "adi,input-clock", &str);
  703. if (ret < 0)
  704. return ret;
  705. if (!strcmp(str, "1x"))
  706. config->input_clock = ADV7511_INPUT_CLOCK_1X;
  707. else if (!strcmp(str, "2x"))
  708. config->input_clock = ADV7511_INPUT_CLOCK_2X;
  709. else if (!strcmp(str, "ddr"))
  710. config->input_clock = ADV7511_INPUT_CLOCK_DDR;
  711. else
  712. return -EINVAL;
  713. if (config->input_colorspace == HDMI_COLORSPACE_YUV422 ||
  714. config->input_clock != ADV7511_INPUT_CLOCK_1X) {
  715. ret = of_property_read_u32(np, "adi,input-style",
  716. &config->input_style);
  717. if (ret)
  718. return ret;
  719. if (config->input_style < 1 || config->input_style > 3)
  720. return -EINVAL;
  721. ret = of_property_read_string(np, "adi,input-justification",
  722. &str);
  723. if (ret < 0)
  724. return ret;
  725. if (!strcmp(str, "left"))
  726. config->input_justification =
  727. ADV7511_INPUT_JUSTIFICATION_LEFT;
  728. else if (!strcmp(str, "evenly"))
  729. config->input_justification =
  730. ADV7511_INPUT_JUSTIFICATION_EVENLY;
  731. else if (!strcmp(str, "right"))
  732. config->input_justification =
  733. ADV7511_INPUT_JUSTIFICATION_RIGHT;
  734. else
  735. return -EINVAL;
  736. } else {
  737. config->input_style = 1;
  738. config->input_justification = ADV7511_INPUT_JUSTIFICATION_LEFT;
  739. }
  740. of_property_read_u32(np, "adi,clock-delay", &config->clock_delay);
  741. if (config->clock_delay < -1200 || config->clock_delay > 1600)
  742. return -EINVAL;
  743. config->embedded_sync = of_property_read_bool(np, "adi,embedded-sync");
  744. /* Hardcode the sync pulse configurations for now. */
  745. config->sync_pulse = ADV7511_INPUT_SYNC_PULSE_NONE;
  746. config->vsync_polarity = ADV7511_SYNC_POLARITY_PASSTHROUGH;
  747. config->hsync_polarity = ADV7511_SYNC_POLARITY_PASSTHROUGH;
  748. return 0;
  749. }
  750. static int adv7511_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
  751. {
  752. struct adv7511_link_config link_config;
  753. struct adv7511 *adv7511;
  754. struct device *dev = &i2c->dev;
  755. unsigned int val;
  756. int ret;
  757. if (!dev->of_node)
  758. return -EINVAL;
  759. adv7511 = devm_kzalloc(dev, sizeof(*adv7511), GFP_KERNEL);
  760. if (!adv7511)
  761. return -ENOMEM;
  762. adv7511->powered = false;
  763. adv7511->status = connector_status_disconnected;
  764. ret = adv7511_parse_dt(dev->of_node, &link_config);
  765. if (ret)
  766. return ret;
  767. /*
  768. * The power down GPIO is optional. If present, toggle it from active to
  769. * inactive to wake up the encoder.
  770. */
  771. adv7511->gpio_pd = devm_gpiod_get_optional(dev, "pd", GPIOD_OUT_HIGH);
  772. if (IS_ERR(adv7511->gpio_pd))
  773. return PTR_ERR(adv7511->gpio_pd);
  774. if (adv7511->gpio_pd) {
  775. mdelay(5);
  776. gpiod_set_value_cansleep(adv7511->gpio_pd, 0);
  777. }
  778. adv7511->regmap = devm_regmap_init_i2c(i2c, &adv7511_regmap_config);
  779. if (IS_ERR(adv7511->regmap))
  780. return PTR_ERR(adv7511->regmap);
  781. ret = regmap_read(adv7511->regmap, ADV7511_REG_CHIP_REVISION, &val);
  782. if (ret)
  783. return ret;
  784. dev_dbg(dev, "Rev. %d\n", val);
  785. ret = regmap_register_patch(adv7511->regmap, adv7511_fixed_registers,
  786. ARRAY_SIZE(adv7511_fixed_registers));
  787. if (ret)
  788. return ret;
  789. regmap_write(adv7511->regmap, ADV7511_REG_EDID_I2C_ADDR, edid_i2c_addr);
  790. regmap_write(adv7511->regmap, ADV7511_REG_PACKET_I2C_ADDR,
  791. packet_i2c_addr);
  792. regmap_write(adv7511->regmap, ADV7511_REG_CEC_I2C_ADDR, cec_i2c_addr);
  793. adv7511_packet_disable(adv7511, 0xffff);
  794. adv7511->i2c_main = i2c;
  795. adv7511->i2c_edid = i2c_new_dummy(i2c->adapter, edid_i2c_addr >> 1);
  796. if (!adv7511->i2c_edid)
  797. return -ENOMEM;
  798. INIT_WORK(&adv7511->hpd_work, adv7511_hpd_work);
  799. if (i2c->irq) {
  800. init_waitqueue_head(&adv7511->wq);
  801. ret = devm_request_threaded_irq(dev, i2c->irq, NULL,
  802. adv7511_irq_handler,
  803. IRQF_ONESHOT, dev_name(dev),
  804. adv7511);
  805. if (ret)
  806. goto err_i2c_unregister_device;
  807. }
  808. /* CEC is unused for now */
  809. regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL,
  810. ADV7511_CEC_CTRL_POWER_DOWN);
  811. adv7511_power_off(adv7511);
  812. i2c_set_clientdata(i2c, adv7511);
  813. adv7511_set_link_config(adv7511, &link_config);
  814. return 0;
  815. err_i2c_unregister_device:
  816. i2c_unregister_device(adv7511->i2c_edid);
  817. return ret;
  818. }
  819. static int adv7511_remove(struct i2c_client *i2c)
  820. {
  821. struct adv7511 *adv7511 = i2c_get_clientdata(i2c);
  822. i2c_unregister_device(adv7511->i2c_edid);
  823. kfree(adv7511->edid);
  824. return 0;
  825. }
  826. static int adv7511_encoder_init(struct i2c_client *i2c, struct drm_device *dev,
  827. struct drm_encoder_slave *encoder)
  828. {
  829. struct adv7511 *adv7511 = i2c_get_clientdata(i2c);
  830. encoder->slave_priv = adv7511;
  831. encoder->slave_funcs = &adv7511_encoder_funcs;
  832. adv7511->encoder = &encoder->base;
  833. return 0;
  834. }
  835. static const struct i2c_device_id adv7511_i2c_ids[] = {
  836. { "adv7511", 0 },
  837. { "adv7511w", 0 },
  838. { "adv7513", 0 },
  839. { }
  840. };
  841. MODULE_DEVICE_TABLE(i2c, adv7511_i2c_ids);
  842. static const struct of_device_id adv7511_of_ids[] = {
  843. { .compatible = "adi,adv7511", },
  844. { .compatible = "adi,adv7511w", },
  845. { .compatible = "adi,adv7513", },
  846. { }
  847. };
  848. MODULE_DEVICE_TABLE(of, adv7511_of_ids);
  849. static struct drm_i2c_encoder_driver adv7511_driver = {
  850. .i2c_driver = {
  851. .driver = {
  852. .name = "adv7511",
  853. .of_match_table = adv7511_of_ids,
  854. },
  855. .id_table = adv7511_i2c_ids,
  856. .probe = adv7511_probe,
  857. .remove = adv7511_remove,
  858. },
  859. .encoder_init = adv7511_encoder_init,
  860. };
  861. static int __init adv7511_init(void)
  862. {
  863. return drm_i2c_encoder_register(THIS_MODULE, &adv7511_driver);
  864. }
  865. module_init(adv7511_init);
  866. static void __exit adv7511_exit(void)
  867. {
  868. drm_i2c_encoder_unregister(&adv7511_driver);
  869. }
  870. module_exit(adv7511_exit);
  871. MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
  872. MODULE_DESCRIPTION("ADV7511 HDMI transmitter driver");
  873. MODULE_LICENSE("GPL");