shmob_drm_crtc.c 20 KB

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  1. /*
  2. * shmob_drm_crtc.c -- SH Mobile DRM CRTCs
  3. *
  4. * Copyright (C) 2012 Renesas Electronics Corporation
  5. *
  6. * Laurent Pinchart (laurent.pinchart@ideasonboard.com)
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. */
  13. #include <linux/backlight.h>
  14. #include <linux/clk.h>
  15. #include <drm/drmP.h>
  16. #include <drm/drm_crtc.h>
  17. #include <drm/drm_crtc_helper.h>
  18. #include <drm/drm_fb_cma_helper.h>
  19. #include <drm/drm_gem_cma_helper.h>
  20. #include <drm/drm_plane_helper.h>
  21. #include <video/sh_mobile_meram.h>
  22. #include "shmob_drm_backlight.h"
  23. #include "shmob_drm_crtc.h"
  24. #include "shmob_drm_drv.h"
  25. #include "shmob_drm_kms.h"
  26. #include "shmob_drm_plane.h"
  27. #include "shmob_drm_regs.h"
  28. /*
  29. * TODO: panel support
  30. */
  31. /* -----------------------------------------------------------------------------
  32. * Clock management
  33. */
  34. static int shmob_drm_clk_on(struct shmob_drm_device *sdev)
  35. {
  36. int ret;
  37. if (sdev->clock) {
  38. ret = clk_prepare_enable(sdev->clock);
  39. if (ret < 0)
  40. return ret;
  41. }
  42. #if 0
  43. if (sdev->meram_dev && sdev->meram_dev->pdev)
  44. pm_runtime_get_sync(&sdev->meram_dev->pdev->dev);
  45. #endif
  46. return 0;
  47. }
  48. static void shmob_drm_clk_off(struct shmob_drm_device *sdev)
  49. {
  50. #if 0
  51. if (sdev->meram_dev && sdev->meram_dev->pdev)
  52. pm_runtime_put_sync(&sdev->meram_dev->pdev->dev);
  53. #endif
  54. if (sdev->clock)
  55. clk_disable_unprepare(sdev->clock);
  56. }
  57. /* -----------------------------------------------------------------------------
  58. * CRTC
  59. */
  60. static void shmob_drm_crtc_setup_geometry(struct shmob_drm_crtc *scrtc)
  61. {
  62. struct drm_crtc *crtc = &scrtc->crtc;
  63. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  64. const struct shmob_drm_interface_data *idata = &sdev->pdata->iface;
  65. const struct drm_display_mode *mode = &crtc->mode;
  66. u32 value;
  67. value = sdev->ldmt1r
  68. | ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? 0 : LDMT1R_VPOL)
  69. | ((mode->flags & DRM_MODE_FLAG_PHSYNC) ? 0 : LDMT1R_HPOL)
  70. | ((idata->flags & SHMOB_DRM_IFACE_FL_DWPOL) ? LDMT1R_DWPOL : 0)
  71. | ((idata->flags & SHMOB_DRM_IFACE_FL_DIPOL) ? LDMT1R_DIPOL : 0)
  72. | ((idata->flags & SHMOB_DRM_IFACE_FL_DAPOL) ? LDMT1R_DAPOL : 0)
  73. | ((idata->flags & SHMOB_DRM_IFACE_FL_HSCNT) ? LDMT1R_HSCNT : 0)
  74. | ((idata->flags & SHMOB_DRM_IFACE_FL_DWCNT) ? LDMT1R_DWCNT : 0);
  75. lcdc_write(sdev, LDMT1R, value);
  76. if (idata->interface >= SHMOB_DRM_IFACE_SYS8A &&
  77. idata->interface <= SHMOB_DRM_IFACE_SYS24) {
  78. /* Setup SYS bus. */
  79. value = (idata->sys.cs_setup << LDMT2R_CSUP_SHIFT)
  80. | (idata->sys.vsync_active_high ? LDMT2R_RSV : 0)
  81. | (idata->sys.vsync_dir_input ? LDMT2R_VSEL : 0)
  82. | (idata->sys.write_setup << LDMT2R_WCSC_SHIFT)
  83. | (idata->sys.write_cycle << LDMT2R_WCEC_SHIFT)
  84. | (idata->sys.write_strobe << LDMT2R_WCLW_SHIFT);
  85. lcdc_write(sdev, LDMT2R, value);
  86. value = (idata->sys.read_latch << LDMT3R_RDLC_SHIFT)
  87. | (idata->sys.read_setup << LDMT3R_RCSC_SHIFT)
  88. | (idata->sys.read_cycle << LDMT3R_RCEC_SHIFT)
  89. | (idata->sys.read_strobe << LDMT3R_RCLW_SHIFT);
  90. lcdc_write(sdev, LDMT3R, value);
  91. }
  92. value = ((mode->hdisplay / 8) << 16) /* HDCN */
  93. | (mode->htotal / 8); /* HTCN */
  94. lcdc_write(sdev, LDHCNR, value);
  95. value = (((mode->hsync_end - mode->hsync_start) / 8) << 16) /* HSYNW */
  96. | (mode->hsync_start / 8); /* HSYNP */
  97. lcdc_write(sdev, LDHSYNR, value);
  98. value = ((mode->hdisplay & 7) << 24) | ((mode->htotal & 7) << 16)
  99. | (((mode->hsync_end - mode->hsync_start) & 7) << 8)
  100. | (mode->hsync_start & 7);
  101. lcdc_write(sdev, LDHAJR, value);
  102. value = ((mode->vdisplay) << 16) /* VDLN */
  103. | mode->vtotal; /* VTLN */
  104. lcdc_write(sdev, LDVLNR, value);
  105. value = ((mode->vsync_end - mode->vsync_start) << 16) /* VSYNW */
  106. | mode->vsync_start; /* VSYNP */
  107. lcdc_write(sdev, LDVSYNR, value);
  108. }
  109. static void shmob_drm_crtc_start_stop(struct shmob_drm_crtc *scrtc, bool start)
  110. {
  111. struct shmob_drm_device *sdev = scrtc->crtc.dev->dev_private;
  112. u32 value;
  113. value = lcdc_read(sdev, LDCNT2R);
  114. if (start)
  115. lcdc_write(sdev, LDCNT2R, value | LDCNT2R_DO);
  116. else
  117. lcdc_write(sdev, LDCNT2R, value & ~LDCNT2R_DO);
  118. /* Wait until power is applied/stopped. */
  119. while (1) {
  120. value = lcdc_read(sdev, LDPMR) & LDPMR_LPS;
  121. if ((start && value) || (!start && !value))
  122. break;
  123. cpu_relax();
  124. }
  125. if (!start) {
  126. /* Stop the dot clock. */
  127. lcdc_write(sdev, LDDCKSTPR, LDDCKSTPR_DCKSTP);
  128. }
  129. }
  130. /*
  131. * shmob_drm_crtc_start - Configure and start the LCDC
  132. * @scrtc: the SH Mobile CRTC
  133. *
  134. * Configure and start the LCDC device. External devices (clocks, MERAM, panels,
  135. * ...) are not touched by this function.
  136. */
  137. static void shmob_drm_crtc_start(struct shmob_drm_crtc *scrtc)
  138. {
  139. struct drm_crtc *crtc = &scrtc->crtc;
  140. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  141. const struct shmob_drm_interface_data *idata = &sdev->pdata->iface;
  142. const struct shmob_drm_format_info *format;
  143. struct drm_device *dev = sdev->ddev;
  144. struct drm_plane *plane;
  145. u32 value;
  146. int ret;
  147. if (scrtc->started)
  148. return;
  149. format = shmob_drm_format_info(crtc->primary->fb->pixel_format);
  150. if (WARN_ON(format == NULL))
  151. return;
  152. /* Enable clocks before accessing the hardware. */
  153. ret = shmob_drm_clk_on(sdev);
  154. if (ret < 0)
  155. return;
  156. /* Reset and enable the LCDC. */
  157. lcdc_write(sdev, LDCNT2R, lcdc_read(sdev, LDCNT2R) | LDCNT2R_BR);
  158. lcdc_wait_bit(sdev, LDCNT2R, LDCNT2R_BR, 0);
  159. lcdc_write(sdev, LDCNT2R, LDCNT2R_ME);
  160. /* Stop the LCDC first and disable all interrupts. */
  161. shmob_drm_crtc_start_stop(scrtc, false);
  162. lcdc_write(sdev, LDINTR, 0);
  163. /* Configure power supply, dot clocks and start them. */
  164. lcdc_write(sdev, LDPMR, 0);
  165. value = sdev->lddckr;
  166. if (idata->clk_div) {
  167. /* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider
  168. * denominator.
  169. */
  170. lcdc_write(sdev, LDDCKPAT1R, 0);
  171. lcdc_write(sdev, LDDCKPAT2R, (1 << (idata->clk_div / 2)) - 1);
  172. if (idata->clk_div == 1)
  173. value |= LDDCKR_MOSEL;
  174. else
  175. value |= idata->clk_div;
  176. }
  177. lcdc_write(sdev, LDDCKR, value);
  178. lcdc_write(sdev, LDDCKSTPR, 0);
  179. lcdc_wait_bit(sdev, LDDCKSTPR, ~0, 0);
  180. /* TODO: Setup SYS panel */
  181. /* Setup geometry, format, frame buffer memory and operation mode. */
  182. shmob_drm_crtc_setup_geometry(scrtc);
  183. /* TODO: Handle YUV colorspaces. Hardcode REC709 for now. */
  184. lcdc_write(sdev, LDDFR, format->lddfr | LDDFR_CF1);
  185. lcdc_write(sdev, LDMLSR, scrtc->line_size);
  186. lcdc_write(sdev, LDSA1R, scrtc->dma[0]);
  187. if (format->yuv)
  188. lcdc_write(sdev, LDSA2R, scrtc->dma[1]);
  189. lcdc_write(sdev, LDSM1R, 0);
  190. /* Word and long word swap. */
  191. switch (format->fourcc) {
  192. case DRM_FORMAT_RGB565:
  193. case DRM_FORMAT_NV21:
  194. case DRM_FORMAT_NV61:
  195. case DRM_FORMAT_NV42:
  196. value = LDDDSR_LS | LDDDSR_WS;
  197. break;
  198. case DRM_FORMAT_RGB888:
  199. case DRM_FORMAT_NV12:
  200. case DRM_FORMAT_NV16:
  201. case DRM_FORMAT_NV24:
  202. value = LDDDSR_LS | LDDDSR_WS | LDDDSR_BS;
  203. break;
  204. case DRM_FORMAT_ARGB8888:
  205. default:
  206. value = LDDDSR_LS;
  207. break;
  208. }
  209. lcdc_write(sdev, LDDDSR, value);
  210. /* Setup planes. */
  211. drm_for_each_legacy_plane(plane, dev) {
  212. if (plane->crtc == crtc)
  213. shmob_drm_plane_setup(plane);
  214. }
  215. /* Enable the display output. */
  216. lcdc_write(sdev, LDCNT1R, LDCNT1R_DE);
  217. shmob_drm_crtc_start_stop(scrtc, true);
  218. scrtc->started = true;
  219. }
  220. static void shmob_drm_crtc_stop(struct shmob_drm_crtc *scrtc)
  221. {
  222. struct drm_crtc *crtc = &scrtc->crtc;
  223. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  224. if (!scrtc->started)
  225. return;
  226. /* Disable the MERAM cache. */
  227. if (scrtc->cache) {
  228. sh_mobile_meram_cache_free(sdev->meram, scrtc->cache);
  229. scrtc->cache = NULL;
  230. }
  231. /* Stop the LCDC. */
  232. shmob_drm_crtc_start_stop(scrtc, false);
  233. /* Disable the display output. */
  234. lcdc_write(sdev, LDCNT1R, 0);
  235. /* Stop clocks. */
  236. shmob_drm_clk_off(sdev);
  237. scrtc->started = false;
  238. }
  239. void shmob_drm_crtc_suspend(struct shmob_drm_crtc *scrtc)
  240. {
  241. shmob_drm_crtc_stop(scrtc);
  242. }
  243. void shmob_drm_crtc_resume(struct shmob_drm_crtc *scrtc)
  244. {
  245. if (scrtc->dpms != DRM_MODE_DPMS_ON)
  246. return;
  247. shmob_drm_crtc_start(scrtc);
  248. }
  249. static void shmob_drm_crtc_compute_base(struct shmob_drm_crtc *scrtc,
  250. int x, int y)
  251. {
  252. struct drm_crtc *crtc = &scrtc->crtc;
  253. struct drm_framebuffer *fb = crtc->primary->fb;
  254. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  255. struct drm_gem_cma_object *gem;
  256. unsigned int bpp;
  257. bpp = scrtc->format->yuv ? 8 : scrtc->format->bpp;
  258. gem = drm_fb_cma_get_gem_obj(fb, 0);
  259. scrtc->dma[0] = gem->paddr + fb->offsets[0]
  260. + y * fb->pitches[0] + x * bpp / 8;
  261. if (scrtc->format->yuv) {
  262. bpp = scrtc->format->bpp - 8;
  263. gem = drm_fb_cma_get_gem_obj(fb, 1);
  264. scrtc->dma[1] = gem->paddr + fb->offsets[1]
  265. + y / (bpp == 4 ? 2 : 1) * fb->pitches[1]
  266. + x * (bpp == 16 ? 2 : 1);
  267. }
  268. if (scrtc->cache)
  269. sh_mobile_meram_cache_update(sdev->meram, scrtc->cache,
  270. scrtc->dma[0], scrtc->dma[1],
  271. &scrtc->dma[0], &scrtc->dma[1]);
  272. }
  273. static void shmob_drm_crtc_update_base(struct shmob_drm_crtc *scrtc)
  274. {
  275. struct drm_crtc *crtc = &scrtc->crtc;
  276. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  277. shmob_drm_crtc_compute_base(scrtc, crtc->x, crtc->y);
  278. lcdc_write_mirror(sdev, LDSA1R, scrtc->dma[0]);
  279. if (scrtc->format->yuv)
  280. lcdc_write_mirror(sdev, LDSA2R, scrtc->dma[1]);
  281. lcdc_write(sdev, LDRCNTR, lcdc_read(sdev, LDRCNTR) ^ LDRCNTR_MRS);
  282. }
  283. #define to_shmob_crtc(c) container_of(c, struct shmob_drm_crtc, crtc)
  284. static void shmob_drm_crtc_dpms(struct drm_crtc *crtc, int mode)
  285. {
  286. struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc);
  287. if (scrtc->dpms == mode)
  288. return;
  289. if (mode == DRM_MODE_DPMS_ON)
  290. shmob_drm_crtc_start(scrtc);
  291. else
  292. shmob_drm_crtc_stop(scrtc);
  293. scrtc->dpms = mode;
  294. }
  295. static bool shmob_drm_crtc_mode_fixup(struct drm_crtc *crtc,
  296. const struct drm_display_mode *mode,
  297. struct drm_display_mode *adjusted_mode)
  298. {
  299. return true;
  300. }
  301. static void shmob_drm_crtc_mode_prepare(struct drm_crtc *crtc)
  302. {
  303. shmob_drm_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
  304. }
  305. static int shmob_drm_crtc_mode_set(struct drm_crtc *crtc,
  306. struct drm_display_mode *mode,
  307. struct drm_display_mode *adjusted_mode,
  308. int x, int y,
  309. struct drm_framebuffer *old_fb)
  310. {
  311. struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc);
  312. struct shmob_drm_device *sdev = crtc->dev->dev_private;
  313. const struct sh_mobile_meram_cfg *mdata = sdev->pdata->meram;
  314. const struct shmob_drm_format_info *format;
  315. void *cache;
  316. format = shmob_drm_format_info(crtc->primary->fb->pixel_format);
  317. if (format == NULL) {
  318. dev_dbg(sdev->dev, "mode_set: unsupported format %08x\n",
  319. crtc->primary->fb->pixel_format);
  320. return -EINVAL;
  321. }
  322. scrtc->format = format;
  323. scrtc->line_size = crtc->primary->fb->pitches[0];
  324. if (sdev->meram) {
  325. /* Enable MERAM cache if configured. We need to de-init
  326. * configured ICBs before we can re-initialize them.
  327. */
  328. if (scrtc->cache) {
  329. sh_mobile_meram_cache_free(sdev->meram, scrtc->cache);
  330. scrtc->cache = NULL;
  331. }
  332. cache = sh_mobile_meram_cache_alloc(sdev->meram, mdata,
  333. crtc->primary->fb->pitches[0],
  334. adjusted_mode->vdisplay,
  335. format->meram,
  336. &scrtc->line_size);
  337. if (!IS_ERR(cache))
  338. scrtc->cache = cache;
  339. }
  340. shmob_drm_crtc_compute_base(scrtc, x, y);
  341. return 0;
  342. }
  343. static void shmob_drm_crtc_mode_commit(struct drm_crtc *crtc)
  344. {
  345. shmob_drm_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
  346. }
  347. static int shmob_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
  348. struct drm_framebuffer *old_fb)
  349. {
  350. shmob_drm_crtc_update_base(to_shmob_crtc(crtc));
  351. return 0;
  352. }
  353. static const struct drm_crtc_helper_funcs crtc_helper_funcs = {
  354. .dpms = shmob_drm_crtc_dpms,
  355. .mode_fixup = shmob_drm_crtc_mode_fixup,
  356. .prepare = shmob_drm_crtc_mode_prepare,
  357. .commit = shmob_drm_crtc_mode_commit,
  358. .mode_set = shmob_drm_crtc_mode_set,
  359. .mode_set_base = shmob_drm_crtc_mode_set_base,
  360. };
  361. void shmob_drm_crtc_cancel_page_flip(struct shmob_drm_crtc *scrtc,
  362. struct drm_file *file)
  363. {
  364. struct drm_pending_vblank_event *event;
  365. struct drm_device *dev = scrtc->crtc.dev;
  366. unsigned long flags;
  367. /* Destroy the pending vertical blanking event associated with the
  368. * pending page flip, if any, and disable vertical blanking interrupts.
  369. */
  370. spin_lock_irqsave(&dev->event_lock, flags);
  371. event = scrtc->event;
  372. if (event && event->base.file_priv == file) {
  373. scrtc->event = NULL;
  374. event->base.destroy(&event->base);
  375. drm_vblank_put(dev, 0);
  376. }
  377. spin_unlock_irqrestore(&dev->event_lock, flags);
  378. }
  379. void shmob_drm_crtc_finish_page_flip(struct shmob_drm_crtc *scrtc)
  380. {
  381. struct drm_pending_vblank_event *event;
  382. struct drm_device *dev = scrtc->crtc.dev;
  383. unsigned long flags;
  384. spin_lock_irqsave(&dev->event_lock, flags);
  385. event = scrtc->event;
  386. scrtc->event = NULL;
  387. if (event) {
  388. drm_send_vblank_event(dev, 0, event);
  389. drm_vblank_put(dev, 0);
  390. }
  391. spin_unlock_irqrestore(&dev->event_lock, flags);
  392. }
  393. static int shmob_drm_crtc_page_flip(struct drm_crtc *crtc,
  394. struct drm_framebuffer *fb,
  395. struct drm_pending_vblank_event *event,
  396. uint32_t page_flip_flags)
  397. {
  398. struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc);
  399. struct drm_device *dev = scrtc->crtc.dev;
  400. unsigned long flags;
  401. spin_lock_irqsave(&dev->event_lock, flags);
  402. if (scrtc->event != NULL) {
  403. spin_unlock_irqrestore(&dev->event_lock, flags);
  404. return -EBUSY;
  405. }
  406. spin_unlock_irqrestore(&dev->event_lock, flags);
  407. crtc->primary->fb = fb;
  408. shmob_drm_crtc_update_base(scrtc);
  409. if (event) {
  410. event->pipe = 0;
  411. drm_vblank_get(dev, 0);
  412. spin_lock_irqsave(&dev->event_lock, flags);
  413. scrtc->event = event;
  414. spin_unlock_irqrestore(&dev->event_lock, flags);
  415. }
  416. return 0;
  417. }
  418. static const struct drm_crtc_funcs crtc_funcs = {
  419. .destroy = drm_crtc_cleanup,
  420. .set_config = drm_crtc_helper_set_config,
  421. .page_flip = shmob_drm_crtc_page_flip,
  422. };
  423. int shmob_drm_crtc_create(struct shmob_drm_device *sdev)
  424. {
  425. struct drm_crtc *crtc = &sdev->crtc.crtc;
  426. int ret;
  427. sdev->crtc.dpms = DRM_MODE_DPMS_OFF;
  428. ret = drm_crtc_init(sdev->ddev, crtc, &crtc_funcs);
  429. if (ret < 0)
  430. return ret;
  431. drm_crtc_helper_add(crtc, &crtc_helper_funcs);
  432. return 0;
  433. }
  434. /* -----------------------------------------------------------------------------
  435. * Encoder
  436. */
  437. #define to_shmob_encoder(e) \
  438. container_of(e, struct shmob_drm_encoder, encoder)
  439. static void shmob_drm_encoder_dpms(struct drm_encoder *encoder, int mode)
  440. {
  441. struct shmob_drm_encoder *senc = to_shmob_encoder(encoder);
  442. struct shmob_drm_device *sdev = encoder->dev->dev_private;
  443. struct shmob_drm_connector *scon = &sdev->connector;
  444. if (senc->dpms == mode)
  445. return;
  446. shmob_drm_backlight_dpms(scon, mode);
  447. senc->dpms = mode;
  448. }
  449. static bool shmob_drm_encoder_mode_fixup(struct drm_encoder *encoder,
  450. const struct drm_display_mode *mode,
  451. struct drm_display_mode *adjusted_mode)
  452. {
  453. struct drm_device *dev = encoder->dev;
  454. struct shmob_drm_device *sdev = dev->dev_private;
  455. struct drm_connector *connector = &sdev->connector.connector;
  456. const struct drm_display_mode *panel_mode;
  457. if (list_empty(&connector->modes)) {
  458. dev_dbg(dev->dev, "mode_fixup: empty modes list\n");
  459. return false;
  460. }
  461. /* The flat panel mode is fixed, just copy it to the adjusted mode. */
  462. panel_mode = list_first_entry(&connector->modes,
  463. struct drm_display_mode, head);
  464. drm_mode_copy(adjusted_mode, panel_mode);
  465. return true;
  466. }
  467. static void shmob_drm_encoder_mode_prepare(struct drm_encoder *encoder)
  468. {
  469. /* No-op, everything is handled in the CRTC code. */
  470. }
  471. static void shmob_drm_encoder_mode_set(struct drm_encoder *encoder,
  472. struct drm_display_mode *mode,
  473. struct drm_display_mode *adjusted_mode)
  474. {
  475. /* No-op, everything is handled in the CRTC code. */
  476. }
  477. static void shmob_drm_encoder_mode_commit(struct drm_encoder *encoder)
  478. {
  479. /* No-op, everything is handled in the CRTC code. */
  480. }
  481. static const struct drm_encoder_helper_funcs encoder_helper_funcs = {
  482. .dpms = shmob_drm_encoder_dpms,
  483. .mode_fixup = shmob_drm_encoder_mode_fixup,
  484. .prepare = shmob_drm_encoder_mode_prepare,
  485. .commit = shmob_drm_encoder_mode_commit,
  486. .mode_set = shmob_drm_encoder_mode_set,
  487. };
  488. static void shmob_drm_encoder_destroy(struct drm_encoder *encoder)
  489. {
  490. drm_encoder_cleanup(encoder);
  491. }
  492. static const struct drm_encoder_funcs encoder_funcs = {
  493. .destroy = shmob_drm_encoder_destroy,
  494. };
  495. int shmob_drm_encoder_create(struct shmob_drm_device *sdev)
  496. {
  497. struct drm_encoder *encoder = &sdev->encoder.encoder;
  498. int ret;
  499. sdev->encoder.dpms = DRM_MODE_DPMS_OFF;
  500. encoder->possible_crtcs = 1;
  501. ret = drm_encoder_init(sdev->ddev, encoder, &encoder_funcs,
  502. DRM_MODE_ENCODER_LVDS);
  503. if (ret < 0)
  504. return ret;
  505. drm_encoder_helper_add(encoder, &encoder_helper_funcs);
  506. return 0;
  507. }
  508. void shmob_drm_crtc_enable_vblank(struct shmob_drm_device *sdev, bool enable)
  509. {
  510. unsigned long flags;
  511. u32 ldintr;
  512. /* Be careful not to acknowledge any pending interrupt. */
  513. spin_lock_irqsave(&sdev->irq_lock, flags);
  514. ldintr = lcdc_read(sdev, LDINTR) | LDINTR_STATUS_MASK;
  515. if (enable)
  516. ldintr |= LDINTR_VEE;
  517. else
  518. ldintr &= ~LDINTR_VEE;
  519. lcdc_write(sdev, LDINTR, ldintr);
  520. spin_unlock_irqrestore(&sdev->irq_lock, flags);
  521. }
  522. /* -----------------------------------------------------------------------------
  523. * Connector
  524. */
  525. #define to_shmob_connector(c) \
  526. container_of(c, struct shmob_drm_connector, connector)
  527. static int shmob_drm_connector_get_modes(struct drm_connector *connector)
  528. {
  529. struct shmob_drm_device *sdev = connector->dev->dev_private;
  530. struct drm_display_mode *mode;
  531. mode = drm_mode_create(connector->dev);
  532. if (mode == NULL)
  533. return 0;
  534. mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
  535. mode->clock = sdev->pdata->panel.mode.clock;
  536. mode->hdisplay = sdev->pdata->panel.mode.hdisplay;
  537. mode->hsync_start = sdev->pdata->panel.mode.hsync_start;
  538. mode->hsync_end = sdev->pdata->panel.mode.hsync_end;
  539. mode->htotal = sdev->pdata->panel.mode.htotal;
  540. mode->vdisplay = sdev->pdata->panel.mode.vdisplay;
  541. mode->vsync_start = sdev->pdata->panel.mode.vsync_start;
  542. mode->vsync_end = sdev->pdata->panel.mode.vsync_end;
  543. mode->vtotal = sdev->pdata->panel.mode.vtotal;
  544. mode->flags = sdev->pdata->panel.mode.flags;
  545. drm_mode_set_name(mode);
  546. drm_mode_probed_add(connector, mode);
  547. connector->display_info.width_mm = sdev->pdata->panel.width_mm;
  548. connector->display_info.height_mm = sdev->pdata->panel.height_mm;
  549. return 1;
  550. }
  551. static struct drm_encoder *
  552. shmob_drm_connector_best_encoder(struct drm_connector *connector)
  553. {
  554. struct shmob_drm_connector *scon = to_shmob_connector(connector);
  555. return scon->encoder;
  556. }
  557. static const struct drm_connector_helper_funcs connector_helper_funcs = {
  558. .get_modes = shmob_drm_connector_get_modes,
  559. .best_encoder = shmob_drm_connector_best_encoder,
  560. };
  561. static void shmob_drm_connector_destroy(struct drm_connector *connector)
  562. {
  563. struct shmob_drm_connector *scon = to_shmob_connector(connector);
  564. shmob_drm_backlight_exit(scon);
  565. drm_connector_unregister(connector);
  566. drm_connector_cleanup(connector);
  567. }
  568. static enum drm_connector_status
  569. shmob_drm_connector_detect(struct drm_connector *connector, bool force)
  570. {
  571. return connector_status_connected;
  572. }
  573. static const struct drm_connector_funcs connector_funcs = {
  574. .dpms = drm_helper_connector_dpms,
  575. .detect = shmob_drm_connector_detect,
  576. .fill_modes = drm_helper_probe_single_connector_modes,
  577. .destroy = shmob_drm_connector_destroy,
  578. };
  579. int shmob_drm_connector_create(struct shmob_drm_device *sdev,
  580. struct drm_encoder *encoder)
  581. {
  582. struct drm_connector *connector = &sdev->connector.connector;
  583. int ret;
  584. sdev->connector.encoder = encoder;
  585. connector->display_info.width_mm = sdev->pdata->panel.width_mm;
  586. connector->display_info.height_mm = sdev->pdata->panel.height_mm;
  587. ret = drm_connector_init(sdev->ddev, connector, &connector_funcs,
  588. DRM_MODE_CONNECTOR_LVDS);
  589. if (ret < 0)
  590. return ret;
  591. drm_connector_helper_add(connector, &connector_helper_funcs);
  592. ret = drm_connector_register(connector);
  593. if (ret < 0)
  594. goto err_cleanup;
  595. ret = shmob_drm_backlight_init(&sdev->connector);
  596. if (ret < 0)
  597. goto err_sysfs;
  598. ret = drm_mode_connector_attach_encoder(connector, encoder);
  599. if (ret < 0)
  600. goto err_backlight;
  601. connector->encoder = encoder;
  602. drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
  603. drm_object_property_set_value(&connector->base,
  604. sdev->ddev->mode_config.dpms_property, DRM_MODE_DPMS_OFF);
  605. return 0;
  606. err_backlight:
  607. shmob_drm_backlight_exit(&sdev->connector);
  608. err_sysfs:
  609. drm_connector_unregister(connector);
  610. err_cleanup:
  611. drm_connector_cleanup(connector);
  612. return ret;
  613. }