sti_cursor.c 7.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293
  1. /*
  2. * Copyright (C) STMicroelectronics SA 2014
  3. * Authors: Vincent Abriou <vincent.abriou@st.com>
  4. * Fabien Dessenne <fabien.dessenne@st.com>
  5. * for STMicroelectronics.
  6. * License terms: GNU General Public License (GPL), version 2
  7. */
  8. #include <drm/drmP.h>
  9. #include <drm/drm_atomic_helper.h>
  10. #include <drm/drm_fb_cma_helper.h>
  11. #include <drm/drm_gem_cma_helper.h>
  12. #include <drm/drm_plane_helper.h>
  13. #include "sti_compositor.h"
  14. #include "sti_cursor.h"
  15. #include "sti_plane.h"
  16. #include "sti_vtg.h"
  17. /* Registers */
  18. #define CUR_CTL 0x00
  19. #define CUR_VPO 0x0C
  20. #define CUR_PML 0x14
  21. #define CUR_PMP 0x18
  22. #define CUR_SIZE 0x1C
  23. #define CUR_CML 0x20
  24. #define CUR_AWS 0x28
  25. #define CUR_AWE 0x2C
  26. #define CUR_CTL_CLUT_UPDATE BIT(1)
  27. #define STI_CURS_MIN_SIZE 1
  28. #define STI_CURS_MAX_SIZE 128
  29. /*
  30. * pixmap dma buffer stucture
  31. *
  32. * @paddr: physical address
  33. * @size: buffer size
  34. * @base: virtual address
  35. */
  36. struct dma_pixmap {
  37. dma_addr_t paddr;
  38. size_t size;
  39. void *base;
  40. };
  41. /**
  42. * STI Cursor structure
  43. *
  44. * @sti_plane: sti_plane structure
  45. * @dev: driver device
  46. * @regs: cursor registers
  47. * @width: cursor width
  48. * @height: cursor height
  49. * @clut: color look up table
  50. * @clut_paddr: color look up table physical address
  51. * @pixmap: pixmap dma buffer (clut8-format cursor)
  52. */
  53. struct sti_cursor {
  54. struct sti_plane plane;
  55. struct device *dev;
  56. void __iomem *regs;
  57. unsigned int width;
  58. unsigned int height;
  59. unsigned short *clut;
  60. dma_addr_t clut_paddr;
  61. struct dma_pixmap pixmap;
  62. };
  63. static const uint32_t cursor_supported_formats[] = {
  64. DRM_FORMAT_ARGB8888,
  65. };
  66. #define to_sti_cursor(x) container_of(x, struct sti_cursor, plane)
  67. static void sti_cursor_argb8888_to_clut8(struct sti_cursor *cursor, u32 *src)
  68. {
  69. u8 *dst = cursor->pixmap.base;
  70. unsigned int i, j;
  71. u32 a, r, g, b;
  72. for (i = 0; i < cursor->height; i++) {
  73. for (j = 0; j < cursor->width; j++) {
  74. /* Pick the 2 higher bits of each component */
  75. a = (*src >> 30) & 3;
  76. r = (*src >> 22) & 3;
  77. g = (*src >> 14) & 3;
  78. b = (*src >> 6) & 3;
  79. *dst = a << 6 | r << 4 | g << 2 | b;
  80. src++;
  81. dst++;
  82. }
  83. }
  84. }
  85. static void sti_cursor_init(struct sti_cursor *cursor)
  86. {
  87. unsigned short *base = cursor->clut;
  88. unsigned int a, r, g, b;
  89. /* Assign CLUT values, ARGB444 format */
  90. for (a = 0; a < 4; a++)
  91. for (r = 0; r < 4; r++)
  92. for (g = 0; g < 4; g++)
  93. for (b = 0; b < 4; b++)
  94. *base++ = (a * 5) << 12 |
  95. (r * 5) << 8 |
  96. (g * 5) << 4 |
  97. (b * 5);
  98. }
  99. static void sti_cursor_atomic_update(struct drm_plane *drm_plane,
  100. struct drm_plane_state *oldstate)
  101. {
  102. struct drm_plane_state *state = drm_plane->state;
  103. struct sti_plane *plane = to_sti_plane(drm_plane);
  104. struct sti_cursor *cursor = to_sti_cursor(plane);
  105. struct drm_crtc *crtc = state->crtc;
  106. struct sti_mixer *mixer = to_sti_mixer(crtc);
  107. struct drm_framebuffer *fb = state->fb;
  108. struct drm_display_mode *mode = &crtc->mode;
  109. int dst_x = state->crtc_x;
  110. int dst_y = state->crtc_y;
  111. int dst_w = clamp_val(state->crtc_w, 0, mode->crtc_hdisplay - dst_x);
  112. int dst_h = clamp_val(state->crtc_h, 0, mode->crtc_vdisplay - dst_y);
  113. /* src_x are in 16.16 format */
  114. int src_w = state->src_w >> 16;
  115. int src_h = state->src_h >> 16;
  116. bool first_prepare = plane->status == STI_PLANE_DISABLED ? true : false;
  117. struct drm_gem_cma_object *cma_obj;
  118. u32 y, x;
  119. u32 val;
  120. DRM_DEBUG_KMS("CRTC:%d (%s) drm plane:%d (%s)\n",
  121. crtc->base.id, sti_mixer_to_str(mixer),
  122. drm_plane->base.id, sti_plane_to_str(plane));
  123. DRM_DEBUG_KMS("(%dx%d)@(%d,%d)\n", dst_w, dst_h, dst_x, dst_y);
  124. dev_dbg(cursor->dev, "%s %s\n", __func__,
  125. sti_plane_to_str(plane));
  126. if (src_w < STI_CURS_MIN_SIZE ||
  127. src_h < STI_CURS_MIN_SIZE ||
  128. src_w > STI_CURS_MAX_SIZE ||
  129. src_h > STI_CURS_MAX_SIZE) {
  130. DRM_ERROR("Invalid cursor size (%dx%d)\n",
  131. src_w, src_h);
  132. return;
  133. }
  134. /* If the cursor size has changed, re-allocated the pixmap */
  135. if (!cursor->pixmap.base ||
  136. (cursor->width != src_w) ||
  137. (cursor->height != src_h)) {
  138. cursor->width = src_w;
  139. cursor->height = src_h;
  140. if (cursor->pixmap.base)
  141. dma_free_writecombine(cursor->dev,
  142. cursor->pixmap.size,
  143. cursor->pixmap.base,
  144. cursor->pixmap.paddr);
  145. cursor->pixmap.size = cursor->width * cursor->height;
  146. cursor->pixmap.base = dma_alloc_writecombine(cursor->dev,
  147. cursor->pixmap.size,
  148. &cursor->pixmap.paddr,
  149. GFP_KERNEL | GFP_DMA);
  150. if (!cursor->pixmap.base) {
  151. DRM_ERROR("Failed to allocate memory for pixmap\n");
  152. return;
  153. }
  154. }
  155. cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
  156. if (!cma_obj) {
  157. DRM_ERROR("Can't get CMA GEM object for fb\n");
  158. return;
  159. }
  160. /* Convert ARGB8888 to CLUT8 */
  161. sti_cursor_argb8888_to_clut8(cursor, (u32 *)cma_obj->vaddr);
  162. /* AWS and AWE depend on the mode */
  163. y = sti_vtg_get_line_number(*mode, 0);
  164. x = sti_vtg_get_pixel_number(*mode, 0);
  165. val = y << 16 | x;
  166. writel(val, cursor->regs + CUR_AWS);
  167. y = sti_vtg_get_line_number(*mode, mode->vdisplay - 1);
  168. x = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1);
  169. val = y << 16 | x;
  170. writel(val, cursor->regs + CUR_AWE);
  171. if (first_prepare) {
  172. /* Set and fetch CLUT */
  173. writel(cursor->clut_paddr, cursor->regs + CUR_CML);
  174. writel(CUR_CTL_CLUT_UPDATE, cursor->regs + CUR_CTL);
  175. }
  176. /* Set memory location, size, and position */
  177. writel(cursor->pixmap.paddr, cursor->regs + CUR_PML);
  178. writel(cursor->width, cursor->regs + CUR_PMP);
  179. writel(cursor->height << 16 | cursor->width, cursor->regs + CUR_SIZE);
  180. y = sti_vtg_get_line_number(*mode, dst_y);
  181. x = sti_vtg_get_pixel_number(*mode, dst_y);
  182. writel((y << 16) | x, cursor->regs + CUR_VPO);
  183. plane->status = STI_PLANE_UPDATED;
  184. }
  185. static void sti_cursor_atomic_disable(struct drm_plane *drm_plane,
  186. struct drm_plane_state *oldstate)
  187. {
  188. struct sti_plane *plane = to_sti_plane(drm_plane);
  189. struct sti_mixer *mixer = to_sti_mixer(drm_plane->crtc);
  190. if (!drm_plane->crtc) {
  191. DRM_DEBUG_DRIVER("drm plane:%d not enabled\n",
  192. drm_plane->base.id);
  193. return;
  194. }
  195. DRM_DEBUG_DRIVER("CRTC:%d (%s) drm plane:%d (%s)\n",
  196. drm_plane->crtc->base.id, sti_mixer_to_str(mixer),
  197. drm_plane->base.id, sti_plane_to_str(plane));
  198. plane->status = STI_PLANE_DISABLING;
  199. }
  200. static const struct drm_plane_helper_funcs sti_cursor_helpers_funcs = {
  201. .atomic_update = sti_cursor_atomic_update,
  202. .atomic_disable = sti_cursor_atomic_disable,
  203. };
  204. struct drm_plane *sti_cursor_create(struct drm_device *drm_dev,
  205. struct device *dev, int desc,
  206. void __iomem *baseaddr,
  207. unsigned int possible_crtcs)
  208. {
  209. struct sti_cursor *cursor;
  210. size_t size;
  211. int res;
  212. cursor = devm_kzalloc(dev, sizeof(*cursor), GFP_KERNEL);
  213. if (!cursor) {
  214. DRM_ERROR("Failed to allocate memory for cursor\n");
  215. return NULL;
  216. }
  217. /* Allocate clut buffer */
  218. size = 0x100 * sizeof(unsigned short);
  219. cursor->clut = dma_alloc_writecombine(dev, size, &cursor->clut_paddr,
  220. GFP_KERNEL | GFP_DMA);
  221. if (!cursor->clut) {
  222. DRM_ERROR("Failed to allocate memory for cursor clut\n");
  223. goto err_clut;
  224. }
  225. cursor->dev = dev;
  226. cursor->regs = baseaddr;
  227. cursor->plane.desc = desc;
  228. cursor->plane.status = STI_PLANE_DISABLED;
  229. sti_cursor_init(cursor);
  230. res = drm_universal_plane_init(drm_dev, &cursor->plane.drm_plane,
  231. possible_crtcs,
  232. &sti_plane_helpers_funcs,
  233. cursor_supported_formats,
  234. ARRAY_SIZE(cursor_supported_formats),
  235. DRM_PLANE_TYPE_CURSOR);
  236. if (res) {
  237. DRM_ERROR("Failed to initialize universal plane\n");
  238. goto err_plane;
  239. }
  240. drm_plane_helper_add(&cursor->plane.drm_plane,
  241. &sti_cursor_helpers_funcs);
  242. sti_plane_init_property(&cursor->plane, DRM_PLANE_TYPE_CURSOR);
  243. return &cursor->plane.drm_plane;
  244. err_plane:
  245. dma_free_writecombine(dev, size, cursor->clut, cursor->clut_paddr);
  246. err_clut:
  247. devm_kfree(dev, cursor);
  248. return NULL;
  249. }