vmwgfx_ioctl.c 12 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #include "vmwgfx_drv.h"
  28. #include <drm/vmwgfx_drm.h>
  29. #include "vmwgfx_kms.h"
  30. #include "device_include/svga3d_caps.h"
  31. struct svga_3d_compat_cap {
  32. SVGA3dCapsRecordHeader header;
  33. SVGA3dCapPair pairs[SVGA3D_DEVCAP_MAX];
  34. };
  35. int vmw_getparam_ioctl(struct drm_device *dev, void *data,
  36. struct drm_file *file_priv)
  37. {
  38. struct vmw_private *dev_priv = vmw_priv(dev);
  39. struct drm_vmw_getparam_arg *param =
  40. (struct drm_vmw_getparam_arg *)data;
  41. struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
  42. switch (param->param) {
  43. case DRM_VMW_PARAM_NUM_STREAMS:
  44. param->value = vmw_overlay_num_overlays(dev_priv);
  45. break;
  46. case DRM_VMW_PARAM_NUM_FREE_STREAMS:
  47. param->value = vmw_overlay_num_free_overlays(dev_priv);
  48. break;
  49. case DRM_VMW_PARAM_3D:
  50. param->value = vmw_fifo_have_3d(dev_priv) ? 1 : 0;
  51. break;
  52. case DRM_VMW_PARAM_HW_CAPS:
  53. param->value = dev_priv->capabilities;
  54. break;
  55. case DRM_VMW_PARAM_FIFO_CAPS:
  56. param->value = dev_priv->fifo.capabilities;
  57. break;
  58. case DRM_VMW_PARAM_MAX_FB_SIZE:
  59. param->value = dev_priv->prim_bb_mem;
  60. break;
  61. case DRM_VMW_PARAM_FIFO_HW_VERSION:
  62. {
  63. u32 *fifo_mem = dev_priv->mmio_virt;
  64. const struct vmw_fifo_state *fifo = &dev_priv->fifo;
  65. if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS)) {
  66. param->value = SVGA3D_HWVERSION_WS8_B1;
  67. break;
  68. }
  69. param->value =
  70. vmw_mmio_read(fifo_mem +
  71. ((fifo->capabilities &
  72. SVGA_FIFO_CAP_3D_HWVERSION_REVISED) ?
  73. SVGA_FIFO_3D_HWVERSION_REVISED :
  74. SVGA_FIFO_3D_HWVERSION));
  75. break;
  76. }
  77. case DRM_VMW_PARAM_MAX_SURF_MEMORY:
  78. if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS) &&
  79. !vmw_fp->gb_aware)
  80. param->value = dev_priv->max_mob_pages * PAGE_SIZE / 2;
  81. else
  82. param->value = dev_priv->memory_size;
  83. break;
  84. case DRM_VMW_PARAM_3D_CAPS_SIZE:
  85. if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS) &&
  86. vmw_fp->gb_aware)
  87. param->value = SVGA3D_DEVCAP_MAX * sizeof(uint32_t);
  88. else if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS)
  89. param->value = sizeof(struct svga_3d_compat_cap) +
  90. sizeof(uint32_t);
  91. else
  92. param->value = (SVGA_FIFO_3D_CAPS_LAST -
  93. SVGA_FIFO_3D_CAPS + 1) *
  94. sizeof(uint32_t);
  95. break;
  96. case DRM_VMW_PARAM_MAX_MOB_MEMORY:
  97. vmw_fp->gb_aware = true;
  98. param->value = dev_priv->max_mob_pages * PAGE_SIZE;
  99. break;
  100. case DRM_VMW_PARAM_MAX_MOB_SIZE:
  101. param->value = dev_priv->max_mob_size;
  102. break;
  103. case DRM_VMW_PARAM_SCREEN_TARGET:
  104. param->value =
  105. (dev_priv->active_display_unit == vmw_du_screen_target);
  106. break;
  107. case DRM_VMW_PARAM_DX:
  108. param->value = dev_priv->has_dx;
  109. break;
  110. default:
  111. return -EINVAL;
  112. }
  113. return 0;
  114. }
  115. static u32 vmw_mask_multisample(unsigned int cap, u32 fmt_value)
  116. {
  117. /* If the header is updated, update the format test as well! */
  118. BUILD_BUG_ON(SVGA3D_DEVCAP_DXFMT_BC5_UNORM + 1 != SVGA3D_DEVCAP_MAX);
  119. if (cap >= SVGA3D_DEVCAP_DXFMT_X8R8G8B8 &&
  120. cap <= SVGA3D_DEVCAP_DXFMT_BC5_UNORM)
  121. fmt_value &= ~(SVGADX_DXFMT_MULTISAMPLE_2 |
  122. SVGADX_DXFMT_MULTISAMPLE_4 |
  123. SVGADX_DXFMT_MULTISAMPLE_8);
  124. else if (cap == SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES)
  125. return 0;
  126. return fmt_value;
  127. }
  128. static int vmw_fill_compat_cap(struct vmw_private *dev_priv, void *bounce,
  129. size_t size)
  130. {
  131. struct svga_3d_compat_cap *compat_cap =
  132. (struct svga_3d_compat_cap *) bounce;
  133. unsigned int i;
  134. size_t pair_offset = offsetof(struct svga_3d_compat_cap, pairs);
  135. unsigned int max_size;
  136. if (size < pair_offset)
  137. return -EINVAL;
  138. max_size = (size - pair_offset) / sizeof(SVGA3dCapPair);
  139. if (max_size > SVGA3D_DEVCAP_MAX)
  140. max_size = SVGA3D_DEVCAP_MAX;
  141. compat_cap->header.length =
  142. (pair_offset + max_size * sizeof(SVGA3dCapPair)) / sizeof(u32);
  143. compat_cap->header.type = SVGA3DCAPS_RECORD_DEVCAPS;
  144. spin_lock(&dev_priv->cap_lock);
  145. for (i = 0; i < max_size; ++i) {
  146. vmw_write(dev_priv, SVGA_REG_DEV_CAP, i);
  147. compat_cap->pairs[i][0] = i;
  148. compat_cap->pairs[i][1] = vmw_mask_multisample
  149. (i, vmw_read(dev_priv, SVGA_REG_DEV_CAP));
  150. }
  151. spin_unlock(&dev_priv->cap_lock);
  152. return 0;
  153. }
  154. int vmw_get_cap_3d_ioctl(struct drm_device *dev, void *data,
  155. struct drm_file *file_priv)
  156. {
  157. struct drm_vmw_get_3d_cap_arg *arg =
  158. (struct drm_vmw_get_3d_cap_arg *) data;
  159. struct vmw_private *dev_priv = vmw_priv(dev);
  160. uint32_t size;
  161. u32 *fifo_mem;
  162. void __user *buffer = (void __user *)((unsigned long)(arg->buffer));
  163. void *bounce;
  164. int ret;
  165. bool gb_objects = !!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS);
  166. struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
  167. if (unlikely(arg->pad64 != 0 || arg->max_size == 0)) {
  168. DRM_ERROR("Illegal GET_3D_CAP argument.\n");
  169. return -EINVAL;
  170. }
  171. if (gb_objects && vmw_fp->gb_aware)
  172. size = SVGA3D_DEVCAP_MAX * sizeof(uint32_t);
  173. else if (gb_objects)
  174. size = sizeof(struct svga_3d_compat_cap) + sizeof(uint32_t);
  175. else
  176. size = (SVGA_FIFO_3D_CAPS_LAST - SVGA_FIFO_3D_CAPS + 1) *
  177. sizeof(uint32_t);
  178. if (arg->max_size < size)
  179. size = arg->max_size;
  180. bounce = vzalloc(size);
  181. if (unlikely(bounce == NULL)) {
  182. DRM_ERROR("Failed to allocate bounce buffer for 3D caps.\n");
  183. return -ENOMEM;
  184. }
  185. if (gb_objects && vmw_fp->gb_aware) {
  186. int i, num;
  187. uint32_t *bounce32 = (uint32_t *) bounce;
  188. num = size / sizeof(uint32_t);
  189. if (num > SVGA3D_DEVCAP_MAX)
  190. num = SVGA3D_DEVCAP_MAX;
  191. spin_lock(&dev_priv->cap_lock);
  192. for (i = 0; i < num; ++i) {
  193. vmw_write(dev_priv, SVGA_REG_DEV_CAP, i);
  194. *bounce32++ = vmw_mask_multisample
  195. (i, vmw_read(dev_priv, SVGA_REG_DEV_CAP));
  196. }
  197. spin_unlock(&dev_priv->cap_lock);
  198. } else if (gb_objects) {
  199. ret = vmw_fill_compat_cap(dev_priv, bounce, size);
  200. if (unlikely(ret != 0))
  201. goto out_err;
  202. } else {
  203. fifo_mem = dev_priv->mmio_virt;
  204. memcpy(bounce, &fifo_mem[SVGA_FIFO_3D_CAPS], size);
  205. }
  206. ret = copy_to_user(buffer, bounce, size);
  207. if (ret)
  208. ret = -EFAULT;
  209. out_err:
  210. vfree(bounce);
  211. if (unlikely(ret != 0))
  212. DRM_ERROR("Failed to report 3D caps info.\n");
  213. return ret;
  214. }
  215. int vmw_present_ioctl(struct drm_device *dev, void *data,
  216. struct drm_file *file_priv)
  217. {
  218. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  219. struct vmw_private *dev_priv = vmw_priv(dev);
  220. struct drm_vmw_present_arg *arg =
  221. (struct drm_vmw_present_arg *)data;
  222. struct vmw_surface *surface;
  223. struct drm_vmw_rect __user *clips_ptr;
  224. struct drm_vmw_rect *clips = NULL;
  225. struct drm_framebuffer *fb;
  226. struct vmw_framebuffer *vfb;
  227. struct vmw_resource *res;
  228. uint32_t num_clips;
  229. int ret;
  230. num_clips = arg->num_clips;
  231. clips_ptr = (struct drm_vmw_rect __user *)(unsigned long)arg->clips_ptr;
  232. if (unlikely(num_clips == 0))
  233. return 0;
  234. if (clips_ptr == NULL) {
  235. DRM_ERROR("Variable clips_ptr must be specified.\n");
  236. ret = -EINVAL;
  237. goto out_clips;
  238. }
  239. clips = kcalloc(num_clips, sizeof(*clips), GFP_KERNEL);
  240. if (clips == NULL) {
  241. DRM_ERROR("Failed to allocate clip rect list.\n");
  242. ret = -ENOMEM;
  243. goto out_clips;
  244. }
  245. ret = copy_from_user(clips, clips_ptr, num_clips * sizeof(*clips));
  246. if (ret) {
  247. DRM_ERROR("Failed to copy clip rects from userspace.\n");
  248. ret = -EFAULT;
  249. goto out_no_copy;
  250. }
  251. drm_modeset_lock_all(dev);
  252. fb = drm_framebuffer_lookup(dev, arg->fb_id);
  253. if (!fb) {
  254. DRM_ERROR("Invalid framebuffer id.\n");
  255. ret = -ENOENT;
  256. goto out_no_fb;
  257. }
  258. vfb = vmw_framebuffer_to_vfb(fb);
  259. ret = ttm_read_lock(&dev_priv->reservation_sem, true);
  260. if (unlikely(ret != 0))
  261. goto out_no_ttm_lock;
  262. ret = vmw_user_resource_lookup_handle(dev_priv, tfile, arg->sid,
  263. user_surface_converter,
  264. &res);
  265. if (ret)
  266. goto out_no_surface;
  267. surface = vmw_res_to_srf(res);
  268. ret = vmw_kms_present(dev_priv, file_priv,
  269. vfb, surface, arg->sid,
  270. arg->dest_x, arg->dest_y,
  271. clips, num_clips);
  272. /* vmw_user_surface_lookup takes one ref so does new_fb */
  273. vmw_surface_unreference(&surface);
  274. out_no_surface:
  275. ttm_read_unlock(&dev_priv->reservation_sem);
  276. out_no_ttm_lock:
  277. drm_framebuffer_unreference(fb);
  278. out_no_fb:
  279. drm_modeset_unlock_all(dev);
  280. out_no_copy:
  281. kfree(clips);
  282. out_clips:
  283. return ret;
  284. }
  285. int vmw_present_readback_ioctl(struct drm_device *dev, void *data,
  286. struct drm_file *file_priv)
  287. {
  288. struct vmw_private *dev_priv = vmw_priv(dev);
  289. struct drm_vmw_present_readback_arg *arg =
  290. (struct drm_vmw_present_readback_arg *)data;
  291. struct drm_vmw_fence_rep __user *user_fence_rep =
  292. (struct drm_vmw_fence_rep __user *)
  293. (unsigned long)arg->fence_rep;
  294. struct drm_vmw_rect __user *clips_ptr;
  295. struct drm_vmw_rect *clips = NULL;
  296. struct drm_framebuffer *fb;
  297. struct vmw_framebuffer *vfb;
  298. uint32_t num_clips;
  299. int ret;
  300. num_clips = arg->num_clips;
  301. clips_ptr = (struct drm_vmw_rect __user *)(unsigned long)arg->clips_ptr;
  302. if (unlikely(num_clips == 0))
  303. return 0;
  304. if (clips_ptr == NULL) {
  305. DRM_ERROR("Argument clips_ptr must be specified.\n");
  306. ret = -EINVAL;
  307. goto out_clips;
  308. }
  309. clips = kcalloc(num_clips, sizeof(*clips), GFP_KERNEL);
  310. if (clips == NULL) {
  311. DRM_ERROR("Failed to allocate clip rect list.\n");
  312. ret = -ENOMEM;
  313. goto out_clips;
  314. }
  315. ret = copy_from_user(clips, clips_ptr, num_clips * sizeof(*clips));
  316. if (ret) {
  317. DRM_ERROR("Failed to copy clip rects from userspace.\n");
  318. ret = -EFAULT;
  319. goto out_no_copy;
  320. }
  321. drm_modeset_lock_all(dev);
  322. fb = drm_framebuffer_lookup(dev, arg->fb_id);
  323. if (!fb) {
  324. DRM_ERROR("Invalid framebuffer id.\n");
  325. ret = -ENOENT;
  326. goto out_no_fb;
  327. }
  328. vfb = vmw_framebuffer_to_vfb(fb);
  329. if (!vfb->dmabuf) {
  330. DRM_ERROR("Framebuffer not dmabuf backed.\n");
  331. ret = -EINVAL;
  332. goto out_no_ttm_lock;
  333. }
  334. ret = ttm_read_lock(&dev_priv->reservation_sem, true);
  335. if (unlikely(ret != 0))
  336. goto out_no_ttm_lock;
  337. ret = vmw_kms_readback(dev_priv, file_priv,
  338. vfb, user_fence_rep,
  339. clips, num_clips);
  340. ttm_read_unlock(&dev_priv->reservation_sem);
  341. out_no_ttm_lock:
  342. drm_framebuffer_unreference(fb);
  343. out_no_fb:
  344. drm_modeset_unlock_all(dev);
  345. out_no_copy:
  346. kfree(clips);
  347. out_clips:
  348. return ret;
  349. }
  350. /**
  351. * vmw_fops_poll - wrapper around the drm_poll function
  352. *
  353. * @filp: See the linux fops poll documentation.
  354. * @wait: See the linux fops poll documentation.
  355. *
  356. * Wrapper around the drm_poll function that makes sure the device is
  357. * processing the fifo if drm_poll decides to wait.
  358. */
  359. unsigned int vmw_fops_poll(struct file *filp, struct poll_table_struct *wait)
  360. {
  361. struct drm_file *file_priv = filp->private_data;
  362. struct vmw_private *dev_priv =
  363. vmw_priv(file_priv->minor->dev);
  364. vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
  365. return drm_poll(filp, wait);
  366. }
  367. /**
  368. * vmw_fops_read - wrapper around the drm_read function
  369. *
  370. * @filp: See the linux fops read documentation.
  371. * @buffer: See the linux fops read documentation.
  372. * @count: See the linux fops read documentation.
  373. * offset: See the linux fops read documentation.
  374. *
  375. * Wrapper around the drm_read function that makes sure the device is
  376. * processing the fifo if drm_read decides to wait.
  377. */
  378. ssize_t vmw_fops_read(struct file *filp, char __user *buffer,
  379. size_t count, loff_t *offset)
  380. {
  381. struct drm_file *file_priv = filp->private_data;
  382. struct vmw_private *dev_priv =
  383. vmw_priv(file_priv->minor->dev);
  384. vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
  385. return drm_read(filp, buffer, count, offset);
  386. }