vmwgfx_shader.c 28 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #include "vmwgfx_drv.h"
  28. #include "vmwgfx_resource_priv.h"
  29. #include "vmwgfx_binding.h"
  30. #include "ttm/ttm_placement.h"
  31. struct vmw_shader {
  32. struct vmw_resource res;
  33. SVGA3dShaderType type;
  34. uint32_t size;
  35. uint8_t num_input_sig;
  36. uint8_t num_output_sig;
  37. };
  38. struct vmw_user_shader {
  39. struct ttm_base_object base;
  40. struct vmw_shader shader;
  41. };
  42. struct vmw_dx_shader {
  43. struct vmw_resource res;
  44. struct vmw_resource *ctx;
  45. struct vmw_resource *cotable;
  46. u32 id;
  47. bool committed;
  48. struct list_head cotable_head;
  49. };
  50. static uint64_t vmw_user_shader_size;
  51. static uint64_t vmw_shader_size;
  52. static size_t vmw_shader_dx_size;
  53. static void vmw_user_shader_free(struct vmw_resource *res);
  54. static struct vmw_resource *
  55. vmw_user_shader_base_to_res(struct ttm_base_object *base);
  56. static int vmw_gb_shader_create(struct vmw_resource *res);
  57. static int vmw_gb_shader_bind(struct vmw_resource *res,
  58. struct ttm_validate_buffer *val_buf);
  59. static int vmw_gb_shader_unbind(struct vmw_resource *res,
  60. bool readback,
  61. struct ttm_validate_buffer *val_buf);
  62. static int vmw_gb_shader_destroy(struct vmw_resource *res);
  63. static int vmw_dx_shader_create(struct vmw_resource *res);
  64. static int vmw_dx_shader_bind(struct vmw_resource *res,
  65. struct ttm_validate_buffer *val_buf);
  66. static int vmw_dx_shader_unbind(struct vmw_resource *res,
  67. bool readback,
  68. struct ttm_validate_buffer *val_buf);
  69. static void vmw_dx_shader_commit_notify(struct vmw_resource *res,
  70. enum vmw_cmdbuf_res_state state);
  71. static bool vmw_shader_id_ok(u32 user_key, SVGA3dShaderType shader_type);
  72. static u32 vmw_shader_key(u32 user_key, SVGA3dShaderType shader_type);
  73. static uint64_t vmw_user_shader_size;
  74. static const struct vmw_user_resource_conv user_shader_conv = {
  75. .object_type = VMW_RES_SHADER,
  76. .base_obj_to_res = vmw_user_shader_base_to_res,
  77. .res_free = vmw_user_shader_free
  78. };
  79. const struct vmw_user_resource_conv *user_shader_converter =
  80. &user_shader_conv;
  81. static const struct vmw_res_func vmw_gb_shader_func = {
  82. .res_type = vmw_res_shader,
  83. .needs_backup = true,
  84. .may_evict = true,
  85. .type_name = "guest backed shaders",
  86. .backup_placement = &vmw_mob_placement,
  87. .create = vmw_gb_shader_create,
  88. .destroy = vmw_gb_shader_destroy,
  89. .bind = vmw_gb_shader_bind,
  90. .unbind = vmw_gb_shader_unbind
  91. };
  92. static const struct vmw_res_func vmw_dx_shader_func = {
  93. .res_type = vmw_res_shader,
  94. .needs_backup = true,
  95. .may_evict = false,
  96. .type_name = "dx shaders",
  97. .backup_placement = &vmw_mob_placement,
  98. .create = vmw_dx_shader_create,
  99. /*
  100. * The destroy callback is only called with a committed resource on
  101. * context destroy, in which case we destroy the cotable anyway,
  102. * so there's no need to destroy DX shaders separately.
  103. */
  104. .destroy = NULL,
  105. .bind = vmw_dx_shader_bind,
  106. .unbind = vmw_dx_shader_unbind,
  107. .commit_notify = vmw_dx_shader_commit_notify,
  108. };
  109. /**
  110. * Shader management:
  111. */
  112. static inline struct vmw_shader *
  113. vmw_res_to_shader(struct vmw_resource *res)
  114. {
  115. return container_of(res, struct vmw_shader, res);
  116. }
  117. /**
  118. * vmw_res_to_dx_shader - typecast a struct vmw_resource to a
  119. * struct vmw_dx_shader
  120. *
  121. * @res: Pointer to the struct vmw_resource.
  122. */
  123. static inline struct vmw_dx_shader *
  124. vmw_res_to_dx_shader(struct vmw_resource *res)
  125. {
  126. return container_of(res, struct vmw_dx_shader, res);
  127. }
  128. static void vmw_hw_shader_destroy(struct vmw_resource *res)
  129. {
  130. if (likely(res->func->destroy))
  131. (void) res->func->destroy(res);
  132. else
  133. res->id = -1;
  134. }
  135. static int vmw_gb_shader_init(struct vmw_private *dev_priv,
  136. struct vmw_resource *res,
  137. uint32_t size,
  138. uint64_t offset,
  139. SVGA3dShaderType type,
  140. uint8_t num_input_sig,
  141. uint8_t num_output_sig,
  142. struct vmw_dma_buffer *byte_code,
  143. void (*res_free) (struct vmw_resource *res))
  144. {
  145. struct vmw_shader *shader = vmw_res_to_shader(res);
  146. int ret;
  147. ret = vmw_resource_init(dev_priv, res, true, res_free,
  148. &vmw_gb_shader_func);
  149. if (unlikely(ret != 0)) {
  150. if (res_free)
  151. res_free(res);
  152. else
  153. kfree(res);
  154. return ret;
  155. }
  156. res->backup_size = size;
  157. if (byte_code) {
  158. res->backup = vmw_dmabuf_reference(byte_code);
  159. res->backup_offset = offset;
  160. }
  161. shader->size = size;
  162. shader->type = type;
  163. shader->num_input_sig = num_input_sig;
  164. shader->num_output_sig = num_output_sig;
  165. vmw_resource_activate(res, vmw_hw_shader_destroy);
  166. return 0;
  167. }
  168. /*
  169. * GB shader code:
  170. */
  171. static int vmw_gb_shader_create(struct vmw_resource *res)
  172. {
  173. struct vmw_private *dev_priv = res->dev_priv;
  174. struct vmw_shader *shader = vmw_res_to_shader(res);
  175. int ret;
  176. struct {
  177. SVGA3dCmdHeader header;
  178. SVGA3dCmdDefineGBShader body;
  179. } *cmd;
  180. if (likely(res->id != -1))
  181. return 0;
  182. ret = vmw_resource_alloc_id(res);
  183. if (unlikely(ret != 0)) {
  184. DRM_ERROR("Failed to allocate a shader id.\n");
  185. goto out_no_id;
  186. }
  187. if (unlikely(res->id >= VMWGFX_NUM_GB_SHADER)) {
  188. ret = -EBUSY;
  189. goto out_no_fifo;
  190. }
  191. cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
  192. if (unlikely(cmd == NULL)) {
  193. DRM_ERROR("Failed reserving FIFO space for shader "
  194. "creation.\n");
  195. ret = -ENOMEM;
  196. goto out_no_fifo;
  197. }
  198. cmd->header.id = SVGA_3D_CMD_DEFINE_GB_SHADER;
  199. cmd->header.size = sizeof(cmd->body);
  200. cmd->body.shid = res->id;
  201. cmd->body.type = shader->type;
  202. cmd->body.sizeInBytes = shader->size;
  203. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  204. vmw_fifo_resource_inc(dev_priv);
  205. return 0;
  206. out_no_fifo:
  207. vmw_resource_release_id(res);
  208. out_no_id:
  209. return ret;
  210. }
  211. static int vmw_gb_shader_bind(struct vmw_resource *res,
  212. struct ttm_validate_buffer *val_buf)
  213. {
  214. struct vmw_private *dev_priv = res->dev_priv;
  215. struct {
  216. SVGA3dCmdHeader header;
  217. SVGA3dCmdBindGBShader body;
  218. } *cmd;
  219. struct ttm_buffer_object *bo = val_buf->bo;
  220. BUG_ON(bo->mem.mem_type != VMW_PL_MOB);
  221. cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
  222. if (unlikely(cmd == NULL)) {
  223. DRM_ERROR("Failed reserving FIFO space for shader "
  224. "binding.\n");
  225. return -ENOMEM;
  226. }
  227. cmd->header.id = SVGA_3D_CMD_BIND_GB_SHADER;
  228. cmd->header.size = sizeof(cmd->body);
  229. cmd->body.shid = res->id;
  230. cmd->body.mobid = bo->mem.start;
  231. cmd->body.offsetInBytes = res->backup_offset;
  232. res->backup_dirty = false;
  233. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  234. return 0;
  235. }
  236. static int vmw_gb_shader_unbind(struct vmw_resource *res,
  237. bool readback,
  238. struct ttm_validate_buffer *val_buf)
  239. {
  240. struct vmw_private *dev_priv = res->dev_priv;
  241. struct {
  242. SVGA3dCmdHeader header;
  243. SVGA3dCmdBindGBShader body;
  244. } *cmd;
  245. struct vmw_fence_obj *fence;
  246. BUG_ON(res->backup->base.mem.mem_type != VMW_PL_MOB);
  247. cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
  248. if (unlikely(cmd == NULL)) {
  249. DRM_ERROR("Failed reserving FIFO space for shader "
  250. "unbinding.\n");
  251. return -ENOMEM;
  252. }
  253. cmd->header.id = SVGA_3D_CMD_BIND_GB_SHADER;
  254. cmd->header.size = sizeof(cmd->body);
  255. cmd->body.shid = res->id;
  256. cmd->body.mobid = SVGA3D_INVALID_ID;
  257. cmd->body.offsetInBytes = 0;
  258. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  259. /*
  260. * Create a fence object and fence the backup buffer.
  261. */
  262. (void) vmw_execbuf_fence_commands(NULL, dev_priv,
  263. &fence, NULL);
  264. vmw_fence_single_bo(val_buf->bo, fence);
  265. if (likely(fence != NULL))
  266. vmw_fence_obj_unreference(&fence);
  267. return 0;
  268. }
  269. static int vmw_gb_shader_destroy(struct vmw_resource *res)
  270. {
  271. struct vmw_private *dev_priv = res->dev_priv;
  272. struct {
  273. SVGA3dCmdHeader header;
  274. SVGA3dCmdDestroyGBShader body;
  275. } *cmd;
  276. if (likely(res->id == -1))
  277. return 0;
  278. mutex_lock(&dev_priv->binding_mutex);
  279. vmw_binding_res_list_scrub(&res->binding_head);
  280. cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
  281. if (unlikely(cmd == NULL)) {
  282. DRM_ERROR("Failed reserving FIFO space for shader "
  283. "destruction.\n");
  284. mutex_unlock(&dev_priv->binding_mutex);
  285. return -ENOMEM;
  286. }
  287. cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SHADER;
  288. cmd->header.size = sizeof(cmd->body);
  289. cmd->body.shid = res->id;
  290. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  291. mutex_unlock(&dev_priv->binding_mutex);
  292. vmw_resource_release_id(res);
  293. vmw_fifo_resource_dec(dev_priv);
  294. return 0;
  295. }
  296. /*
  297. * DX shader code:
  298. */
  299. /**
  300. * vmw_dx_shader_commit_notify - Notify that a shader operation has been
  301. * committed to hardware from a user-supplied command stream.
  302. *
  303. * @res: Pointer to the shader resource.
  304. * @state: Indicating whether a creation or removal has been committed.
  305. *
  306. */
  307. static void vmw_dx_shader_commit_notify(struct vmw_resource *res,
  308. enum vmw_cmdbuf_res_state state)
  309. {
  310. struct vmw_dx_shader *shader = vmw_res_to_dx_shader(res);
  311. struct vmw_private *dev_priv = res->dev_priv;
  312. if (state == VMW_CMDBUF_RES_ADD) {
  313. mutex_lock(&dev_priv->binding_mutex);
  314. vmw_cotable_add_resource(shader->cotable,
  315. &shader->cotable_head);
  316. shader->committed = true;
  317. res->id = shader->id;
  318. mutex_unlock(&dev_priv->binding_mutex);
  319. } else {
  320. mutex_lock(&dev_priv->binding_mutex);
  321. list_del_init(&shader->cotable_head);
  322. shader->committed = false;
  323. res->id = -1;
  324. mutex_unlock(&dev_priv->binding_mutex);
  325. }
  326. }
  327. /**
  328. * vmw_dx_shader_unscrub - Have the device reattach a MOB to a DX shader.
  329. *
  330. * @res: The shader resource
  331. *
  332. * This function reverts a scrub operation.
  333. */
  334. static int vmw_dx_shader_unscrub(struct vmw_resource *res)
  335. {
  336. struct vmw_dx_shader *shader = vmw_res_to_dx_shader(res);
  337. struct vmw_private *dev_priv = res->dev_priv;
  338. struct {
  339. SVGA3dCmdHeader header;
  340. SVGA3dCmdDXBindShader body;
  341. } *cmd;
  342. if (!list_empty(&shader->cotable_head) || !shader->committed)
  343. return 0;
  344. cmd = vmw_fifo_reserve_dx(dev_priv, sizeof(*cmd),
  345. shader->ctx->id);
  346. if (unlikely(cmd == NULL)) {
  347. DRM_ERROR("Failed reserving FIFO space for shader "
  348. "scrubbing.\n");
  349. return -ENOMEM;
  350. }
  351. cmd->header.id = SVGA_3D_CMD_DX_BIND_SHADER;
  352. cmd->header.size = sizeof(cmd->body);
  353. cmd->body.cid = shader->ctx->id;
  354. cmd->body.shid = shader->id;
  355. cmd->body.mobid = res->backup->base.mem.start;
  356. cmd->body.offsetInBytes = res->backup_offset;
  357. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  358. vmw_cotable_add_resource(shader->cotable, &shader->cotable_head);
  359. return 0;
  360. }
  361. /**
  362. * vmw_dx_shader_create - The DX shader create callback
  363. *
  364. * @res: The DX shader resource
  365. *
  366. * The create callback is called as part of resource validation and
  367. * makes sure that we unscrub the shader if it's previously been scrubbed.
  368. */
  369. static int vmw_dx_shader_create(struct vmw_resource *res)
  370. {
  371. struct vmw_private *dev_priv = res->dev_priv;
  372. struct vmw_dx_shader *shader = vmw_res_to_dx_shader(res);
  373. int ret = 0;
  374. WARN_ON_ONCE(!shader->committed);
  375. if (!list_empty(&res->mob_head)) {
  376. mutex_lock(&dev_priv->binding_mutex);
  377. ret = vmw_dx_shader_unscrub(res);
  378. mutex_unlock(&dev_priv->binding_mutex);
  379. }
  380. res->id = shader->id;
  381. return ret;
  382. }
  383. /**
  384. * vmw_dx_shader_bind - The DX shader bind callback
  385. *
  386. * @res: The DX shader resource
  387. * @val_buf: Pointer to the validate buffer.
  388. *
  389. */
  390. static int vmw_dx_shader_bind(struct vmw_resource *res,
  391. struct ttm_validate_buffer *val_buf)
  392. {
  393. struct vmw_private *dev_priv = res->dev_priv;
  394. struct ttm_buffer_object *bo = val_buf->bo;
  395. BUG_ON(bo->mem.mem_type != VMW_PL_MOB);
  396. mutex_lock(&dev_priv->binding_mutex);
  397. vmw_dx_shader_unscrub(res);
  398. mutex_unlock(&dev_priv->binding_mutex);
  399. return 0;
  400. }
  401. /**
  402. * vmw_dx_shader_scrub - Have the device unbind a MOB from a DX shader.
  403. *
  404. * @res: The shader resource
  405. *
  406. * This function unbinds a MOB from the DX shader without requiring the
  407. * MOB dma_buffer to be reserved. The driver still considers the MOB bound.
  408. * However, once the driver eventually decides to unbind the MOB, it doesn't
  409. * need to access the context.
  410. */
  411. static int vmw_dx_shader_scrub(struct vmw_resource *res)
  412. {
  413. struct vmw_dx_shader *shader = vmw_res_to_dx_shader(res);
  414. struct vmw_private *dev_priv = res->dev_priv;
  415. struct {
  416. SVGA3dCmdHeader header;
  417. SVGA3dCmdDXBindShader body;
  418. } *cmd;
  419. if (list_empty(&shader->cotable_head))
  420. return 0;
  421. WARN_ON_ONCE(!shader->committed);
  422. cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
  423. if (unlikely(cmd == NULL)) {
  424. DRM_ERROR("Failed reserving FIFO space for shader "
  425. "scrubbing.\n");
  426. return -ENOMEM;
  427. }
  428. cmd->header.id = SVGA_3D_CMD_DX_BIND_SHADER;
  429. cmd->header.size = sizeof(cmd->body);
  430. cmd->body.cid = shader->ctx->id;
  431. cmd->body.shid = res->id;
  432. cmd->body.mobid = SVGA3D_INVALID_ID;
  433. cmd->body.offsetInBytes = 0;
  434. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  435. res->id = -1;
  436. list_del_init(&shader->cotable_head);
  437. return 0;
  438. }
  439. /**
  440. * vmw_dx_shader_unbind - The dx shader unbind callback.
  441. *
  442. * @res: The shader resource
  443. * @readback: Whether this is a readback unbind. Currently unused.
  444. * @val_buf: MOB buffer information.
  445. */
  446. static int vmw_dx_shader_unbind(struct vmw_resource *res,
  447. bool readback,
  448. struct ttm_validate_buffer *val_buf)
  449. {
  450. struct vmw_private *dev_priv = res->dev_priv;
  451. struct vmw_fence_obj *fence;
  452. int ret;
  453. BUG_ON(res->backup->base.mem.mem_type != VMW_PL_MOB);
  454. mutex_lock(&dev_priv->binding_mutex);
  455. ret = vmw_dx_shader_scrub(res);
  456. mutex_unlock(&dev_priv->binding_mutex);
  457. if (ret)
  458. return ret;
  459. (void) vmw_execbuf_fence_commands(NULL, dev_priv,
  460. &fence, NULL);
  461. vmw_fence_single_bo(val_buf->bo, fence);
  462. if (likely(fence != NULL))
  463. vmw_fence_obj_unreference(&fence);
  464. return 0;
  465. }
  466. /**
  467. * vmw_dx_shader_cotable_list_scrub - The cotable unbind_func callback for
  468. * DX shaders.
  469. *
  470. * @dev_priv: Pointer to device private structure.
  471. * @list: The list of cotable resources.
  472. * @readback: Whether the call was part of a readback unbind.
  473. *
  474. * Scrubs all shader MOBs so that any subsequent shader unbind or shader
  475. * destroy operation won't need to swap in the context.
  476. */
  477. void vmw_dx_shader_cotable_list_scrub(struct vmw_private *dev_priv,
  478. struct list_head *list,
  479. bool readback)
  480. {
  481. struct vmw_dx_shader *entry, *next;
  482. WARN_ON_ONCE(!mutex_is_locked(&dev_priv->binding_mutex));
  483. list_for_each_entry_safe(entry, next, list, cotable_head) {
  484. WARN_ON(vmw_dx_shader_scrub(&entry->res));
  485. if (!readback)
  486. entry->committed = false;
  487. }
  488. }
  489. /**
  490. * vmw_dx_shader_res_free - The DX shader free callback
  491. *
  492. * @res: The shader resource
  493. *
  494. * Frees the DX shader resource and updates memory accounting.
  495. */
  496. static void vmw_dx_shader_res_free(struct vmw_resource *res)
  497. {
  498. struct vmw_private *dev_priv = res->dev_priv;
  499. struct vmw_dx_shader *shader = vmw_res_to_dx_shader(res);
  500. vmw_resource_unreference(&shader->cotable);
  501. kfree(shader);
  502. ttm_mem_global_free(vmw_mem_glob(dev_priv), vmw_shader_dx_size);
  503. }
  504. /**
  505. * vmw_dx_shader_add - Add a shader resource as a command buffer managed
  506. * resource.
  507. *
  508. * @man: The command buffer resource manager.
  509. * @ctx: Pointer to the context resource.
  510. * @user_key: The id used for this shader.
  511. * @shader_type: The shader type.
  512. * @list: The list of staged command buffer managed resources.
  513. */
  514. int vmw_dx_shader_add(struct vmw_cmdbuf_res_manager *man,
  515. struct vmw_resource *ctx,
  516. u32 user_key,
  517. SVGA3dShaderType shader_type,
  518. struct list_head *list)
  519. {
  520. struct vmw_dx_shader *shader;
  521. struct vmw_resource *res;
  522. struct vmw_private *dev_priv = ctx->dev_priv;
  523. int ret;
  524. if (!vmw_shader_dx_size)
  525. vmw_shader_dx_size = ttm_round_pot(sizeof(*shader));
  526. if (!vmw_shader_id_ok(user_key, shader_type))
  527. return -EINVAL;
  528. ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv), vmw_shader_dx_size,
  529. false, true);
  530. if (ret) {
  531. if (ret != -ERESTARTSYS)
  532. DRM_ERROR("Out of graphics memory for shader "
  533. "creation.\n");
  534. return ret;
  535. }
  536. shader = kmalloc(sizeof(*shader), GFP_KERNEL);
  537. if (!shader) {
  538. ttm_mem_global_free(vmw_mem_glob(dev_priv), vmw_shader_dx_size);
  539. return -ENOMEM;
  540. }
  541. res = &shader->res;
  542. shader->ctx = ctx;
  543. shader->cotable = vmw_context_cotable(ctx, SVGA_COTABLE_DXSHADER);
  544. shader->id = user_key;
  545. shader->committed = false;
  546. INIT_LIST_HEAD(&shader->cotable_head);
  547. ret = vmw_resource_init(dev_priv, res, true,
  548. vmw_dx_shader_res_free, &vmw_dx_shader_func);
  549. if (ret)
  550. goto out_resource_init;
  551. /*
  552. * The user_key name-space is not per shader type for DX shaders,
  553. * so when hashing, use a single zero shader type.
  554. */
  555. ret = vmw_cmdbuf_res_add(man, vmw_cmdbuf_res_shader,
  556. vmw_shader_key(user_key, 0),
  557. res, list);
  558. if (ret)
  559. goto out_resource_init;
  560. res->id = shader->id;
  561. vmw_resource_activate(res, vmw_hw_shader_destroy);
  562. out_resource_init:
  563. vmw_resource_unreference(&res);
  564. return ret;
  565. }
  566. /**
  567. * User-space shader management:
  568. */
  569. static struct vmw_resource *
  570. vmw_user_shader_base_to_res(struct ttm_base_object *base)
  571. {
  572. return &(container_of(base, struct vmw_user_shader, base)->
  573. shader.res);
  574. }
  575. static void vmw_user_shader_free(struct vmw_resource *res)
  576. {
  577. struct vmw_user_shader *ushader =
  578. container_of(res, struct vmw_user_shader, shader.res);
  579. struct vmw_private *dev_priv = res->dev_priv;
  580. ttm_base_object_kfree(ushader, base);
  581. ttm_mem_global_free(vmw_mem_glob(dev_priv),
  582. vmw_user_shader_size);
  583. }
  584. static void vmw_shader_free(struct vmw_resource *res)
  585. {
  586. struct vmw_shader *shader = vmw_res_to_shader(res);
  587. struct vmw_private *dev_priv = res->dev_priv;
  588. kfree(shader);
  589. ttm_mem_global_free(vmw_mem_glob(dev_priv),
  590. vmw_shader_size);
  591. }
  592. /**
  593. * This function is called when user space has no more references on the
  594. * base object. It releases the base-object's reference on the resource object.
  595. */
  596. static void vmw_user_shader_base_release(struct ttm_base_object **p_base)
  597. {
  598. struct ttm_base_object *base = *p_base;
  599. struct vmw_resource *res = vmw_user_shader_base_to_res(base);
  600. *p_base = NULL;
  601. vmw_resource_unreference(&res);
  602. }
  603. int vmw_shader_destroy_ioctl(struct drm_device *dev, void *data,
  604. struct drm_file *file_priv)
  605. {
  606. struct drm_vmw_shader_arg *arg = (struct drm_vmw_shader_arg *)data;
  607. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  608. return ttm_ref_object_base_unref(tfile, arg->handle,
  609. TTM_REF_USAGE);
  610. }
  611. static int vmw_user_shader_alloc(struct vmw_private *dev_priv,
  612. struct vmw_dma_buffer *buffer,
  613. size_t shader_size,
  614. size_t offset,
  615. SVGA3dShaderType shader_type,
  616. uint8_t num_input_sig,
  617. uint8_t num_output_sig,
  618. struct ttm_object_file *tfile,
  619. u32 *handle)
  620. {
  621. struct vmw_user_shader *ushader;
  622. struct vmw_resource *res, *tmp;
  623. int ret;
  624. /*
  625. * Approximate idr memory usage with 128 bytes. It will be limited
  626. * by maximum number_of shaders anyway.
  627. */
  628. if (unlikely(vmw_user_shader_size == 0))
  629. vmw_user_shader_size =
  630. ttm_round_pot(sizeof(struct vmw_user_shader)) + 128;
  631. ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
  632. vmw_user_shader_size,
  633. false, true);
  634. if (unlikely(ret != 0)) {
  635. if (ret != -ERESTARTSYS)
  636. DRM_ERROR("Out of graphics memory for shader "
  637. "creation.\n");
  638. goto out;
  639. }
  640. ushader = kzalloc(sizeof(*ushader), GFP_KERNEL);
  641. if (unlikely(ushader == NULL)) {
  642. ttm_mem_global_free(vmw_mem_glob(dev_priv),
  643. vmw_user_shader_size);
  644. ret = -ENOMEM;
  645. goto out;
  646. }
  647. res = &ushader->shader.res;
  648. ushader->base.shareable = false;
  649. ushader->base.tfile = NULL;
  650. /*
  651. * From here on, the destructor takes over resource freeing.
  652. */
  653. ret = vmw_gb_shader_init(dev_priv, res, shader_size,
  654. offset, shader_type, num_input_sig,
  655. num_output_sig, buffer,
  656. vmw_user_shader_free);
  657. if (unlikely(ret != 0))
  658. goto out;
  659. tmp = vmw_resource_reference(res);
  660. ret = ttm_base_object_init(tfile, &ushader->base, false,
  661. VMW_RES_SHADER,
  662. &vmw_user_shader_base_release, NULL);
  663. if (unlikely(ret != 0)) {
  664. vmw_resource_unreference(&tmp);
  665. goto out_err;
  666. }
  667. if (handle)
  668. *handle = ushader->base.hash.key;
  669. out_err:
  670. vmw_resource_unreference(&res);
  671. out:
  672. return ret;
  673. }
  674. static struct vmw_resource *vmw_shader_alloc(struct vmw_private *dev_priv,
  675. struct vmw_dma_buffer *buffer,
  676. size_t shader_size,
  677. size_t offset,
  678. SVGA3dShaderType shader_type)
  679. {
  680. struct vmw_shader *shader;
  681. struct vmw_resource *res;
  682. int ret;
  683. /*
  684. * Approximate idr memory usage with 128 bytes. It will be limited
  685. * by maximum number_of shaders anyway.
  686. */
  687. if (unlikely(vmw_shader_size == 0))
  688. vmw_shader_size =
  689. ttm_round_pot(sizeof(struct vmw_shader)) + 128;
  690. ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
  691. vmw_shader_size,
  692. false, true);
  693. if (unlikely(ret != 0)) {
  694. if (ret != -ERESTARTSYS)
  695. DRM_ERROR("Out of graphics memory for shader "
  696. "creation.\n");
  697. goto out_err;
  698. }
  699. shader = kzalloc(sizeof(*shader), GFP_KERNEL);
  700. if (unlikely(shader == NULL)) {
  701. ttm_mem_global_free(vmw_mem_glob(dev_priv),
  702. vmw_shader_size);
  703. ret = -ENOMEM;
  704. goto out_err;
  705. }
  706. res = &shader->res;
  707. /*
  708. * From here on, the destructor takes over resource freeing.
  709. */
  710. ret = vmw_gb_shader_init(dev_priv, res, shader_size,
  711. offset, shader_type, 0, 0, buffer,
  712. vmw_shader_free);
  713. out_err:
  714. return ret ? ERR_PTR(ret) : res;
  715. }
  716. static int vmw_shader_define(struct drm_device *dev, struct drm_file *file_priv,
  717. enum drm_vmw_shader_type shader_type_drm,
  718. u32 buffer_handle, size_t size, size_t offset,
  719. uint8_t num_input_sig, uint8_t num_output_sig,
  720. uint32_t *shader_handle)
  721. {
  722. struct vmw_private *dev_priv = vmw_priv(dev);
  723. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  724. struct vmw_dma_buffer *buffer = NULL;
  725. SVGA3dShaderType shader_type;
  726. int ret;
  727. if (buffer_handle != SVGA3D_INVALID_ID) {
  728. ret = vmw_user_dmabuf_lookup(tfile, buffer_handle,
  729. &buffer, NULL);
  730. if (unlikely(ret != 0)) {
  731. DRM_ERROR("Could not find buffer for shader "
  732. "creation.\n");
  733. return ret;
  734. }
  735. if ((u64)buffer->base.num_pages * PAGE_SIZE <
  736. (u64)size + (u64)offset) {
  737. DRM_ERROR("Illegal buffer- or shader size.\n");
  738. ret = -EINVAL;
  739. goto out_bad_arg;
  740. }
  741. }
  742. switch (shader_type_drm) {
  743. case drm_vmw_shader_type_vs:
  744. shader_type = SVGA3D_SHADERTYPE_VS;
  745. break;
  746. case drm_vmw_shader_type_ps:
  747. shader_type = SVGA3D_SHADERTYPE_PS;
  748. break;
  749. default:
  750. DRM_ERROR("Illegal shader type.\n");
  751. ret = -EINVAL;
  752. goto out_bad_arg;
  753. }
  754. ret = ttm_read_lock(&dev_priv->reservation_sem, true);
  755. if (unlikely(ret != 0))
  756. goto out_bad_arg;
  757. ret = vmw_user_shader_alloc(dev_priv, buffer, size, offset,
  758. shader_type, num_input_sig,
  759. num_output_sig, tfile, shader_handle);
  760. ttm_read_unlock(&dev_priv->reservation_sem);
  761. out_bad_arg:
  762. vmw_dmabuf_unreference(&buffer);
  763. return ret;
  764. }
  765. /**
  766. * vmw_shader_id_ok - Check whether a compat shader user key and
  767. * shader type are within valid bounds.
  768. *
  769. * @user_key: User space id of the shader.
  770. * @shader_type: Shader type.
  771. *
  772. * Returns true if valid false if not.
  773. */
  774. static bool vmw_shader_id_ok(u32 user_key, SVGA3dShaderType shader_type)
  775. {
  776. return user_key <= ((1 << 20) - 1) && (unsigned) shader_type < 16;
  777. }
  778. /**
  779. * vmw_shader_key - Compute a hash key suitable for a compat shader.
  780. *
  781. * @user_key: User space id of the shader.
  782. * @shader_type: Shader type.
  783. *
  784. * Returns a hash key suitable for a command buffer managed resource
  785. * manager hash table.
  786. */
  787. static u32 vmw_shader_key(u32 user_key, SVGA3dShaderType shader_type)
  788. {
  789. return user_key | (shader_type << 20);
  790. }
  791. /**
  792. * vmw_shader_remove - Stage a compat shader for removal.
  793. *
  794. * @man: Pointer to the compat shader manager identifying the shader namespace.
  795. * @user_key: The key that is used to identify the shader. The key is
  796. * unique to the shader type.
  797. * @shader_type: Shader type.
  798. * @list: Caller's list of staged command buffer resource actions.
  799. */
  800. int vmw_shader_remove(struct vmw_cmdbuf_res_manager *man,
  801. u32 user_key, SVGA3dShaderType shader_type,
  802. struct list_head *list)
  803. {
  804. struct vmw_resource *dummy;
  805. if (!vmw_shader_id_ok(user_key, shader_type))
  806. return -EINVAL;
  807. return vmw_cmdbuf_res_remove(man, vmw_cmdbuf_res_shader,
  808. vmw_shader_key(user_key, shader_type),
  809. list, &dummy);
  810. }
  811. /**
  812. * vmw_compat_shader_add - Create a compat shader and stage it for addition
  813. * as a command buffer managed resource.
  814. *
  815. * @man: Pointer to the compat shader manager identifying the shader namespace.
  816. * @user_key: The key that is used to identify the shader. The key is
  817. * unique to the shader type.
  818. * @bytecode: Pointer to the bytecode of the shader.
  819. * @shader_type: Shader type.
  820. * @tfile: Pointer to a struct ttm_object_file that the guest-backed shader is
  821. * to be created with.
  822. * @list: Caller's list of staged command buffer resource actions.
  823. *
  824. */
  825. int vmw_compat_shader_add(struct vmw_private *dev_priv,
  826. struct vmw_cmdbuf_res_manager *man,
  827. u32 user_key, const void *bytecode,
  828. SVGA3dShaderType shader_type,
  829. size_t size,
  830. struct list_head *list)
  831. {
  832. struct vmw_dma_buffer *buf;
  833. struct ttm_bo_kmap_obj map;
  834. bool is_iomem;
  835. int ret;
  836. struct vmw_resource *res;
  837. if (!vmw_shader_id_ok(user_key, shader_type))
  838. return -EINVAL;
  839. /* Allocate and pin a DMA buffer */
  840. buf = kzalloc(sizeof(*buf), GFP_KERNEL);
  841. if (unlikely(buf == NULL))
  842. return -ENOMEM;
  843. ret = vmw_dmabuf_init(dev_priv, buf, size, &vmw_sys_ne_placement,
  844. true, vmw_dmabuf_bo_free);
  845. if (unlikely(ret != 0))
  846. goto out;
  847. ret = ttm_bo_reserve(&buf->base, false, true, false, NULL);
  848. if (unlikely(ret != 0))
  849. goto no_reserve;
  850. /* Map and copy shader bytecode. */
  851. ret = ttm_bo_kmap(&buf->base, 0, PAGE_ALIGN(size) >> PAGE_SHIFT,
  852. &map);
  853. if (unlikely(ret != 0)) {
  854. ttm_bo_unreserve(&buf->base);
  855. goto no_reserve;
  856. }
  857. memcpy(ttm_kmap_obj_virtual(&map, &is_iomem), bytecode, size);
  858. WARN_ON(is_iomem);
  859. ttm_bo_kunmap(&map);
  860. ret = ttm_bo_validate(&buf->base, &vmw_sys_placement, false, true);
  861. WARN_ON(ret != 0);
  862. ttm_bo_unreserve(&buf->base);
  863. res = vmw_shader_alloc(dev_priv, buf, size, 0, shader_type);
  864. if (unlikely(ret != 0))
  865. goto no_reserve;
  866. ret = vmw_cmdbuf_res_add(man, vmw_cmdbuf_res_shader,
  867. vmw_shader_key(user_key, shader_type),
  868. res, list);
  869. vmw_resource_unreference(&res);
  870. no_reserve:
  871. vmw_dmabuf_unreference(&buf);
  872. out:
  873. return ret;
  874. }
  875. /**
  876. * vmw_shader_lookup - Look up a compat shader
  877. *
  878. * @man: Pointer to the command buffer managed resource manager identifying
  879. * the shader namespace.
  880. * @user_key: The user space id of the shader.
  881. * @shader_type: The shader type.
  882. *
  883. * Returns a refcounted pointer to a struct vmw_resource if the shader was
  884. * found. An error pointer otherwise.
  885. */
  886. struct vmw_resource *
  887. vmw_shader_lookup(struct vmw_cmdbuf_res_manager *man,
  888. u32 user_key,
  889. SVGA3dShaderType shader_type)
  890. {
  891. if (!vmw_shader_id_ok(user_key, shader_type))
  892. return ERR_PTR(-EINVAL);
  893. return vmw_cmdbuf_res_lookup(man, vmw_cmdbuf_res_shader,
  894. vmw_shader_key(user_key, shader_type));
  895. }
  896. int vmw_shader_define_ioctl(struct drm_device *dev, void *data,
  897. struct drm_file *file_priv)
  898. {
  899. struct drm_vmw_shader_create_arg *arg =
  900. (struct drm_vmw_shader_create_arg *)data;
  901. return vmw_shader_define(dev, file_priv, arg->shader_type,
  902. arg->buffer_handle,
  903. arg->size, arg->offset,
  904. 0, 0,
  905. &arg->shader_handle);
  906. }