f71882fg.c 86 KB

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  1. /***************************************************************************
  2. * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
  3. * Copyright (C) 2007-2011 Hans de Goede <hdegoede@redhat.com> *
  4. * *
  5. * This program is free software; you can redistribute it and/or modify *
  6. * it under the terms of the GNU General Public License as published by *
  7. * the Free Software Foundation; either version 2 of the License, or *
  8. * (at your option) any later version. *
  9. * *
  10. * This program is distributed in the hope that it will be useful, *
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  13. * GNU General Public License for more details. *
  14. * *
  15. * You should have received a copy of the GNU General Public License *
  16. * along with this program; if not, write to the *
  17. * Free Software Foundation, Inc., *
  18. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  19. ***************************************************************************/
  20. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  21. #include <linux/module.h>
  22. #include <linux/init.h>
  23. #include <linux/slab.h>
  24. #include <linux/jiffies.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/hwmon.h>
  27. #include <linux/hwmon-sysfs.h>
  28. #include <linux/err.h>
  29. #include <linux/mutex.h>
  30. #include <linux/io.h>
  31. #include <linux/acpi.h>
  32. #define DRVNAME "f71882fg"
  33. #define SIO_F71858FG_LD_HWM 0x02 /* Hardware monitor logical device */
  34. #define SIO_F71882FG_LD_HWM 0x04 /* Hardware monitor logical device */
  35. #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
  36. #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
  37. #define SIO_REG_LDSEL 0x07 /* Logical device select */
  38. #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
  39. #define SIO_REG_DEVREV 0x22 /* Device revision */
  40. #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
  41. #define SIO_REG_ENABLE 0x30 /* Logical device enable */
  42. #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
  43. #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
  44. #define SIO_F71808E_ID 0x0901 /* Chipset ID */
  45. #define SIO_F71808A_ID 0x1001 /* Chipset ID */
  46. #define SIO_F71858_ID 0x0507 /* Chipset ID */
  47. #define SIO_F71862_ID 0x0601 /* Chipset ID */
  48. #define SIO_F71868_ID 0x1106 /* Chipset ID */
  49. #define SIO_F71869_ID 0x0814 /* Chipset ID */
  50. #define SIO_F71869A_ID 0x1007 /* Chipset ID */
  51. #define SIO_F71882_ID 0x0541 /* Chipset ID */
  52. #define SIO_F71889_ID 0x0723 /* Chipset ID */
  53. #define SIO_F71889E_ID 0x0909 /* Chipset ID */
  54. #define SIO_F71889A_ID 0x1005 /* Chipset ID */
  55. #define SIO_F8000_ID 0x0581 /* Chipset ID */
  56. #define SIO_F81768D_ID 0x1210 /* Chipset ID */
  57. #define SIO_F81865_ID 0x0704 /* Chipset ID */
  58. #define SIO_F81866_ID 0x1010 /* Chipset ID */
  59. #define REGION_LENGTH 8
  60. #define ADDR_REG_OFFSET 5
  61. #define DATA_REG_OFFSET 6
  62. #define F71882FG_REG_IN_STATUS 0x12 /* f7188x only */
  63. #define F71882FG_REG_IN_BEEP 0x13 /* f7188x only */
  64. #define F71882FG_REG_IN(nr) (0x20 + (nr))
  65. #define F71882FG_REG_IN1_HIGH 0x32 /* f7188x only */
  66. #define F81866_REG_IN_STATUS 0x16 /* F81866 only */
  67. #define F81866_REG_IN_BEEP 0x17 /* F81866 only */
  68. #define F81866_REG_IN1_HIGH 0x3a /* F81866 only */
  69. #define F71882FG_REG_FAN(nr) (0xA0 + (16 * (nr)))
  70. #define F71882FG_REG_FAN_TARGET(nr) (0xA2 + (16 * (nr)))
  71. #define F71882FG_REG_FAN_FULL_SPEED(nr) (0xA4 + (16 * (nr)))
  72. #define F71882FG_REG_FAN_STATUS 0x92
  73. #define F71882FG_REG_FAN_BEEP 0x93
  74. #define F71882FG_REG_TEMP(nr) (0x70 + 2 * (nr))
  75. #define F71882FG_REG_TEMP_OVT(nr) (0x80 + 2 * (nr))
  76. #define F71882FG_REG_TEMP_HIGH(nr) (0x81 + 2 * (nr))
  77. #define F71882FG_REG_TEMP_STATUS 0x62
  78. #define F71882FG_REG_TEMP_BEEP 0x63
  79. #define F71882FG_REG_TEMP_CONFIG 0x69
  80. #define F71882FG_REG_TEMP_HYST(nr) (0x6C + (nr))
  81. #define F71882FG_REG_TEMP_TYPE 0x6B
  82. #define F71882FG_REG_TEMP_DIODE_OPEN 0x6F
  83. #define F71882FG_REG_PWM(nr) (0xA3 + (16 * (nr)))
  84. #define F71882FG_REG_PWM_TYPE 0x94
  85. #define F71882FG_REG_PWM_ENABLE 0x96
  86. #define F71882FG_REG_FAN_HYST(nr) (0x98 + (nr))
  87. #define F71882FG_REG_FAN_FAULT_T 0x9F
  88. #define F71882FG_FAN_NEG_TEMP_EN 0x20
  89. #define F71882FG_FAN_PROG_SEL 0x80
  90. #define F71882FG_REG_POINT_PWM(pwm, point) (0xAA + (point) + (16 * (pwm)))
  91. #define F71882FG_REG_POINT_TEMP(pwm, point) (0xA6 + (point) + (16 * (pwm)))
  92. #define F71882FG_REG_POINT_MAPPING(nr) (0xAF + 16 * (nr))
  93. #define F71882FG_REG_START 0x01
  94. #define F71882FG_MAX_INS 11
  95. #define FAN_MIN_DETECT 366 /* Lowest detectable fanspeed */
  96. static unsigned short force_id;
  97. module_param(force_id, ushort, 0);
  98. MODULE_PARM_DESC(force_id, "Override the detected device ID");
  99. enum chips { f71808e, f71808a, f71858fg, f71862fg, f71868a, f71869, f71869a,
  100. f71882fg, f71889fg, f71889ed, f71889a, f8000, f81768d, f81865f,
  101. f81866a};
  102. static const char *const f71882fg_names[] = {
  103. "f71808e",
  104. "f71808a",
  105. "f71858fg",
  106. "f71862fg",
  107. "f71868a",
  108. "f71869", /* Both f71869f and f71869e, reg. compatible and same id */
  109. "f71869a",
  110. "f71882fg",
  111. "f71889fg", /* f81801u too, same id */
  112. "f71889ed",
  113. "f71889a",
  114. "f8000",
  115. "f81768d",
  116. "f81865f",
  117. "f81866a",
  118. };
  119. static const char f71882fg_has_in[][F71882FG_MAX_INS] = {
  120. [f71808e] = { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0 },
  121. [f71808a] = { 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 0 },
  122. [f71858fg] = { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 },
  123. [f71862fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  124. [f71868a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0 },
  125. [f71869] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  126. [f71869a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  127. [f71882fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  128. [f71889fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  129. [f71889ed] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  130. [f71889a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  131. [f8000] = { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 },
  132. [f81768d] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 },
  133. [f81865f] = { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 },
  134. [f81866a] = { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0 },
  135. };
  136. static const char f71882fg_has_in1_alarm[] = {
  137. [f71808e] = 0,
  138. [f71808a] = 0,
  139. [f71858fg] = 0,
  140. [f71862fg] = 0,
  141. [f71868a] = 0,
  142. [f71869] = 0,
  143. [f71869a] = 0,
  144. [f71882fg] = 1,
  145. [f71889fg] = 1,
  146. [f71889ed] = 1,
  147. [f71889a] = 1,
  148. [f8000] = 0,
  149. [f81768d] = 1,
  150. [f81865f] = 1,
  151. [f81866a] = 1,
  152. };
  153. static const char f71882fg_fan_has_beep[] = {
  154. [f71808e] = 0,
  155. [f71808a] = 0,
  156. [f71858fg] = 0,
  157. [f71862fg] = 1,
  158. [f71868a] = 1,
  159. [f71869] = 1,
  160. [f71869a] = 1,
  161. [f71882fg] = 1,
  162. [f71889fg] = 1,
  163. [f71889ed] = 1,
  164. [f71889a] = 1,
  165. [f8000] = 0,
  166. [f81768d] = 1,
  167. [f81865f] = 1,
  168. [f81866a] = 1,
  169. };
  170. static const char f71882fg_nr_fans[] = {
  171. [f71808e] = 3,
  172. [f71808a] = 2, /* +1 fan which is monitor + simple pwm only */
  173. [f71858fg] = 3,
  174. [f71862fg] = 3,
  175. [f71868a] = 3,
  176. [f71869] = 3,
  177. [f71869a] = 3,
  178. [f71882fg] = 4,
  179. [f71889fg] = 3,
  180. [f71889ed] = 3,
  181. [f71889a] = 3,
  182. [f8000] = 3, /* +1 fan which is monitor only */
  183. [f81768d] = 3,
  184. [f81865f] = 2,
  185. [f81866a] = 3,
  186. };
  187. static const char f71882fg_temp_has_beep[] = {
  188. [f71808e] = 0,
  189. [f71808a] = 1,
  190. [f71858fg] = 0,
  191. [f71862fg] = 1,
  192. [f71868a] = 1,
  193. [f71869] = 1,
  194. [f71869a] = 1,
  195. [f71882fg] = 1,
  196. [f71889fg] = 1,
  197. [f71889ed] = 1,
  198. [f71889a] = 1,
  199. [f8000] = 0,
  200. [f81768d] = 1,
  201. [f81865f] = 1,
  202. [f81866a] = 1,
  203. };
  204. static const char f71882fg_nr_temps[] = {
  205. [f71808e] = 2,
  206. [f71808a] = 2,
  207. [f71858fg] = 3,
  208. [f71862fg] = 3,
  209. [f71868a] = 3,
  210. [f71869] = 3,
  211. [f71869a] = 3,
  212. [f71882fg] = 3,
  213. [f71889fg] = 3,
  214. [f71889ed] = 3,
  215. [f71889a] = 3,
  216. [f8000] = 3,
  217. [f81768d] = 3,
  218. [f81865f] = 2,
  219. [f81866a] = 3,
  220. };
  221. static struct platform_device *f71882fg_pdev;
  222. /* Super-I/O Function prototypes */
  223. static inline int superio_inb(int base, int reg);
  224. static inline int superio_inw(int base, int reg);
  225. static inline int superio_enter(int base);
  226. static inline void superio_select(int base, int ld);
  227. static inline void superio_exit(int base);
  228. struct f71882fg_sio_data {
  229. enum chips type;
  230. };
  231. struct f71882fg_data {
  232. unsigned short addr;
  233. enum chips type;
  234. struct device *hwmon_dev;
  235. struct mutex update_lock;
  236. int temp_start; /* temp numbering start (0 or 1) */
  237. char valid; /* !=0 if following fields are valid */
  238. char auto_point_temp_signed;
  239. unsigned long last_updated; /* In jiffies */
  240. unsigned long last_limits; /* In jiffies */
  241. /* Register Values */
  242. u8 in[F71882FG_MAX_INS];
  243. u8 in1_max;
  244. u8 in_status;
  245. u8 in_beep;
  246. u16 fan[4];
  247. u16 fan_target[4];
  248. u16 fan_full_speed[4];
  249. u8 fan_status;
  250. u8 fan_beep;
  251. /*
  252. * Note: all models have max 3 temperature channels, but on some
  253. * they are addressed as 0-2 and on others as 1-3, so for coding
  254. * convenience we reserve space for 4 channels
  255. */
  256. u16 temp[4];
  257. u8 temp_ovt[4];
  258. u8 temp_high[4];
  259. u8 temp_hyst[2]; /* 2 hysts stored per reg */
  260. u8 temp_type[4];
  261. u8 temp_status;
  262. u8 temp_beep;
  263. u8 temp_diode_open;
  264. u8 temp_config;
  265. u8 pwm[4];
  266. u8 pwm_enable;
  267. u8 pwm_auto_point_hyst[2];
  268. u8 pwm_auto_point_mapping[4];
  269. u8 pwm_auto_point_pwm[4][5];
  270. s8 pwm_auto_point_temp[4][4];
  271. };
  272. /* Sysfs in */
  273. static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
  274. char *buf);
  275. static ssize_t show_in_max(struct device *dev, struct device_attribute
  276. *devattr, char *buf);
  277. static ssize_t store_in_max(struct device *dev, struct device_attribute
  278. *devattr, const char *buf, size_t count);
  279. static ssize_t show_in_beep(struct device *dev, struct device_attribute
  280. *devattr, char *buf);
  281. static ssize_t store_in_beep(struct device *dev, struct device_attribute
  282. *devattr, const char *buf, size_t count);
  283. static ssize_t show_in_alarm(struct device *dev, struct device_attribute
  284. *devattr, char *buf);
  285. /* Sysfs Fan */
  286. static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
  287. char *buf);
  288. static ssize_t show_fan_full_speed(struct device *dev,
  289. struct device_attribute *devattr, char *buf);
  290. static ssize_t store_fan_full_speed(struct device *dev,
  291. struct device_attribute *devattr, const char *buf, size_t count);
  292. static ssize_t show_fan_beep(struct device *dev, struct device_attribute
  293. *devattr, char *buf);
  294. static ssize_t store_fan_beep(struct device *dev, struct device_attribute
  295. *devattr, const char *buf, size_t count);
  296. static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
  297. *devattr, char *buf);
  298. /* Sysfs Temp */
  299. static ssize_t show_temp(struct device *dev, struct device_attribute
  300. *devattr, char *buf);
  301. static ssize_t show_temp_max(struct device *dev, struct device_attribute
  302. *devattr, char *buf);
  303. static ssize_t store_temp_max(struct device *dev, struct device_attribute
  304. *devattr, const char *buf, size_t count);
  305. static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
  306. *devattr, char *buf);
  307. static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
  308. *devattr, const char *buf, size_t count);
  309. static ssize_t show_temp_crit(struct device *dev, struct device_attribute
  310. *devattr, char *buf);
  311. static ssize_t store_temp_crit(struct device *dev, struct device_attribute
  312. *devattr, const char *buf, size_t count);
  313. static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
  314. *devattr, char *buf);
  315. static ssize_t show_temp_type(struct device *dev, struct device_attribute
  316. *devattr, char *buf);
  317. static ssize_t show_temp_beep(struct device *dev, struct device_attribute
  318. *devattr, char *buf);
  319. static ssize_t store_temp_beep(struct device *dev, struct device_attribute
  320. *devattr, const char *buf, size_t count);
  321. static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
  322. *devattr, char *buf);
  323. static ssize_t show_temp_fault(struct device *dev, struct device_attribute
  324. *devattr, char *buf);
  325. /* PWM and Auto point control */
  326. static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
  327. char *buf);
  328. static ssize_t store_pwm(struct device *dev, struct device_attribute *devattr,
  329. const char *buf, size_t count);
  330. static ssize_t show_simple_pwm(struct device *dev,
  331. struct device_attribute *devattr, char *buf);
  332. static ssize_t store_simple_pwm(struct device *dev,
  333. struct device_attribute *devattr, const char *buf, size_t count);
  334. static ssize_t show_pwm_enable(struct device *dev,
  335. struct device_attribute *devattr, char *buf);
  336. static ssize_t store_pwm_enable(struct device *dev,
  337. struct device_attribute *devattr, const char *buf, size_t count);
  338. static ssize_t show_pwm_interpolate(struct device *dev,
  339. struct device_attribute *devattr, char *buf);
  340. static ssize_t store_pwm_interpolate(struct device *dev,
  341. struct device_attribute *devattr, const char *buf, size_t count);
  342. static ssize_t show_pwm_auto_point_channel(struct device *dev,
  343. struct device_attribute *devattr, char *buf);
  344. static ssize_t store_pwm_auto_point_channel(struct device *dev,
  345. struct device_attribute *devattr, const char *buf, size_t count);
  346. static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
  347. struct device_attribute *devattr, char *buf);
  348. static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
  349. struct device_attribute *devattr, const char *buf, size_t count);
  350. static ssize_t show_pwm_auto_point_pwm(struct device *dev,
  351. struct device_attribute *devattr, char *buf);
  352. static ssize_t store_pwm_auto_point_pwm(struct device *dev,
  353. struct device_attribute *devattr, const char *buf, size_t count);
  354. static ssize_t show_pwm_auto_point_temp(struct device *dev,
  355. struct device_attribute *devattr, char *buf);
  356. static ssize_t store_pwm_auto_point_temp(struct device *dev,
  357. struct device_attribute *devattr, const char *buf, size_t count);
  358. /* Sysfs misc */
  359. static ssize_t show_name(struct device *dev, struct device_attribute *devattr,
  360. char *buf);
  361. static int f71882fg_probe(struct platform_device *pdev);
  362. static int f71882fg_remove(struct platform_device *pdev);
  363. static struct platform_driver f71882fg_driver = {
  364. .driver = {
  365. .name = DRVNAME,
  366. },
  367. .probe = f71882fg_probe,
  368. .remove = f71882fg_remove,
  369. };
  370. static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
  371. /*
  372. * Temp attr for the f71858fg, the f71858fg is special as it has its
  373. * temperature indexes start at 0 (the others start at 1)
  374. */
  375. static struct sensor_device_attribute_2 f71858fg_temp_attr[] = {
  376. SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
  377. SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
  378. store_temp_max, 0, 0),
  379. SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  380. store_temp_max_hyst, 0, 0),
  381. SENSOR_ATTR_2(temp1_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 0),
  382. SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  383. store_temp_crit, 0, 0),
  384. SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  385. 0, 0),
  386. SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
  387. SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
  388. SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
  389. SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
  390. store_temp_max, 0, 1),
  391. SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  392. store_temp_max_hyst, 0, 1),
  393. SENSOR_ATTR_2(temp2_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
  394. SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  395. store_temp_crit, 0, 1),
  396. SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  397. 0, 1),
  398. SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
  399. SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
  400. SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
  401. SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
  402. store_temp_max, 0, 2),
  403. SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  404. store_temp_max_hyst, 0, 2),
  405. SENSOR_ATTR_2(temp3_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
  406. SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  407. store_temp_crit, 0, 2),
  408. SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  409. 0, 2),
  410. SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
  411. SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
  412. };
  413. /* Temp attr for the standard models */
  414. static struct sensor_device_attribute_2 fxxxx_temp_attr[3][9] = { {
  415. SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 1),
  416. SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
  417. store_temp_max, 0, 1),
  418. SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  419. store_temp_max_hyst, 0, 1),
  420. /*
  421. * Should really be temp1_max_alarm, but older versions did not handle
  422. * the max and crit alarms separately and lm_sensors v2 depends on the
  423. * presence of temp#_alarm files. The same goes for temp2/3 _alarm.
  424. */
  425. SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
  426. SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  427. store_temp_crit, 0, 1),
  428. SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  429. 0, 1),
  430. SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
  431. SENSOR_ATTR_2(temp1_type, S_IRUGO, show_temp_type, NULL, 0, 1),
  432. SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
  433. }, {
  434. SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 2),
  435. SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
  436. store_temp_max, 0, 2),
  437. SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  438. store_temp_max_hyst, 0, 2),
  439. /* Should be temp2_max_alarm, see temp1_alarm note */
  440. SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
  441. SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  442. store_temp_crit, 0, 2),
  443. SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  444. 0, 2),
  445. SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
  446. SENSOR_ATTR_2(temp2_type, S_IRUGO, show_temp_type, NULL, 0, 2),
  447. SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
  448. }, {
  449. SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 3),
  450. SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
  451. store_temp_max, 0, 3),
  452. SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  453. store_temp_max_hyst, 0, 3),
  454. /* Should be temp3_max_alarm, see temp1_alarm note */
  455. SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 3),
  456. SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  457. store_temp_crit, 0, 3),
  458. SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  459. 0, 3),
  460. SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 7),
  461. SENSOR_ATTR_2(temp3_type, S_IRUGO, show_temp_type, NULL, 0, 3),
  462. SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 3),
  463. } };
  464. /* Temp attr for models which can beep on temp alarm */
  465. static struct sensor_device_attribute_2 fxxxx_temp_beep_attr[3][2] = { {
  466. SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  467. store_temp_beep, 0, 1),
  468. SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  469. store_temp_beep, 0, 5),
  470. }, {
  471. SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  472. store_temp_beep, 0, 2),
  473. SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  474. store_temp_beep, 0, 6),
  475. }, {
  476. SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  477. store_temp_beep, 0, 3),
  478. SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  479. store_temp_beep, 0, 7),
  480. } };
  481. static struct sensor_device_attribute_2 f81866_temp_beep_attr[3][2] = { {
  482. SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  483. store_temp_beep, 0, 0),
  484. SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  485. store_temp_beep, 0, 4),
  486. }, {
  487. SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  488. store_temp_beep, 0, 1),
  489. SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  490. store_temp_beep, 0, 5),
  491. }, {
  492. SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  493. store_temp_beep, 0, 2),
  494. SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  495. store_temp_beep, 0, 6),
  496. } };
  497. /*
  498. * Temp attr for the f8000
  499. * Note on the f8000 temp_ovt (crit) is used as max, and temp_high (max)
  500. * is used as hysteresis value to clear alarms
  501. * Also like the f71858fg its temperature indexes start at 0
  502. */
  503. static struct sensor_device_attribute_2 f8000_temp_attr[] = {
  504. SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
  505. SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_crit,
  506. store_temp_crit, 0, 0),
  507. SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
  508. store_temp_max, 0, 0),
  509. SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
  510. SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
  511. SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
  512. SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_crit,
  513. store_temp_crit, 0, 1),
  514. SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
  515. store_temp_max, 0, 1),
  516. SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
  517. SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
  518. SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
  519. SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_crit,
  520. store_temp_crit, 0, 2),
  521. SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
  522. store_temp_max, 0, 2),
  523. SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
  524. SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
  525. };
  526. /* in attr for all models */
  527. static struct sensor_device_attribute_2 fxxxx_in_attr[] = {
  528. SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0),
  529. SENSOR_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 0, 1),
  530. SENSOR_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 0, 2),
  531. SENSOR_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 0, 3),
  532. SENSOR_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 0, 4),
  533. SENSOR_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 0, 5),
  534. SENSOR_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 0, 6),
  535. SENSOR_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 0, 7),
  536. SENSOR_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 0, 8),
  537. SENSOR_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 0, 9),
  538. SENSOR_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 0, 10),
  539. };
  540. /* For models with in1 alarm capability */
  541. static struct sensor_device_attribute_2 fxxxx_in1_alarm_attr[] = {
  542. SENSOR_ATTR_2(in1_max, S_IRUGO|S_IWUSR, show_in_max, store_in_max,
  543. 0, 1),
  544. SENSOR_ATTR_2(in1_beep, S_IRUGO|S_IWUSR, show_in_beep, store_in_beep,
  545. 0, 1),
  546. SENSOR_ATTR_2(in1_alarm, S_IRUGO, show_in_alarm, NULL, 0, 1),
  547. };
  548. /* Fan / PWM attr common to all models */
  549. static struct sensor_device_attribute_2 fxxxx_fan_attr[4][6] = { {
  550. SENSOR_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0),
  551. SENSOR_ATTR_2(fan1_full_speed, S_IRUGO|S_IWUSR,
  552. show_fan_full_speed,
  553. store_fan_full_speed, 0, 0),
  554. SENSOR_ATTR_2(fan1_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 0),
  555. SENSOR_ATTR_2(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 0),
  556. SENSOR_ATTR_2(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  557. store_pwm_enable, 0, 0),
  558. SENSOR_ATTR_2(pwm1_interpolate, S_IRUGO|S_IWUSR,
  559. show_pwm_interpolate, store_pwm_interpolate, 0, 0),
  560. }, {
  561. SENSOR_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 0, 1),
  562. SENSOR_ATTR_2(fan2_full_speed, S_IRUGO|S_IWUSR,
  563. show_fan_full_speed,
  564. store_fan_full_speed, 0, 1),
  565. SENSOR_ATTR_2(fan2_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 1),
  566. SENSOR_ATTR_2(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 1),
  567. SENSOR_ATTR_2(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  568. store_pwm_enable, 0, 1),
  569. SENSOR_ATTR_2(pwm2_interpolate, S_IRUGO|S_IWUSR,
  570. show_pwm_interpolate, store_pwm_interpolate, 0, 1),
  571. }, {
  572. SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
  573. SENSOR_ATTR_2(fan3_full_speed, S_IRUGO|S_IWUSR,
  574. show_fan_full_speed,
  575. store_fan_full_speed, 0, 2),
  576. SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
  577. SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 2),
  578. SENSOR_ATTR_2(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  579. store_pwm_enable, 0, 2),
  580. SENSOR_ATTR_2(pwm3_interpolate, S_IRUGO|S_IWUSR,
  581. show_pwm_interpolate, store_pwm_interpolate, 0, 2),
  582. }, {
  583. SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
  584. SENSOR_ATTR_2(fan4_full_speed, S_IRUGO|S_IWUSR,
  585. show_fan_full_speed,
  586. store_fan_full_speed, 0, 3),
  587. SENSOR_ATTR_2(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 3),
  588. SENSOR_ATTR_2(pwm4, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 3),
  589. SENSOR_ATTR_2(pwm4_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  590. store_pwm_enable, 0, 3),
  591. SENSOR_ATTR_2(pwm4_interpolate, S_IRUGO|S_IWUSR,
  592. show_pwm_interpolate, store_pwm_interpolate, 0, 3),
  593. } };
  594. /* Attr for the third fan of the f71808a, which only has manual pwm */
  595. static struct sensor_device_attribute_2 f71808a_fan3_attr[] = {
  596. SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
  597. SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
  598. SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR,
  599. show_simple_pwm, store_simple_pwm, 0, 2),
  600. };
  601. /* Attr for models which can beep on Fan alarm */
  602. static struct sensor_device_attribute_2 fxxxx_fan_beep_attr[] = {
  603. SENSOR_ATTR_2(fan1_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  604. store_fan_beep, 0, 0),
  605. SENSOR_ATTR_2(fan2_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  606. store_fan_beep, 0, 1),
  607. SENSOR_ATTR_2(fan3_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  608. store_fan_beep, 0, 2),
  609. SENSOR_ATTR_2(fan4_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  610. store_fan_beep, 0, 3),
  611. };
  612. /*
  613. * PWM attr for the f71862fg, fewer pwms and fewer zones per pwm than the
  614. * standard models
  615. */
  616. static struct sensor_device_attribute_2 f71862fg_auto_pwm_attr[3][7] = { {
  617. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  618. show_pwm_auto_point_channel,
  619. store_pwm_auto_point_channel, 0, 0),
  620. SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  621. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  622. 1, 0),
  623. SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  624. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  625. 4, 0),
  626. SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
  627. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  628. 0, 0),
  629. SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
  630. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  631. 3, 0),
  632. SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  633. show_pwm_auto_point_temp_hyst,
  634. store_pwm_auto_point_temp_hyst,
  635. 0, 0),
  636. SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
  637. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  638. }, {
  639. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  640. show_pwm_auto_point_channel,
  641. store_pwm_auto_point_channel, 0, 1),
  642. SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  643. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  644. 1, 1),
  645. SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  646. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  647. 4, 1),
  648. SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
  649. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  650. 0, 1),
  651. SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
  652. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  653. 3, 1),
  654. SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  655. show_pwm_auto_point_temp_hyst,
  656. store_pwm_auto_point_temp_hyst,
  657. 0, 1),
  658. SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
  659. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  660. }, {
  661. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  662. show_pwm_auto_point_channel,
  663. store_pwm_auto_point_channel, 0, 2),
  664. SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  665. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  666. 1, 2),
  667. SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  668. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  669. 4, 2),
  670. SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
  671. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  672. 0, 2),
  673. SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
  674. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  675. 3, 2),
  676. SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  677. show_pwm_auto_point_temp_hyst,
  678. store_pwm_auto_point_temp_hyst,
  679. 0, 2),
  680. SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
  681. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  682. } };
  683. /*
  684. * PWM attr for the f71808e/f71869, almost identical to the f71862fg, but the
  685. * pwm setting when the temperature is above the pwmX_auto_point1_temp can be
  686. * programmed instead of being hardcoded to 0xff
  687. */
  688. static struct sensor_device_attribute_2 f71869_auto_pwm_attr[3][8] = { {
  689. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  690. show_pwm_auto_point_channel,
  691. store_pwm_auto_point_channel, 0, 0),
  692. SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  693. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  694. 0, 0),
  695. SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  696. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  697. 1, 0),
  698. SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
  699. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  700. 4, 0),
  701. SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
  702. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  703. 0, 0),
  704. SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
  705. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  706. 3, 0),
  707. SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  708. show_pwm_auto_point_temp_hyst,
  709. store_pwm_auto_point_temp_hyst,
  710. 0, 0),
  711. SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
  712. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  713. }, {
  714. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  715. show_pwm_auto_point_channel,
  716. store_pwm_auto_point_channel, 0, 1),
  717. SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  718. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  719. 0, 1),
  720. SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  721. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  722. 1, 1),
  723. SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
  724. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  725. 4, 1),
  726. SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
  727. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  728. 0, 1),
  729. SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
  730. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  731. 3, 1),
  732. SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  733. show_pwm_auto_point_temp_hyst,
  734. store_pwm_auto_point_temp_hyst,
  735. 0, 1),
  736. SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
  737. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  738. }, {
  739. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  740. show_pwm_auto_point_channel,
  741. store_pwm_auto_point_channel, 0, 2),
  742. SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  743. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  744. 0, 2),
  745. SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  746. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  747. 1, 2),
  748. SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
  749. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  750. 4, 2),
  751. SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
  752. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  753. 0, 2),
  754. SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
  755. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  756. 3, 2),
  757. SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  758. show_pwm_auto_point_temp_hyst,
  759. store_pwm_auto_point_temp_hyst,
  760. 0, 2),
  761. SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
  762. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  763. } };
  764. /* PWM attr for the standard models */
  765. static struct sensor_device_attribute_2 fxxxx_auto_pwm_attr[4][14] = { {
  766. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  767. show_pwm_auto_point_channel,
  768. store_pwm_auto_point_channel, 0, 0),
  769. SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  770. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  771. 0, 0),
  772. SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  773. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  774. 1, 0),
  775. SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
  776. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  777. 2, 0),
  778. SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO|S_IWUSR,
  779. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  780. 3, 0),
  781. SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IRUGO|S_IWUSR,
  782. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  783. 4, 0),
  784. SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
  785. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  786. 0, 0),
  787. SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
  788. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  789. 1, 0),
  790. SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IRUGO|S_IWUSR,
  791. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  792. 2, 0),
  793. SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IRUGO|S_IWUSR,
  794. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  795. 3, 0),
  796. SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  797. show_pwm_auto_point_temp_hyst,
  798. store_pwm_auto_point_temp_hyst,
  799. 0, 0),
  800. SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
  801. show_pwm_auto_point_temp_hyst, NULL, 1, 0),
  802. SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IRUGO,
  803. show_pwm_auto_point_temp_hyst, NULL, 2, 0),
  804. SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IRUGO,
  805. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  806. }, {
  807. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  808. show_pwm_auto_point_channel,
  809. store_pwm_auto_point_channel, 0, 1),
  810. SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  811. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  812. 0, 1),
  813. SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  814. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  815. 1, 1),
  816. SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
  817. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  818. 2, 1),
  819. SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO|S_IWUSR,
  820. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  821. 3, 1),
  822. SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IRUGO|S_IWUSR,
  823. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  824. 4, 1),
  825. SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
  826. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  827. 0, 1),
  828. SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
  829. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  830. 1, 1),
  831. SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IRUGO|S_IWUSR,
  832. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  833. 2, 1),
  834. SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IRUGO|S_IWUSR,
  835. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  836. 3, 1),
  837. SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  838. show_pwm_auto_point_temp_hyst,
  839. store_pwm_auto_point_temp_hyst,
  840. 0, 1),
  841. SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
  842. show_pwm_auto_point_temp_hyst, NULL, 1, 1),
  843. SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IRUGO,
  844. show_pwm_auto_point_temp_hyst, NULL, 2, 1),
  845. SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IRUGO,
  846. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  847. }, {
  848. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  849. show_pwm_auto_point_channel,
  850. store_pwm_auto_point_channel, 0, 2),
  851. SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  852. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  853. 0, 2),
  854. SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  855. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  856. 1, 2),
  857. SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
  858. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  859. 2, 2),
  860. SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO|S_IWUSR,
  861. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  862. 3, 2),
  863. SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IRUGO|S_IWUSR,
  864. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  865. 4, 2),
  866. SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
  867. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  868. 0, 2),
  869. SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
  870. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  871. 1, 2),
  872. SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IRUGO|S_IWUSR,
  873. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  874. 2, 2),
  875. SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IRUGO|S_IWUSR,
  876. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  877. 3, 2),
  878. SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  879. show_pwm_auto_point_temp_hyst,
  880. store_pwm_auto_point_temp_hyst,
  881. 0, 2),
  882. SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
  883. show_pwm_auto_point_temp_hyst, NULL, 1, 2),
  884. SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IRUGO,
  885. show_pwm_auto_point_temp_hyst, NULL, 2, 2),
  886. SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IRUGO,
  887. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  888. }, {
  889. SENSOR_ATTR_2(pwm4_auto_channels_temp, S_IRUGO|S_IWUSR,
  890. show_pwm_auto_point_channel,
  891. store_pwm_auto_point_channel, 0, 3),
  892. SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IRUGO|S_IWUSR,
  893. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  894. 0, 3),
  895. SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IRUGO|S_IWUSR,
  896. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  897. 1, 3),
  898. SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IRUGO|S_IWUSR,
  899. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  900. 2, 3),
  901. SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IRUGO|S_IWUSR,
  902. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  903. 3, 3),
  904. SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IRUGO|S_IWUSR,
  905. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  906. 4, 3),
  907. SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IRUGO|S_IWUSR,
  908. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  909. 0, 3),
  910. SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IRUGO|S_IWUSR,
  911. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  912. 1, 3),
  913. SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IRUGO|S_IWUSR,
  914. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  915. 2, 3),
  916. SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IRUGO|S_IWUSR,
  917. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  918. 3, 3),
  919. SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  920. show_pwm_auto_point_temp_hyst,
  921. store_pwm_auto_point_temp_hyst,
  922. 0, 3),
  923. SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IRUGO,
  924. show_pwm_auto_point_temp_hyst, NULL, 1, 3),
  925. SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IRUGO,
  926. show_pwm_auto_point_temp_hyst, NULL, 2, 3),
  927. SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IRUGO,
  928. show_pwm_auto_point_temp_hyst, NULL, 3, 3),
  929. } };
  930. /* Fan attr specific to the f8000 (4th fan input can only measure speed) */
  931. static struct sensor_device_attribute_2 f8000_fan_attr[] = {
  932. SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
  933. };
  934. /*
  935. * PWM attr for the f8000, zones mapped to temp instead of to pwm!
  936. * Also the register block at offset A0 maps to TEMP1 (so our temp2, as the
  937. * F8000 starts counting temps at 0), B0 maps the TEMP2 and C0 maps to TEMP0
  938. */
  939. static struct sensor_device_attribute_2 f8000_auto_pwm_attr[3][14] = { {
  940. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  941. show_pwm_auto_point_channel,
  942. store_pwm_auto_point_channel, 0, 0),
  943. SENSOR_ATTR_2(temp1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  944. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  945. 0, 2),
  946. SENSOR_ATTR_2(temp1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  947. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  948. 1, 2),
  949. SENSOR_ATTR_2(temp1_auto_point3_pwm, S_IRUGO|S_IWUSR,
  950. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  951. 2, 2),
  952. SENSOR_ATTR_2(temp1_auto_point4_pwm, S_IRUGO|S_IWUSR,
  953. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  954. 3, 2),
  955. SENSOR_ATTR_2(temp1_auto_point5_pwm, S_IRUGO|S_IWUSR,
  956. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  957. 4, 2),
  958. SENSOR_ATTR_2(temp1_auto_point1_temp, S_IRUGO|S_IWUSR,
  959. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  960. 0, 2),
  961. SENSOR_ATTR_2(temp1_auto_point2_temp, S_IRUGO|S_IWUSR,
  962. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  963. 1, 2),
  964. SENSOR_ATTR_2(temp1_auto_point3_temp, S_IRUGO|S_IWUSR,
  965. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  966. 2, 2),
  967. SENSOR_ATTR_2(temp1_auto_point4_temp, S_IRUGO|S_IWUSR,
  968. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  969. 3, 2),
  970. SENSOR_ATTR_2(temp1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  971. show_pwm_auto_point_temp_hyst,
  972. store_pwm_auto_point_temp_hyst,
  973. 0, 2),
  974. SENSOR_ATTR_2(temp1_auto_point2_temp_hyst, S_IRUGO,
  975. show_pwm_auto_point_temp_hyst, NULL, 1, 2),
  976. SENSOR_ATTR_2(temp1_auto_point3_temp_hyst, S_IRUGO,
  977. show_pwm_auto_point_temp_hyst, NULL, 2, 2),
  978. SENSOR_ATTR_2(temp1_auto_point4_temp_hyst, S_IRUGO,
  979. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  980. }, {
  981. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  982. show_pwm_auto_point_channel,
  983. store_pwm_auto_point_channel, 0, 1),
  984. SENSOR_ATTR_2(temp2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  985. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  986. 0, 0),
  987. SENSOR_ATTR_2(temp2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  988. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  989. 1, 0),
  990. SENSOR_ATTR_2(temp2_auto_point3_pwm, S_IRUGO|S_IWUSR,
  991. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  992. 2, 0),
  993. SENSOR_ATTR_2(temp2_auto_point4_pwm, S_IRUGO|S_IWUSR,
  994. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  995. 3, 0),
  996. SENSOR_ATTR_2(temp2_auto_point5_pwm, S_IRUGO|S_IWUSR,
  997. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  998. 4, 0),
  999. SENSOR_ATTR_2(temp2_auto_point1_temp, S_IRUGO|S_IWUSR,
  1000. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1001. 0, 0),
  1002. SENSOR_ATTR_2(temp2_auto_point2_temp, S_IRUGO|S_IWUSR,
  1003. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1004. 1, 0),
  1005. SENSOR_ATTR_2(temp2_auto_point3_temp, S_IRUGO|S_IWUSR,
  1006. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1007. 2, 0),
  1008. SENSOR_ATTR_2(temp2_auto_point4_temp, S_IRUGO|S_IWUSR,
  1009. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1010. 3, 0),
  1011. SENSOR_ATTR_2(temp2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  1012. show_pwm_auto_point_temp_hyst,
  1013. store_pwm_auto_point_temp_hyst,
  1014. 0, 0),
  1015. SENSOR_ATTR_2(temp2_auto_point2_temp_hyst, S_IRUGO,
  1016. show_pwm_auto_point_temp_hyst, NULL, 1, 0),
  1017. SENSOR_ATTR_2(temp2_auto_point3_temp_hyst, S_IRUGO,
  1018. show_pwm_auto_point_temp_hyst, NULL, 2, 0),
  1019. SENSOR_ATTR_2(temp2_auto_point4_temp_hyst, S_IRUGO,
  1020. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  1021. }, {
  1022. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  1023. show_pwm_auto_point_channel,
  1024. store_pwm_auto_point_channel, 0, 2),
  1025. SENSOR_ATTR_2(temp3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  1026. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1027. 0, 1),
  1028. SENSOR_ATTR_2(temp3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  1029. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1030. 1, 1),
  1031. SENSOR_ATTR_2(temp3_auto_point3_pwm, S_IRUGO|S_IWUSR,
  1032. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1033. 2, 1),
  1034. SENSOR_ATTR_2(temp3_auto_point4_pwm, S_IRUGO|S_IWUSR,
  1035. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1036. 3, 1),
  1037. SENSOR_ATTR_2(temp3_auto_point5_pwm, S_IRUGO|S_IWUSR,
  1038. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1039. 4, 1),
  1040. SENSOR_ATTR_2(temp3_auto_point1_temp, S_IRUGO|S_IWUSR,
  1041. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1042. 0, 1),
  1043. SENSOR_ATTR_2(temp3_auto_point2_temp, S_IRUGO|S_IWUSR,
  1044. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1045. 1, 1),
  1046. SENSOR_ATTR_2(temp3_auto_point3_temp, S_IRUGO|S_IWUSR,
  1047. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1048. 2, 1),
  1049. SENSOR_ATTR_2(temp3_auto_point4_temp, S_IRUGO|S_IWUSR,
  1050. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1051. 3, 1),
  1052. SENSOR_ATTR_2(temp3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  1053. show_pwm_auto_point_temp_hyst,
  1054. store_pwm_auto_point_temp_hyst,
  1055. 0, 1),
  1056. SENSOR_ATTR_2(temp3_auto_point2_temp_hyst, S_IRUGO,
  1057. show_pwm_auto_point_temp_hyst, NULL, 1, 1),
  1058. SENSOR_ATTR_2(temp3_auto_point3_temp_hyst, S_IRUGO,
  1059. show_pwm_auto_point_temp_hyst, NULL, 2, 1),
  1060. SENSOR_ATTR_2(temp3_auto_point4_temp_hyst, S_IRUGO,
  1061. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  1062. } };
  1063. /* Super I/O functions */
  1064. static inline int superio_inb(int base, int reg)
  1065. {
  1066. outb(reg, base);
  1067. return inb(base + 1);
  1068. }
  1069. static int superio_inw(int base, int reg)
  1070. {
  1071. int val;
  1072. val = superio_inb(base, reg) << 8;
  1073. val |= superio_inb(base, reg + 1);
  1074. return val;
  1075. }
  1076. static inline int superio_enter(int base)
  1077. {
  1078. /* Don't step on other drivers' I/O space by accident */
  1079. if (!request_muxed_region(base, 2, DRVNAME)) {
  1080. pr_err("I/O address 0x%04x already in use\n", base);
  1081. return -EBUSY;
  1082. }
  1083. /* according to the datasheet the key must be send twice! */
  1084. outb(SIO_UNLOCK_KEY, base);
  1085. outb(SIO_UNLOCK_KEY, base);
  1086. return 0;
  1087. }
  1088. static inline void superio_select(int base, int ld)
  1089. {
  1090. outb(SIO_REG_LDSEL, base);
  1091. outb(ld, base + 1);
  1092. }
  1093. static inline void superio_exit(int base)
  1094. {
  1095. outb(SIO_LOCK_KEY, base);
  1096. release_region(base, 2);
  1097. }
  1098. static inline int fan_from_reg(u16 reg)
  1099. {
  1100. return reg ? (1500000 / reg) : 0;
  1101. }
  1102. static inline u16 fan_to_reg(int fan)
  1103. {
  1104. return fan ? (1500000 / fan) : 0;
  1105. }
  1106. static u8 f71882fg_read8(struct f71882fg_data *data, u8 reg)
  1107. {
  1108. u8 val;
  1109. outb(reg, data->addr + ADDR_REG_OFFSET);
  1110. val = inb(data->addr + DATA_REG_OFFSET);
  1111. return val;
  1112. }
  1113. static u16 f71882fg_read16(struct f71882fg_data *data, u8 reg)
  1114. {
  1115. u16 val;
  1116. val = f71882fg_read8(data, reg) << 8;
  1117. val |= f71882fg_read8(data, reg + 1);
  1118. return val;
  1119. }
  1120. static void f71882fg_write8(struct f71882fg_data *data, u8 reg, u8 val)
  1121. {
  1122. outb(reg, data->addr + ADDR_REG_OFFSET);
  1123. outb(val, data->addr + DATA_REG_OFFSET);
  1124. }
  1125. static void f71882fg_write16(struct f71882fg_data *data, u8 reg, u16 val)
  1126. {
  1127. f71882fg_write8(data, reg, val >> 8);
  1128. f71882fg_write8(data, reg + 1, val & 0xff);
  1129. }
  1130. static u16 f71882fg_read_temp(struct f71882fg_data *data, int nr)
  1131. {
  1132. if (data->type == f71858fg)
  1133. return f71882fg_read16(data, F71882FG_REG_TEMP(nr));
  1134. else
  1135. return f71882fg_read8(data, F71882FG_REG_TEMP(nr));
  1136. }
  1137. static struct f71882fg_data *f71882fg_update_device(struct device *dev)
  1138. {
  1139. struct f71882fg_data *data = dev_get_drvdata(dev);
  1140. int nr_fans = f71882fg_nr_fans[data->type];
  1141. int nr_temps = f71882fg_nr_temps[data->type];
  1142. int nr, reg, point;
  1143. mutex_lock(&data->update_lock);
  1144. /* Update once every 60 seconds */
  1145. if (time_after(jiffies, data->last_limits + 60 * HZ) ||
  1146. !data->valid) {
  1147. if (f71882fg_has_in1_alarm[data->type]) {
  1148. if (data->type == f81866a) {
  1149. data->in1_max =
  1150. f71882fg_read8(data,
  1151. F81866_REG_IN1_HIGH);
  1152. data->in_beep =
  1153. f71882fg_read8(data,
  1154. F81866_REG_IN_BEEP);
  1155. } else {
  1156. data->in1_max =
  1157. f71882fg_read8(data,
  1158. F71882FG_REG_IN1_HIGH);
  1159. data->in_beep =
  1160. f71882fg_read8(data,
  1161. F71882FG_REG_IN_BEEP);
  1162. }
  1163. }
  1164. /* Get High & boundary temps*/
  1165. for (nr = data->temp_start; nr < nr_temps + data->temp_start;
  1166. nr++) {
  1167. data->temp_ovt[nr] = f71882fg_read8(data,
  1168. F71882FG_REG_TEMP_OVT(nr));
  1169. data->temp_high[nr] = f71882fg_read8(data,
  1170. F71882FG_REG_TEMP_HIGH(nr));
  1171. }
  1172. if (data->type != f8000) {
  1173. data->temp_hyst[0] = f71882fg_read8(data,
  1174. F71882FG_REG_TEMP_HYST(0));
  1175. data->temp_hyst[1] = f71882fg_read8(data,
  1176. F71882FG_REG_TEMP_HYST(1));
  1177. }
  1178. /* All but the f71858fg / f8000 have this register */
  1179. if ((data->type != f71858fg) && (data->type != f8000)) {
  1180. reg = f71882fg_read8(data, F71882FG_REG_TEMP_TYPE);
  1181. data->temp_type[1] = (reg & 0x02) ? 2 : 4;
  1182. data->temp_type[2] = (reg & 0x04) ? 2 : 4;
  1183. data->temp_type[3] = (reg & 0x08) ? 2 : 4;
  1184. }
  1185. if (f71882fg_fan_has_beep[data->type])
  1186. data->fan_beep = f71882fg_read8(data,
  1187. F71882FG_REG_FAN_BEEP);
  1188. if (f71882fg_temp_has_beep[data->type])
  1189. data->temp_beep = f71882fg_read8(data,
  1190. F71882FG_REG_TEMP_BEEP);
  1191. data->pwm_enable = f71882fg_read8(data,
  1192. F71882FG_REG_PWM_ENABLE);
  1193. data->pwm_auto_point_hyst[0] =
  1194. f71882fg_read8(data, F71882FG_REG_FAN_HYST(0));
  1195. data->pwm_auto_point_hyst[1] =
  1196. f71882fg_read8(data, F71882FG_REG_FAN_HYST(1));
  1197. for (nr = 0; nr < nr_fans; nr++) {
  1198. data->pwm_auto_point_mapping[nr] =
  1199. f71882fg_read8(data,
  1200. F71882FG_REG_POINT_MAPPING(nr));
  1201. switch (data->type) {
  1202. default:
  1203. for (point = 0; point < 5; point++) {
  1204. data->pwm_auto_point_pwm[nr][point] =
  1205. f71882fg_read8(data,
  1206. F71882FG_REG_POINT_PWM
  1207. (nr, point));
  1208. }
  1209. for (point = 0; point < 4; point++) {
  1210. data->pwm_auto_point_temp[nr][point] =
  1211. f71882fg_read8(data,
  1212. F71882FG_REG_POINT_TEMP
  1213. (nr, point));
  1214. }
  1215. break;
  1216. case f71808e:
  1217. case f71869:
  1218. data->pwm_auto_point_pwm[nr][0] =
  1219. f71882fg_read8(data,
  1220. F71882FG_REG_POINT_PWM(nr, 0));
  1221. /* Fall through */
  1222. case f71862fg:
  1223. data->pwm_auto_point_pwm[nr][1] =
  1224. f71882fg_read8(data,
  1225. F71882FG_REG_POINT_PWM
  1226. (nr, 1));
  1227. data->pwm_auto_point_pwm[nr][4] =
  1228. f71882fg_read8(data,
  1229. F71882FG_REG_POINT_PWM
  1230. (nr, 4));
  1231. data->pwm_auto_point_temp[nr][0] =
  1232. f71882fg_read8(data,
  1233. F71882FG_REG_POINT_TEMP
  1234. (nr, 0));
  1235. data->pwm_auto_point_temp[nr][3] =
  1236. f71882fg_read8(data,
  1237. F71882FG_REG_POINT_TEMP
  1238. (nr, 3));
  1239. break;
  1240. }
  1241. }
  1242. data->last_limits = jiffies;
  1243. }
  1244. /* Update every second */
  1245. if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
  1246. data->temp_status = f71882fg_read8(data,
  1247. F71882FG_REG_TEMP_STATUS);
  1248. data->temp_diode_open = f71882fg_read8(data,
  1249. F71882FG_REG_TEMP_DIODE_OPEN);
  1250. for (nr = data->temp_start; nr < nr_temps + data->temp_start;
  1251. nr++)
  1252. data->temp[nr] = f71882fg_read_temp(data, nr);
  1253. data->fan_status = f71882fg_read8(data,
  1254. F71882FG_REG_FAN_STATUS);
  1255. for (nr = 0; nr < nr_fans; nr++) {
  1256. data->fan[nr] = f71882fg_read16(data,
  1257. F71882FG_REG_FAN(nr));
  1258. data->fan_target[nr] =
  1259. f71882fg_read16(data, F71882FG_REG_FAN_TARGET(nr));
  1260. data->fan_full_speed[nr] =
  1261. f71882fg_read16(data,
  1262. F71882FG_REG_FAN_FULL_SPEED(nr));
  1263. data->pwm[nr] =
  1264. f71882fg_read8(data, F71882FG_REG_PWM(nr));
  1265. }
  1266. /* Some models have 1 more fan with limited capabilities */
  1267. if (data->type == f71808a) {
  1268. data->fan[2] = f71882fg_read16(data,
  1269. F71882FG_REG_FAN(2));
  1270. data->pwm[2] = f71882fg_read8(data,
  1271. F71882FG_REG_PWM(2));
  1272. }
  1273. if (data->type == f8000)
  1274. data->fan[3] = f71882fg_read16(data,
  1275. F71882FG_REG_FAN(3));
  1276. if (f71882fg_has_in1_alarm[data->type]) {
  1277. if (data->type == f81866a)
  1278. data->in_status = f71882fg_read8(data,
  1279. F81866_REG_IN_STATUS);
  1280. else
  1281. data->in_status = f71882fg_read8(data,
  1282. F71882FG_REG_IN_STATUS);
  1283. }
  1284. for (nr = 0; nr < F71882FG_MAX_INS; nr++)
  1285. if (f71882fg_has_in[data->type][nr])
  1286. data->in[nr] = f71882fg_read8(data,
  1287. F71882FG_REG_IN(nr));
  1288. data->last_updated = jiffies;
  1289. data->valid = 1;
  1290. }
  1291. mutex_unlock(&data->update_lock);
  1292. return data;
  1293. }
  1294. /* Sysfs Interface */
  1295. static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
  1296. char *buf)
  1297. {
  1298. struct f71882fg_data *data = f71882fg_update_device(dev);
  1299. int nr = to_sensor_dev_attr_2(devattr)->index;
  1300. int speed = fan_from_reg(data->fan[nr]);
  1301. if (speed == FAN_MIN_DETECT)
  1302. speed = 0;
  1303. return sprintf(buf, "%d\n", speed);
  1304. }
  1305. static ssize_t show_fan_full_speed(struct device *dev,
  1306. struct device_attribute *devattr, char *buf)
  1307. {
  1308. struct f71882fg_data *data = f71882fg_update_device(dev);
  1309. int nr = to_sensor_dev_attr_2(devattr)->index;
  1310. int speed = fan_from_reg(data->fan_full_speed[nr]);
  1311. return sprintf(buf, "%d\n", speed);
  1312. }
  1313. static ssize_t store_fan_full_speed(struct device *dev,
  1314. struct device_attribute *devattr,
  1315. const char *buf, size_t count)
  1316. {
  1317. struct f71882fg_data *data = dev_get_drvdata(dev);
  1318. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1319. long val;
  1320. err = kstrtol(buf, 10, &val);
  1321. if (err)
  1322. return err;
  1323. val = clamp_val(val, 23, 1500000);
  1324. val = fan_to_reg(val);
  1325. mutex_lock(&data->update_lock);
  1326. f71882fg_write16(data, F71882FG_REG_FAN_FULL_SPEED(nr), val);
  1327. data->fan_full_speed[nr] = val;
  1328. mutex_unlock(&data->update_lock);
  1329. return count;
  1330. }
  1331. static ssize_t show_fan_beep(struct device *dev, struct device_attribute
  1332. *devattr, char *buf)
  1333. {
  1334. struct f71882fg_data *data = f71882fg_update_device(dev);
  1335. int nr = to_sensor_dev_attr_2(devattr)->index;
  1336. if (data->fan_beep & (1 << nr))
  1337. return sprintf(buf, "1\n");
  1338. else
  1339. return sprintf(buf, "0\n");
  1340. }
  1341. static ssize_t store_fan_beep(struct device *dev, struct device_attribute
  1342. *devattr, const char *buf, size_t count)
  1343. {
  1344. struct f71882fg_data *data = dev_get_drvdata(dev);
  1345. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1346. unsigned long val;
  1347. err = kstrtoul(buf, 10, &val);
  1348. if (err)
  1349. return err;
  1350. mutex_lock(&data->update_lock);
  1351. data->fan_beep = f71882fg_read8(data, F71882FG_REG_FAN_BEEP);
  1352. if (val)
  1353. data->fan_beep |= 1 << nr;
  1354. else
  1355. data->fan_beep &= ~(1 << nr);
  1356. f71882fg_write8(data, F71882FG_REG_FAN_BEEP, data->fan_beep);
  1357. mutex_unlock(&data->update_lock);
  1358. return count;
  1359. }
  1360. static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
  1361. *devattr, char *buf)
  1362. {
  1363. struct f71882fg_data *data = f71882fg_update_device(dev);
  1364. int nr = to_sensor_dev_attr_2(devattr)->index;
  1365. if (data->fan_status & (1 << nr))
  1366. return sprintf(buf, "1\n");
  1367. else
  1368. return sprintf(buf, "0\n");
  1369. }
  1370. static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
  1371. char *buf)
  1372. {
  1373. struct f71882fg_data *data = f71882fg_update_device(dev);
  1374. int nr = to_sensor_dev_attr_2(devattr)->index;
  1375. return sprintf(buf, "%d\n", data->in[nr] * 8);
  1376. }
  1377. static ssize_t show_in_max(struct device *dev, struct device_attribute
  1378. *devattr, char *buf)
  1379. {
  1380. struct f71882fg_data *data = f71882fg_update_device(dev);
  1381. return sprintf(buf, "%d\n", data->in1_max * 8);
  1382. }
  1383. static ssize_t store_in_max(struct device *dev, struct device_attribute
  1384. *devattr, const char *buf, size_t count)
  1385. {
  1386. struct f71882fg_data *data = dev_get_drvdata(dev);
  1387. int err;
  1388. long val;
  1389. err = kstrtol(buf, 10, &val);
  1390. if (err)
  1391. return err;
  1392. val /= 8;
  1393. val = clamp_val(val, 0, 255);
  1394. mutex_lock(&data->update_lock);
  1395. if (data->type == f81866a)
  1396. f71882fg_write8(data, F81866_REG_IN1_HIGH, val);
  1397. else
  1398. f71882fg_write8(data, F71882FG_REG_IN1_HIGH, val);
  1399. data->in1_max = val;
  1400. mutex_unlock(&data->update_lock);
  1401. return count;
  1402. }
  1403. static ssize_t show_in_beep(struct device *dev, struct device_attribute
  1404. *devattr, char *buf)
  1405. {
  1406. struct f71882fg_data *data = f71882fg_update_device(dev);
  1407. int nr = to_sensor_dev_attr_2(devattr)->index;
  1408. if (data->in_beep & (1 << nr))
  1409. return sprintf(buf, "1\n");
  1410. else
  1411. return sprintf(buf, "0\n");
  1412. }
  1413. static ssize_t store_in_beep(struct device *dev, struct device_attribute
  1414. *devattr, const char *buf, size_t count)
  1415. {
  1416. struct f71882fg_data *data = dev_get_drvdata(dev);
  1417. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1418. unsigned long val;
  1419. err = kstrtoul(buf, 10, &val);
  1420. if (err)
  1421. return err;
  1422. mutex_lock(&data->update_lock);
  1423. if (data->type == f81866a)
  1424. data->in_beep = f71882fg_read8(data, F81866_REG_IN_BEEP);
  1425. else
  1426. data->in_beep = f71882fg_read8(data, F71882FG_REG_IN_BEEP);
  1427. if (val)
  1428. data->in_beep |= 1 << nr;
  1429. else
  1430. data->in_beep &= ~(1 << nr);
  1431. if (data->type == f81866a)
  1432. f71882fg_write8(data, F81866_REG_IN_BEEP, data->in_beep);
  1433. else
  1434. f71882fg_write8(data, F71882FG_REG_IN_BEEP, data->in_beep);
  1435. mutex_unlock(&data->update_lock);
  1436. return count;
  1437. }
  1438. static ssize_t show_in_alarm(struct device *dev, struct device_attribute
  1439. *devattr, char *buf)
  1440. {
  1441. struct f71882fg_data *data = f71882fg_update_device(dev);
  1442. int nr = to_sensor_dev_attr_2(devattr)->index;
  1443. if (data->in_status & (1 << nr))
  1444. return sprintf(buf, "1\n");
  1445. else
  1446. return sprintf(buf, "0\n");
  1447. }
  1448. static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
  1449. char *buf)
  1450. {
  1451. struct f71882fg_data *data = f71882fg_update_device(dev);
  1452. int nr = to_sensor_dev_attr_2(devattr)->index;
  1453. int sign, temp;
  1454. if (data->type == f71858fg) {
  1455. /* TEMP_TABLE_SEL 1 or 3 ? */
  1456. if (data->temp_config & 1) {
  1457. sign = data->temp[nr] & 0x0001;
  1458. temp = (data->temp[nr] >> 5) & 0x7ff;
  1459. } else {
  1460. sign = data->temp[nr] & 0x8000;
  1461. temp = (data->temp[nr] >> 5) & 0x3ff;
  1462. }
  1463. temp *= 125;
  1464. if (sign)
  1465. temp -= 128000;
  1466. } else
  1467. temp = data->temp[nr] * 1000;
  1468. return sprintf(buf, "%d\n", temp);
  1469. }
  1470. static ssize_t show_temp_max(struct device *dev, struct device_attribute
  1471. *devattr, char *buf)
  1472. {
  1473. struct f71882fg_data *data = f71882fg_update_device(dev);
  1474. int nr = to_sensor_dev_attr_2(devattr)->index;
  1475. return sprintf(buf, "%d\n", data->temp_high[nr] * 1000);
  1476. }
  1477. static ssize_t store_temp_max(struct device *dev, struct device_attribute
  1478. *devattr, const char *buf, size_t count)
  1479. {
  1480. struct f71882fg_data *data = dev_get_drvdata(dev);
  1481. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1482. long val;
  1483. err = kstrtol(buf, 10, &val);
  1484. if (err)
  1485. return err;
  1486. val /= 1000;
  1487. val = clamp_val(val, 0, 255);
  1488. mutex_lock(&data->update_lock);
  1489. f71882fg_write8(data, F71882FG_REG_TEMP_HIGH(nr), val);
  1490. data->temp_high[nr] = val;
  1491. mutex_unlock(&data->update_lock);
  1492. return count;
  1493. }
  1494. static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
  1495. *devattr, char *buf)
  1496. {
  1497. struct f71882fg_data *data = f71882fg_update_device(dev);
  1498. int nr = to_sensor_dev_attr_2(devattr)->index;
  1499. int temp_max_hyst;
  1500. mutex_lock(&data->update_lock);
  1501. if (nr & 1)
  1502. temp_max_hyst = data->temp_hyst[nr / 2] >> 4;
  1503. else
  1504. temp_max_hyst = data->temp_hyst[nr / 2] & 0x0f;
  1505. temp_max_hyst = (data->temp_high[nr] - temp_max_hyst) * 1000;
  1506. mutex_unlock(&data->update_lock);
  1507. return sprintf(buf, "%d\n", temp_max_hyst);
  1508. }
  1509. static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
  1510. *devattr, const char *buf, size_t count)
  1511. {
  1512. struct f71882fg_data *data = dev_get_drvdata(dev);
  1513. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1514. ssize_t ret = count;
  1515. u8 reg;
  1516. long val;
  1517. err = kstrtol(buf, 10, &val);
  1518. if (err)
  1519. return err;
  1520. val /= 1000;
  1521. mutex_lock(&data->update_lock);
  1522. /* convert abs to relative and check */
  1523. data->temp_high[nr] = f71882fg_read8(data, F71882FG_REG_TEMP_HIGH(nr));
  1524. val = clamp_val(val, data->temp_high[nr] - 15, data->temp_high[nr]);
  1525. val = data->temp_high[nr] - val;
  1526. /* convert value to register contents */
  1527. reg = f71882fg_read8(data, F71882FG_REG_TEMP_HYST(nr / 2));
  1528. if (nr & 1)
  1529. reg = (reg & 0x0f) | (val << 4);
  1530. else
  1531. reg = (reg & 0xf0) | val;
  1532. f71882fg_write8(data, F71882FG_REG_TEMP_HYST(nr / 2), reg);
  1533. data->temp_hyst[nr / 2] = reg;
  1534. mutex_unlock(&data->update_lock);
  1535. return ret;
  1536. }
  1537. static ssize_t show_temp_crit(struct device *dev, struct device_attribute
  1538. *devattr, char *buf)
  1539. {
  1540. struct f71882fg_data *data = f71882fg_update_device(dev);
  1541. int nr = to_sensor_dev_attr_2(devattr)->index;
  1542. return sprintf(buf, "%d\n", data->temp_ovt[nr] * 1000);
  1543. }
  1544. static ssize_t store_temp_crit(struct device *dev, struct device_attribute
  1545. *devattr, const char *buf, size_t count)
  1546. {
  1547. struct f71882fg_data *data = dev_get_drvdata(dev);
  1548. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1549. long val;
  1550. err = kstrtol(buf, 10, &val);
  1551. if (err)
  1552. return err;
  1553. val /= 1000;
  1554. val = clamp_val(val, 0, 255);
  1555. mutex_lock(&data->update_lock);
  1556. f71882fg_write8(data, F71882FG_REG_TEMP_OVT(nr), val);
  1557. data->temp_ovt[nr] = val;
  1558. mutex_unlock(&data->update_lock);
  1559. return count;
  1560. }
  1561. static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
  1562. *devattr, char *buf)
  1563. {
  1564. struct f71882fg_data *data = f71882fg_update_device(dev);
  1565. int nr = to_sensor_dev_attr_2(devattr)->index;
  1566. int temp_crit_hyst;
  1567. mutex_lock(&data->update_lock);
  1568. if (nr & 1)
  1569. temp_crit_hyst = data->temp_hyst[nr / 2] >> 4;
  1570. else
  1571. temp_crit_hyst = data->temp_hyst[nr / 2] & 0x0f;
  1572. temp_crit_hyst = (data->temp_ovt[nr] - temp_crit_hyst) * 1000;
  1573. mutex_unlock(&data->update_lock);
  1574. return sprintf(buf, "%d\n", temp_crit_hyst);
  1575. }
  1576. static ssize_t show_temp_type(struct device *dev, struct device_attribute
  1577. *devattr, char *buf)
  1578. {
  1579. struct f71882fg_data *data = f71882fg_update_device(dev);
  1580. int nr = to_sensor_dev_attr_2(devattr)->index;
  1581. return sprintf(buf, "%d\n", data->temp_type[nr]);
  1582. }
  1583. static ssize_t show_temp_beep(struct device *dev, struct device_attribute
  1584. *devattr, char *buf)
  1585. {
  1586. struct f71882fg_data *data = f71882fg_update_device(dev);
  1587. int nr = to_sensor_dev_attr_2(devattr)->index;
  1588. if (data->temp_beep & (1 << nr))
  1589. return sprintf(buf, "1\n");
  1590. else
  1591. return sprintf(buf, "0\n");
  1592. }
  1593. static ssize_t store_temp_beep(struct device *dev, struct device_attribute
  1594. *devattr, const char *buf, size_t count)
  1595. {
  1596. struct f71882fg_data *data = dev_get_drvdata(dev);
  1597. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1598. unsigned long val;
  1599. err = kstrtoul(buf, 10, &val);
  1600. if (err)
  1601. return err;
  1602. mutex_lock(&data->update_lock);
  1603. data->temp_beep = f71882fg_read8(data, F71882FG_REG_TEMP_BEEP);
  1604. if (val)
  1605. data->temp_beep |= 1 << nr;
  1606. else
  1607. data->temp_beep &= ~(1 << nr);
  1608. f71882fg_write8(data, F71882FG_REG_TEMP_BEEP, data->temp_beep);
  1609. mutex_unlock(&data->update_lock);
  1610. return count;
  1611. }
  1612. static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
  1613. *devattr, char *buf)
  1614. {
  1615. struct f71882fg_data *data = f71882fg_update_device(dev);
  1616. int nr = to_sensor_dev_attr_2(devattr)->index;
  1617. if (data->temp_status & (1 << nr))
  1618. return sprintf(buf, "1\n");
  1619. else
  1620. return sprintf(buf, "0\n");
  1621. }
  1622. static ssize_t show_temp_fault(struct device *dev, struct device_attribute
  1623. *devattr, char *buf)
  1624. {
  1625. struct f71882fg_data *data = f71882fg_update_device(dev);
  1626. int nr = to_sensor_dev_attr_2(devattr)->index;
  1627. if (data->temp_diode_open & (1 << nr))
  1628. return sprintf(buf, "1\n");
  1629. else
  1630. return sprintf(buf, "0\n");
  1631. }
  1632. static ssize_t show_pwm(struct device *dev,
  1633. struct device_attribute *devattr, char *buf)
  1634. {
  1635. struct f71882fg_data *data = f71882fg_update_device(dev);
  1636. int val, nr = to_sensor_dev_attr_2(devattr)->index;
  1637. mutex_lock(&data->update_lock);
  1638. if (data->pwm_enable & (1 << (2 * nr)))
  1639. /* PWM mode */
  1640. val = data->pwm[nr];
  1641. else {
  1642. /* RPM mode */
  1643. val = 255 * fan_from_reg(data->fan_target[nr])
  1644. / fan_from_reg(data->fan_full_speed[nr]);
  1645. }
  1646. mutex_unlock(&data->update_lock);
  1647. return sprintf(buf, "%d\n", val);
  1648. }
  1649. static ssize_t store_pwm(struct device *dev,
  1650. struct device_attribute *devattr, const char *buf,
  1651. size_t count)
  1652. {
  1653. struct f71882fg_data *data = dev_get_drvdata(dev);
  1654. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1655. long val;
  1656. err = kstrtol(buf, 10, &val);
  1657. if (err)
  1658. return err;
  1659. val = clamp_val(val, 0, 255);
  1660. mutex_lock(&data->update_lock);
  1661. data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  1662. if ((data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 3) != 2) ||
  1663. (data->type != f8000 && !((data->pwm_enable >> 2 * nr) & 2))) {
  1664. count = -EROFS;
  1665. goto leave;
  1666. }
  1667. if (data->pwm_enable & (1 << (2 * nr))) {
  1668. /* PWM mode */
  1669. f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
  1670. data->pwm[nr] = val;
  1671. } else {
  1672. /* RPM mode */
  1673. int target, full_speed;
  1674. full_speed = f71882fg_read16(data,
  1675. F71882FG_REG_FAN_FULL_SPEED(nr));
  1676. target = fan_to_reg(val * fan_from_reg(full_speed) / 255);
  1677. f71882fg_write16(data, F71882FG_REG_FAN_TARGET(nr), target);
  1678. data->fan_target[nr] = target;
  1679. data->fan_full_speed[nr] = full_speed;
  1680. }
  1681. leave:
  1682. mutex_unlock(&data->update_lock);
  1683. return count;
  1684. }
  1685. static ssize_t show_simple_pwm(struct device *dev,
  1686. struct device_attribute *devattr, char *buf)
  1687. {
  1688. struct f71882fg_data *data = f71882fg_update_device(dev);
  1689. int val, nr = to_sensor_dev_attr_2(devattr)->index;
  1690. val = data->pwm[nr];
  1691. return sprintf(buf, "%d\n", val);
  1692. }
  1693. static ssize_t store_simple_pwm(struct device *dev,
  1694. struct device_attribute *devattr,
  1695. const char *buf, size_t count)
  1696. {
  1697. struct f71882fg_data *data = dev_get_drvdata(dev);
  1698. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1699. long val;
  1700. err = kstrtol(buf, 10, &val);
  1701. if (err)
  1702. return err;
  1703. val = clamp_val(val, 0, 255);
  1704. mutex_lock(&data->update_lock);
  1705. f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
  1706. data->pwm[nr] = val;
  1707. mutex_unlock(&data->update_lock);
  1708. return count;
  1709. }
  1710. static ssize_t show_pwm_enable(struct device *dev,
  1711. struct device_attribute *devattr, char *buf)
  1712. {
  1713. int result = 0;
  1714. struct f71882fg_data *data = f71882fg_update_device(dev);
  1715. int nr = to_sensor_dev_attr_2(devattr)->index;
  1716. switch ((data->pwm_enable >> 2 * nr) & 3) {
  1717. case 0:
  1718. case 1:
  1719. result = 2; /* Normal auto mode */
  1720. break;
  1721. case 2:
  1722. result = 1; /* Manual mode */
  1723. break;
  1724. case 3:
  1725. if (data->type == f8000)
  1726. result = 3; /* Thermostat mode */
  1727. else
  1728. result = 1; /* Manual mode */
  1729. break;
  1730. }
  1731. return sprintf(buf, "%d\n", result);
  1732. }
  1733. static ssize_t store_pwm_enable(struct device *dev, struct device_attribute
  1734. *devattr, const char *buf, size_t count)
  1735. {
  1736. struct f71882fg_data *data = dev_get_drvdata(dev);
  1737. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1738. long val;
  1739. err = kstrtol(buf, 10, &val);
  1740. if (err)
  1741. return err;
  1742. /* Special case for F8000 pwm channel 3 which only does auto mode */
  1743. if (data->type == f8000 && nr == 2 && val != 2)
  1744. return -EINVAL;
  1745. mutex_lock(&data->update_lock);
  1746. data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  1747. /* Special case for F8000 auto PWM mode / Thermostat mode */
  1748. if (data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 1)) {
  1749. switch (val) {
  1750. case 2:
  1751. data->pwm_enable &= ~(2 << (2 * nr));
  1752. break; /* Normal auto mode */
  1753. case 3:
  1754. data->pwm_enable |= 2 << (2 * nr);
  1755. break; /* Thermostat mode */
  1756. default:
  1757. count = -EINVAL;
  1758. goto leave;
  1759. }
  1760. } else {
  1761. switch (val) {
  1762. case 1:
  1763. /* The f71858fg does not support manual RPM mode */
  1764. if (data->type == f71858fg &&
  1765. ((data->pwm_enable >> (2 * nr)) & 1)) {
  1766. count = -EINVAL;
  1767. goto leave;
  1768. }
  1769. data->pwm_enable |= 2 << (2 * nr);
  1770. break; /* Manual */
  1771. case 2:
  1772. data->pwm_enable &= ~(2 << (2 * nr));
  1773. break; /* Normal auto mode */
  1774. default:
  1775. count = -EINVAL;
  1776. goto leave;
  1777. }
  1778. }
  1779. f71882fg_write8(data, F71882FG_REG_PWM_ENABLE, data->pwm_enable);
  1780. leave:
  1781. mutex_unlock(&data->update_lock);
  1782. return count;
  1783. }
  1784. static ssize_t show_pwm_auto_point_pwm(struct device *dev,
  1785. struct device_attribute *devattr,
  1786. char *buf)
  1787. {
  1788. int result;
  1789. struct f71882fg_data *data = f71882fg_update_device(dev);
  1790. int pwm = to_sensor_dev_attr_2(devattr)->index;
  1791. int point = to_sensor_dev_attr_2(devattr)->nr;
  1792. mutex_lock(&data->update_lock);
  1793. if (data->pwm_enable & (1 << (2 * pwm))) {
  1794. /* PWM mode */
  1795. result = data->pwm_auto_point_pwm[pwm][point];
  1796. } else {
  1797. /* RPM mode */
  1798. result = 32 * 255 / (32 + data->pwm_auto_point_pwm[pwm][point]);
  1799. }
  1800. mutex_unlock(&data->update_lock);
  1801. return sprintf(buf, "%d\n", result);
  1802. }
  1803. static ssize_t store_pwm_auto_point_pwm(struct device *dev,
  1804. struct device_attribute *devattr,
  1805. const char *buf, size_t count)
  1806. {
  1807. struct f71882fg_data *data = dev_get_drvdata(dev);
  1808. int err, pwm = to_sensor_dev_attr_2(devattr)->index;
  1809. int point = to_sensor_dev_attr_2(devattr)->nr;
  1810. long val;
  1811. err = kstrtol(buf, 10, &val);
  1812. if (err)
  1813. return err;
  1814. val = clamp_val(val, 0, 255);
  1815. mutex_lock(&data->update_lock);
  1816. data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  1817. if (data->pwm_enable & (1 << (2 * pwm))) {
  1818. /* PWM mode */
  1819. } else {
  1820. /* RPM mode */
  1821. if (val < 29) /* Prevent negative numbers */
  1822. val = 255;
  1823. else
  1824. val = (255 - val) * 32 / val;
  1825. }
  1826. f71882fg_write8(data, F71882FG_REG_POINT_PWM(pwm, point), val);
  1827. data->pwm_auto_point_pwm[pwm][point] = val;
  1828. mutex_unlock(&data->update_lock);
  1829. return count;
  1830. }
  1831. static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
  1832. struct device_attribute *devattr,
  1833. char *buf)
  1834. {
  1835. int result = 0;
  1836. struct f71882fg_data *data = f71882fg_update_device(dev);
  1837. int nr = to_sensor_dev_attr_2(devattr)->index;
  1838. int point = to_sensor_dev_attr_2(devattr)->nr;
  1839. mutex_lock(&data->update_lock);
  1840. if (nr & 1)
  1841. result = data->pwm_auto_point_hyst[nr / 2] >> 4;
  1842. else
  1843. result = data->pwm_auto_point_hyst[nr / 2] & 0x0f;
  1844. result = 1000 * (data->pwm_auto_point_temp[nr][point] - result);
  1845. mutex_unlock(&data->update_lock);
  1846. return sprintf(buf, "%d\n", result);
  1847. }
  1848. static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
  1849. struct device_attribute *devattr,
  1850. const char *buf, size_t count)
  1851. {
  1852. struct f71882fg_data *data = dev_get_drvdata(dev);
  1853. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1854. int point = to_sensor_dev_attr_2(devattr)->nr;
  1855. u8 reg;
  1856. long val;
  1857. err = kstrtol(buf, 10, &val);
  1858. if (err)
  1859. return err;
  1860. val /= 1000;
  1861. mutex_lock(&data->update_lock);
  1862. data->pwm_auto_point_temp[nr][point] =
  1863. f71882fg_read8(data, F71882FG_REG_POINT_TEMP(nr, point));
  1864. val = clamp_val(val, data->pwm_auto_point_temp[nr][point] - 15,
  1865. data->pwm_auto_point_temp[nr][point]);
  1866. val = data->pwm_auto_point_temp[nr][point] - val;
  1867. reg = f71882fg_read8(data, F71882FG_REG_FAN_HYST(nr / 2));
  1868. if (nr & 1)
  1869. reg = (reg & 0x0f) | (val << 4);
  1870. else
  1871. reg = (reg & 0xf0) | val;
  1872. f71882fg_write8(data, F71882FG_REG_FAN_HYST(nr / 2), reg);
  1873. data->pwm_auto_point_hyst[nr / 2] = reg;
  1874. mutex_unlock(&data->update_lock);
  1875. return count;
  1876. }
  1877. static ssize_t show_pwm_interpolate(struct device *dev,
  1878. struct device_attribute *devattr, char *buf)
  1879. {
  1880. int result;
  1881. struct f71882fg_data *data = f71882fg_update_device(dev);
  1882. int nr = to_sensor_dev_attr_2(devattr)->index;
  1883. result = (data->pwm_auto_point_mapping[nr] >> 4) & 1;
  1884. return sprintf(buf, "%d\n", result);
  1885. }
  1886. static ssize_t store_pwm_interpolate(struct device *dev,
  1887. struct device_attribute *devattr,
  1888. const char *buf, size_t count)
  1889. {
  1890. struct f71882fg_data *data = dev_get_drvdata(dev);
  1891. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1892. unsigned long val;
  1893. err = kstrtoul(buf, 10, &val);
  1894. if (err)
  1895. return err;
  1896. mutex_lock(&data->update_lock);
  1897. data->pwm_auto_point_mapping[nr] =
  1898. f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
  1899. if (val)
  1900. val = data->pwm_auto_point_mapping[nr] | (1 << 4);
  1901. else
  1902. val = data->pwm_auto_point_mapping[nr] & (~(1 << 4));
  1903. f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
  1904. data->pwm_auto_point_mapping[nr] = val;
  1905. mutex_unlock(&data->update_lock);
  1906. return count;
  1907. }
  1908. static ssize_t show_pwm_auto_point_channel(struct device *dev,
  1909. struct device_attribute *devattr,
  1910. char *buf)
  1911. {
  1912. int result;
  1913. struct f71882fg_data *data = f71882fg_update_device(dev);
  1914. int nr = to_sensor_dev_attr_2(devattr)->index;
  1915. result = 1 << ((data->pwm_auto_point_mapping[nr] & 3) -
  1916. data->temp_start);
  1917. return sprintf(buf, "%d\n", result);
  1918. }
  1919. static ssize_t store_pwm_auto_point_channel(struct device *dev,
  1920. struct device_attribute *devattr,
  1921. const char *buf, size_t count)
  1922. {
  1923. struct f71882fg_data *data = dev_get_drvdata(dev);
  1924. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1925. long val;
  1926. err = kstrtol(buf, 10, &val);
  1927. if (err)
  1928. return err;
  1929. switch (val) {
  1930. case 1:
  1931. val = 0;
  1932. break;
  1933. case 2:
  1934. val = 1;
  1935. break;
  1936. case 4:
  1937. val = 2;
  1938. break;
  1939. default:
  1940. return -EINVAL;
  1941. }
  1942. val += data->temp_start;
  1943. mutex_lock(&data->update_lock);
  1944. data->pwm_auto_point_mapping[nr] =
  1945. f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
  1946. val = (data->pwm_auto_point_mapping[nr] & 0xfc) | val;
  1947. f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
  1948. data->pwm_auto_point_mapping[nr] = val;
  1949. mutex_unlock(&data->update_lock);
  1950. return count;
  1951. }
  1952. static ssize_t show_pwm_auto_point_temp(struct device *dev,
  1953. struct device_attribute *devattr,
  1954. char *buf)
  1955. {
  1956. int result;
  1957. struct f71882fg_data *data = f71882fg_update_device(dev);
  1958. int pwm = to_sensor_dev_attr_2(devattr)->index;
  1959. int point = to_sensor_dev_attr_2(devattr)->nr;
  1960. result = data->pwm_auto_point_temp[pwm][point];
  1961. return sprintf(buf, "%d\n", 1000 * result);
  1962. }
  1963. static ssize_t store_pwm_auto_point_temp(struct device *dev,
  1964. struct device_attribute *devattr,
  1965. const char *buf, size_t count)
  1966. {
  1967. struct f71882fg_data *data = dev_get_drvdata(dev);
  1968. int err, pwm = to_sensor_dev_attr_2(devattr)->index;
  1969. int point = to_sensor_dev_attr_2(devattr)->nr;
  1970. long val;
  1971. err = kstrtol(buf, 10, &val);
  1972. if (err)
  1973. return err;
  1974. val /= 1000;
  1975. if (data->auto_point_temp_signed)
  1976. val = clamp_val(val, -128, 127);
  1977. else
  1978. val = clamp_val(val, 0, 127);
  1979. mutex_lock(&data->update_lock);
  1980. f71882fg_write8(data, F71882FG_REG_POINT_TEMP(pwm, point), val);
  1981. data->pwm_auto_point_temp[pwm][point] = val;
  1982. mutex_unlock(&data->update_lock);
  1983. return count;
  1984. }
  1985. static ssize_t show_name(struct device *dev, struct device_attribute *devattr,
  1986. char *buf)
  1987. {
  1988. struct f71882fg_data *data = dev_get_drvdata(dev);
  1989. return sprintf(buf, "%s\n", f71882fg_names[data->type]);
  1990. }
  1991. static int f71882fg_create_sysfs_files(struct platform_device *pdev,
  1992. struct sensor_device_attribute_2 *attr, int count)
  1993. {
  1994. int err, i;
  1995. for (i = 0; i < count; i++) {
  1996. err = device_create_file(&pdev->dev, &attr[i].dev_attr);
  1997. if (err)
  1998. return err;
  1999. }
  2000. return 0;
  2001. }
  2002. static void f71882fg_remove_sysfs_files(struct platform_device *pdev,
  2003. struct sensor_device_attribute_2 *attr, int count)
  2004. {
  2005. int i;
  2006. for (i = 0; i < count; i++)
  2007. device_remove_file(&pdev->dev, &attr[i].dev_attr);
  2008. }
  2009. static int f71882fg_create_fan_sysfs_files(
  2010. struct platform_device *pdev, int idx)
  2011. {
  2012. struct f71882fg_data *data = platform_get_drvdata(pdev);
  2013. int err;
  2014. /* Sanity check the pwm setting */
  2015. err = 0;
  2016. switch (data->type) {
  2017. case f71858fg:
  2018. if (((data->pwm_enable >> (idx * 2)) & 3) == 3)
  2019. err = 1;
  2020. break;
  2021. case f71862fg:
  2022. if (((data->pwm_enable >> (idx * 2)) & 1) != 1)
  2023. err = 1;
  2024. break;
  2025. case f8000:
  2026. if (idx == 2)
  2027. err = data->pwm_enable & 0x20;
  2028. break;
  2029. default:
  2030. break;
  2031. }
  2032. if (err) {
  2033. dev_err(&pdev->dev,
  2034. "Invalid (reserved) pwm settings: 0x%02x, "
  2035. "skipping fan %d\n",
  2036. (data->pwm_enable >> (idx * 2)) & 3, idx + 1);
  2037. return 0; /* This is a non fatal condition */
  2038. }
  2039. err = f71882fg_create_sysfs_files(pdev, &fxxxx_fan_attr[idx][0],
  2040. ARRAY_SIZE(fxxxx_fan_attr[0]));
  2041. if (err)
  2042. return err;
  2043. if (f71882fg_fan_has_beep[data->type]) {
  2044. err = f71882fg_create_sysfs_files(pdev,
  2045. &fxxxx_fan_beep_attr[idx],
  2046. 1);
  2047. if (err)
  2048. return err;
  2049. }
  2050. dev_info(&pdev->dev, "Fan: %d is in %s mode\n", idx + 1,
  2051. (data->pwm_enable & (1 << (2 * idx))) ? "duty-cycle" : "RPM");
  2052. /* Check for unsupported auto pwm settings */
  2053. switch (data->type) {
  2054. case f71808e:
  2055. case f71808a:
  2056. case f71869:
  2057. case f71869a:
  2058. case f71889fg:
  2059. case f71889ed:
  2060. case f71889a:
  2061. data->pwm_auto_point_mapping[idx] =
  2062. f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(idx));
  2063. if ((data->pwm_auto_point_mapping[idx] & 0x80) ||
  2064. (data->pwm_auto_point_mapping[idx] & 3) == 0) {
  2065. dev_warn(&pdev->dev,
  2066. "Auto pwm controlled by raw digital "
  2067. "data, disabling pwm auto_point "
  2068. "sysfs attributes for fan %d\n", idx + 1);
  2069. return 0; /* This is a non fatal condition */
  2070. }
  2071. break;
  2072. default:
  2073. break;
  2074. }
  2075. switch (data->type) {
  2076. case f71862fg:
  2077. err = f71882fg_create_sysfs_files(pdev,
  2078. &f71862fg_auto_pwm_attr[idx][0],
  2079. ARRAY_SIZE(f71862fg_auto_pwm_attr[0]));
  2080. break;
  2081. case f71808e:
  2082. case f71869:
  2083. err = f71882fg_create_sysfs_files(pdev,
  2084. &f71869_auto_pwm_attr[idx][0],
  2085. ARRAY_SIZE(f71869_auto_pwm_attr[0]));
  2086. break;
  2087. case f8000:
  2088. err = f71882fg_create_sysfs_files(pdev,
  2089. &f8000_auto_pwm_attr[idx][0],
  2090. ARRAY_SIZE(f8000_auto_pwm_attr[0]));
  2091. break;
  2092. default:
  2093. err = f71882fg_create_sysfs_files(pdev,
  2094. &fxxxx_auto_pwm_attr[idx][0],
  2095. ARRAY_SIZE(fxxxx_auto_pwm_attr[0]));
  2096. }
  2097. return err;
  2098. }
  2099. static int f71882fg_probe(struct platform_device *pdev)
  2100. {
  2101. struct f71882fg_data *data;
  2102. struct f71882fg_sio_data *sio_data = dev_get_platdata(&pdev->dev);
  2103. int nr_fans = f71882fg_nr_fans[sio_data->type];
  2104. int nr_temps = f71882fg_nr_temps[sio_data->type];
  2105. int err, i;
  2106. int size;
  2107. u8 start_reg, reg;
  2108. data = devm_kzalloc(&pdev->dev, sizeof(struct f71882fg_data),
  2109. GFP_KERNEL);
  2110. if (!data)
  2111. return -ENOMEM;
  2112. data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start;
  2113. data->type = sio_data->type;
  2114. data->temp_start =
  2115. (data->type == f71858fg || data->type == f8000 ||
  2116. data->type == f81866a) ? 0 : 1;
  2117. mutex_init(&data->update_lock);
  2118. platform_set_drvdata(pdev, data);
  2119. start_reg = f71882fg_read8(data, F71882FG_REG_START);
  2120. if (start_reg & 0x04) {
  2121. dev_warn(&pdev->dev, "Hardware monitor is powered down\n");
  2122. return -ENODEV;
  2123. }
  2124. if (!(start_reg & 0x03)) {
  2125. dev_warn(&pdev->dev, "Hardware monitoring not activated\n");
  2126. return -ENODEV;
  2127. }
  2128. /* Register sysfs interface files */
  2129. err = device_create_file(&pdev->dev, &dev_attr_name);
  2130. if (err)
  2131. goto exit_unregister_sysfs;
  2132. if (start_reg & 0x01) {
  2133. switch (data->type) {
  2134. case f71858fg:
  2135. data->temp_config =
  2136. f71882fg_read8(data, F71882FG_REG_TEMP_CONFIG);
  2137. if (data->temp_config & 0x10)
  2138. /*
  2139. * The f71858fg temperature alarms behave as
  2140. * the f8000 alarms in this mode
  2141. */
  2142. err = f71882fg_create_sysfs_files(pdev,
  2143. f8000_temp_attr,
  2144. ARRAY_SIZE(f8000_temp_attr));
  2145. else
  2146. err = f71882fg_create_sysfs_files(pdev,
  2147. f71858fg_temp_attr,
  2148. ARRAY_SIZE(f71858fg_temp_attr));
  2149. break;
  2150. case f8000:
  2151. err = f71882fg_create_sysfs_files(pdev,
  2152. f8000_temp_attr,
  2153. ARRAY_SIZE(f8000_temp_attr));
  2154. break;
  2155. case f81866a:
  2156. err = f71882fg_create_sysfs_files(pdev,
  2157. f71858fg_temp_attr,
  2158. ARRAY_SIZE(f71858fg_temp_attr));
  2159. break;
  2160. default:
  2161. err = f71882fg_create_sysfs_files(pdev,
  2162. &fxxxx_temp_attr[0][0],
  2163. ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
  2164. }
  2165. if (err)
  2166. goto exit_unregister_sysfs;
  2167. if (f71882fg_temp_has_beep[data->type]) {
  2168. if (data->type == f81866a) {
  2169. size = ARRAY_SIZE(f81866_temp_beep_attr[0]);
  2170. err = f71882fg_create_sysfs_files(pdev,
  2171. &f81866_temp_beep_attr[0][0],
  2172. size * nr_temps);
  2173. } else {
  2174. size = ARRAY_SIZE(fxxxx_temp_beep_attr[0]);
  2175. err = f71882fg_create_sysfs_files(pdev,
  2176. &fxxxx_temp_beep_attr[0][0],
  2177. size * nr_temps);
  2178. }
  2179. if (err)
  2180. goto exit_unregister_sysfs;
  2181. }
  2182. for (i = 0; i < F71882FG_MAX_INS; i++) {
  2183. if (f71882fg_has_in[data->type][i]) {
  2184. err = device_create_file(&pdev->dev,
  2185. &fxxxx_in_attr[i].dev_attr);
  2186. if (err)
  2187. goto exit_unregister_sysfs;
  2188. }
  2189. }
  2190. if (f71882fg_has_in1_alarm[data->type]) {
  2191. err = f71882fg_create_sysfs_files(pdev,
  2192. fxxxx_in1_alarm_attr,
  2193. ARRAY_SIZE(fxxxx_in1_alarm_attr));
  2194. if (err)
  2195. goto exit_unregister_sysfs;
  2196. }
  2197. }
  2198. if (start_reg & 0x02) {
  2199. switch (data->type) {
  2200. case f71808e:
  2201. case f71808a:
  2202. case f71869:
  2203. case f71869a:
  2204. /* These always have signed auto point temps */
  2205. data->auto_point_temp_signed = 1;
  2206. /* Fall through to select correct fan/pwm reg bank! */
  2207. case f71889fg:
  2208. case f71889ed:
  2209. case f71889a:
  2210. reg = f71882fg_read8(data, F71882FG_REG_FAN_FAULT_T);
  2211. if (reg & F71882FG_FAN_NEG_TEMP_EN)
  2212. data->auto_point_temp_signed = 1;
  2213. /* Ensure banked pwm registers point to right bank */
  2214. reg &= ~F71882FG_FAN_PROG_SEL;
  2215. f71882fg_write8(data, F71882FG_REG_FAN_FAULT_T, reg);
  2216. break;
  2217. default:
  2218. break;
  2219. }
  2220. data->pwm_enable =
  2221. f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  2222. for (i = 0; i < nr_fans; i++) {
  2223. err = f71882fg_create_fan_sysfs_files(pdev, i);
  2224. if (err)
  2225. goto exit_unregister_sysfs;
  2226. }
  2227. /* Some types have 1 extra fan with limited functionality */
  2228. switch (data->type) {
  2229. case f71808a:
  2230. err = f71882fg_create_sysfs_files(pdev,
  2231. f71808a_fan3_attr,
  2232. ARRAY_SIZE(f71808a_fan3_attr));
  2233. break;
  2234. case f8000:
  2235. err = f71882fg_create_sysfs_files(pdev,
  2236. f8000_fan_attr,
  2237. ARRAY_SIZE(f8000_fan_attr));
  2238. break;
  2239. default:
  2240. break;
  2241. }
  2242. if (err)
  2243. goto exit_unregister_sysfs;
  2244. }
  2245. data->hwmon_dev = hwmon_device_register(&pdev->dev);
  2246. if (IS_ERR(data->hwmon_dev)) {
  2247. err = PTR_ERR(data->hwmon_dev);
  2248. data->hwmon_dev = NULL;
  2249. goto exit_unregister_sysfs;
  2250. }
  2251. return 0;
  2252. exit_unregister_sysfs:
  2253. f71882fg_remove(pdev); /* Will unregister the sysfs files for us */
  2254. return err; /* f71882fg_remove() also frees our data */
  2255. }
  2256. static int f71882fg_remove(struct platform_device *pdev)
  2257. {
  2258. struct f71882fg_data *data = platform_get_drvdata(pdev);
  2259. int nr_fans = f71882fg_nr_fans[data->type];
  2260. int nr_temps = f71882fg_nr_temps[data->type];
  2261. int i;
  2262. u8 start_reg = f71882fg_read8(data, F71882FG_REG_START);
  2263. if (data->hwmon_dev)
  2264. hwmon_device_unregister(data->hwmon_dev);
  2265. device_remove_file(&pdev->dev, &dev_attr_name);
  2266. if (start_reg & 0x01) {
  2267. switch (data->type) {
  2268. case f71858fg:
  2269. if (data->temp_config & 0x10)
  2270. f71882fg_remove_sysfs_files(pdev,
  2271. f8000_temp_attr,
  2272. ARRAY_SIZE(f8000_temp_attr));
  2273. else
  2274. f71882fg_remove_sysfs_files(pdev,
  2275. f71858fg_temp_attr,
  2276. ARRAY_SIZE(f71858fg_temp_attr));
  2277. break;
  2278. case f8000:
  2279. f71882fg_remove_sysfs_files(pdev,
  2280. f8000_temp_attr,
  2281. ARRAY_SIZE(f8000_temp_attr));
  2282. break;
  2283. case f81866a:
  2284. f71882fg_remove_sysfs_files(pdev,
  2285. f71858fg_temp_attr,
  2286. ARRAY_SIZE(f71858fg_temp_attr));
  2287. break;
  2288. default:
  2289. f71882fg_remove_sysfs_files(pdev,
  2290. &fxxxx_temp_attr[0][0],
  2291. ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
  2292. }
  2293. if (f71882fg_temp_has_beep[data->type]) {
  2294. if (data->type == f81866a)
  2295. f71882fg_remove_sysfs_files(pdev,
  2296. &f81866_temp_beep_attr[0][0],
  2297. ARRAY_SIZE(f81866_temp_beep_attr[0])
  2298. * nr_temps);
  2299. else
  2300. f71882fg_remove_sysfs_files(pdev,
  2301. &fxxxx_temp_beep_attr[0][0],
  2302. ARRAY_SIZE(fxxxx_temp_beep_attr[0])
  2303. * nr_temps);
  2304. }
  2305. for (i = 0; i < F71882FG_MAX_INS; i++) {
  2306. if (f71882fg_has_in[data->type][i]) {
  2307. device_remove_file(&pdev->dev,
  2308. &fxxxx_in_attr[i].dev_attr);
  2309. }
  2310. }
  2311. if (f71882fg_has_in1_alarm[data->type]) {
  2312. f71882fg_remove_sysfs_files(pdev,
  2313. fxxxx_in1_alarm_attr,
  2314. ARRAY_SIZE(fxxxx_in1_alarm_attr));
  2315. }
  2316. }
  2317. if (start_reg & 0x02) {
  2318. f71882fg_remove_sysfs_files(pdev, &fxxxx_fan_attr[0][0],
  2319. ARRAY_SIZE(fxxxx_fan_attr[0]) * nr_fans);
  2320. if (f71882fg_fan_has_beep[data->type]) {
  2321. f71882fg_remove_sysfs_files(pdev,
  2322. fxxxx_fan_beep_attr, nr_fans);
  2323. }
  2324. switch (data->type) {
  2325. case f71808a:
  2326. f71882fg_remove_sysfs_files(pdev,
  2327. &fxxxx_auto_pwm_attr[0][0],
  2328. ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
  2329. f71882fg_remove_sysfs_files(pdev,
  2330. f71808a_fan3_attr,
  2331. ARRAY_SIZE(f71808a_fan3_attr));
  2332. break;
  2333. case f71862fg:
  2334. f71882fg_remove_sysfs_files(pdev,
  2335. &f71862fg_auto_pwm_attr[0][0],
  2336. ARRAY_SIZE(f71862fg_auto_pwm_attr[0]) *
  2337. nr_fans);
  2338. break;
  2339. case f71808e:
  2340. case f71869:
  2341. f71882fg_remove_sysfs_files(pdev,
  2342. &f71869_auto_pwm_attr[0][0],
  2343. ARRAY_SIZE(f71869_auto_pwm_attr[0]) * nr_fans);
  2344. break;
  2345. case f8000:
  2346. f71882fg_remove_sysfs_files(pdev,
  2347. f8000_fan_attr,
  2348. ARRAY_SIZE(f8000_fan_attr));
  2349. f71882fg_remove_sysfs_files(pdev,
  2350. &f8000_auto_pwm_attr[0][0],
  2351. ARRAY_SIZE(f8000_auto_pwm_attr[0]) * nr_fans);
  2352. break;
  2353. default:
  2354. f71882fg_remove_sysfs_files(pdev,
  2355. &fxxxx_auto_pwm_attr[0][0],
  2356. ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
  2357. }
  2358. }
  2359. return 0;
  2360. }
  2361. static int __init f71882fg_find(int sioaddr, struct f71882fg_sio_data *sio_data)
  2362. {
  2363. u16 devid;
  2364. unsigned short address;
  2365. int err = superio_enter(sioaddr);
  2366. if (err)
  2367. return err;
  2368. devid = superio_inw(sioaddr, SIO_REG_MANID);
  2369. if (devid != SIO_FINTEK_ID) {
  2370. pr_debug("Not a Fintek device\n");
  2371. err = -ENODEV;
  2372. goto exit;
  2373. }
  2374. devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
  2375. switch (devid) {
  2376. case SIO_F71808E_ID:
  2377. sio_data->type = f71808e;
  2378. break;
  2379. case SIO_F71808A_ID:
  2380. sio_data->type = f71808a;
  2381. break;
  2382. case SIO_F71858_ID:
  2383. sio_data->type = f71858fg;
  2384. break;
  2385. case SIO_F71862_ID:
  2386. sio_data->type = f71862fg;
  2387. break;
  2388. case SIO_F71868_ID:
  2389. sio_data->type = f71868a;
  2390. break;
  2391. case SIO_F71869_ID:
  2392. sio_data->type = f71869;
  2393. break;
  2394. case SIO_F71869A_ID:
  2395. sio_data->type = f71869a;
  2396. break;
  2397. case SIO_F71882_ID:
  2398. sio_data->type = f71882fg;
  2399. break;
  2400. case SIO_F71889_ID:
  2401. sio_data->type = f71889fg;
  2402. break;
  2403. case SIO_F71889E_ID:
  2404. sio_data->type = f71889ed;
  2405. break;
  2406. case SIO_F71889A_ID:
  2407. sio_data->type = f71889a;
  2408. break;
  2409. case SIO_F8000_ID:
  2410. sio_data->type = f8000;
  2411. break;
  2412. case SIO_F81768D_ID:
  2413. sio_data->type = f81768d;
  2414. break;
  2415. case SIO_F81865_ID:
  2416. sio_data->type = f81865f;
  2417. break;
  2418. case SIO_F81866_ID:
  2419. sio_data->type = f81866a;
  2420. break;
  2421. default:
  2422. pr_info("Unsupported Fintek device: %04x\n",
  2423. (unsigned int)devid);
  2424. err = -ENODEV;
  2425. goto exit;
  2426. }
  2427. if (sio_data->type == f71858fg)
  2428. superio_select(sioaddr, SIO_F71858FG_LD_HWM);
  2429. else
  2430. superio_select(sioaddr, SIO_F71882FG_LD_HWM);
  2431. if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
  2432. pr_warn("Device not activated\n");
  2433. err = -ENODEV;
  2434. goto exit;
  2435. }
  2436. address = superio_inw(sioaddr, SIO_REG_ADDR);
  2437. if (address == 0) {
  2438. pr_warn("Base address not set\n");
  2439. err = -ENODEV;
  2440. goto exit;
  2441. }
  2442. address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
  2443. err = address;
  2444. pr_info("Found %s chip at %#x, revision %d\n",
  2445. f71882fg_names[sio_data->type], (unsigned int)address,
  2446. (int)superio_inb(sioaddr, SIO_REG_DEVREV));
  2447. exit:
  2448. superio_exit(sioaddr);
  2449. return err;
  2450. }
  2451. static int __init f71882fg_device_add(int address,
  2452. const struct f71882fg_sio_data *sio_data)
  2453. {
  2454. struct resource res = {
  2455. .start = address,
  2456. .end = address + REGION_LENGTH - 1,
  2457. .flags = IORESOURCE_IO,
  2458. };
  2459. int err;
  2460. f71882fg_pdev = platform_device_alloc(DRVNAME, address);
  2461. if (!f71882fg_pdev)
  2462. return -ENOMEM;
  2463. res.name = f71882fg_pdev->name;
  2464. err = acpi_check_resource_conflict(&res);
  2465. if (err)
  2466. goto exit_device_put;
  2467. err = platform_device_add_resources(f71882fg_pdev, &res, 1);
  2468. if (err) {
  2469. pr_err("Device resource addition failed\n");
  2470. goto exit_device_put;
  2471. }
  2472. err = platform_device_add_data(f71882fg_pdev, sio_data,
  2473. sizeof(struct f71882fg_sio_data));
  2474. if (err) {
  2475. pr_err("Platform data allocation failed\n");
  2476. goto exit_device_put;
  2477. }
  2478. err = platform_device_add(f71882fg_pdev);
  2479. if (err) {
  2480. pr_err("Device addition failed\n");
  2481. goto exit_device_put;
  2482. }
  2483. return 0;
  2484. exit_device_put:
  2485. platform_device_put(f71882fg_pdev);
  2486. return err;
  2487. }
  2488. static int __init f71882fg_init(void)
  2489. {
  2490. int err;
  2491. int address;
  2492. struct f71882fg_sio_data sio_data;
  2493. memset(&sio_data, 0, sizeof(sio_data));
  2494. address = f71882fg_find(0x2e, &sio_data);
  2495. if (address < 0)
  2496. address = f71882fg_find(0x4e, &sio_data);
  2497. if (address < 0)
  2498. return address;
  2499. err = platform_driver_register(&f71882fg_driver);
  2500. if (err)
  2501. return err;
  2502. err = f71882fg_device_add(address, &sio_data);
  2503. if (err)
  2504. goto exit_driver;
  2505. return 0;
  2506. exit_driver:
  2507. platform_driver_unregister(&f71882fg_driver);
  2508. return err;
  2509. }
  2510. static void __exit f71882fg_exit(void)
  2511. {
  2512. platform_device_unregister(f71882fg_pdev);
  2513. platform_driver_unregister(&f71882fg_driver);
  2514. }
  2515. MODULE_DESCRIPTION("F71882FG Hardware Monitoring Driver");
  2516. MODULE_AUTHOR("Hans Edgington, Hans de Goede <hdegoede@redhat.com>");
  2517. MODULE_LICENSE("GPL");
  2518. module_init(f71882fg_init);
  2519. module_exit(f71882fg_exit);