i2c-algo-pca.c 15 KB

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  1. /*
  2. * i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters
  3. * Copyright (C) 2004 Arcom Control Systems
  4. * Copyright (C) 2008 Pengutronix
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/module.h>
  18. #include <linux/moduleparam.h>
  19. #include <linux/delay.h>
  20. #include <linux/jiffies.h>
  21. #include <linux/errno.h>
  22. #include <linux/i2c.h>
  23. #include <linux/i2c-algo-pca.h>
  24. #define DEB1(fmt, args...) do { if (i2c_debug >= 1) \
  25. printk(KERN_DEBUG fmt, ## args); } while (0)
  26. #define DEB2(fmt, args...) do { if (i2c_debug >= 2) \
  27. printk(KERN_DEBUG fmt, ## args); } while (0)
  28. #define DEB3(fmt, args...) do { if (i2c_debug >= 3) \
  29. printk(KERN_DEBUG fmt, ## args); } while (0)
  30. static int i2c_debug;
  31. #define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val)
  32. #define pca_inw(adap, reg) adap->read_byte(adap->data, reg)
  33. #define pca_status(adap) pca_inw(adap, I2C_PCA_STA)
  34. #define pca_clock(adap) adap->i2c_clock
  35. #define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val)
  36. #define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON)
  37. #define pca_wait(adap) adap->wait_for_completion(adap->data)
  38. static void pca_reset(struct i2c_algo_pca_data *adap)
  39. {
  40. if (adap->chip == I2C_PCA_CHIP_9665) {
  41. /* Ignore the reset function from the module,
  42. * we can use the parallel bus reset.
  43. */
  44. pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET);
  45. pca_outw(adap, I2C_PCA_IND, 0xA5);
  46. pca_outw(adap, I2C_PCA_IND, 0x5A);
  47. } else {
  48. adap->reset_chip(adap->data);
  49. }
  50. }
  51. /*
  52. * Generate a start condition on the i2c bus.
  53. *
  54. * returns after the start condition has occurred
  55. */
  56. static int pca_start(struct i2c_algo_pca_data *adap)
  57. {
  58. int sta = pca_get_con(adap);
  59. DEB2("=== START\n");
  60. sta |= I2C_PCA_CON_STA;
  61. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
  62. pca_set_con(adap, sta);
  63. return pca_wait(adap);
  64. }
  65. /*
  66. * Generate a repeated start condition on the i2c bus
  67. *
  68. * return after the repeated start condition has occurred
  69. */
  70. static int pca_repeated_start(struct i2c_algo_pca_data *adap)
  71. {
  72. int sta = pca_get_con(adap);
  73. DEB2("=== REPEATED START\n");
  74. sta |= I2C_PCA_CON_STA;
  75. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
  76. pca_set_con(adap, sta);
  77. return pca_wait(adap);
  78. }
  79. /*
  80. * Generate a stop condition on the i2c bus
  81. *
  82. * returns after the stop condition has been generated
  83. *
  84. * STOPs do not generate an interrupt or set the SI flag, since the
  85. * part returns the idle state (0xf8). Hence we don't need to
  86. * pca_wait here.
  87. */
  88. static void pca_stop(struct i2c_algo_pca_data *adap)
  89. {
  90. int sta = pca_get_con(adap);
  91. DEB2("=== STOP\n");
  92. sta |= I2C_PCA_CON_STO;
  93. sta &= ~(I2C_PCA_CON_STA|I2C_PCA_CON_SI);
  94. pca_set_con(adap, sta);
  95. }
  96. /*
  97. * Send the slave address and R/W bit
  98. *
  99. * returns after the address has been sent
  100. */
  101. static int pca_address(struct i2c_algo_pca_data *adap,
  102. struct i2c_msg *msg)
  103. {
  104. int sta = pca_get_con(adap);
  105. int addr;
  106. addr = ((0x7f & msg->addr) << 1);
  107. if (msg->flags & I2C_M_RD)
  108. addr |= 1;
  109. DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n",
  110. msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr);
  111. pca_outw(adap, I2C_PCA_DAT, addr);
  112. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
  113. pca_set_con(adap, sta);
  114. return pca_wait(adap);
  115. }
  116. /*
  117. * Transmit a byte.
  118. *
  119. * Returns after the byte has been transmitted
  120. */
  121. static int pca_tx_byte(struct i2c_algo_pca_data *adap,
  122. __u8 b)
  123. {
  124. int sta = pca_get_con(adap);
  125. DEB2("=== WRITE %#04x\n", b);
  126. pca_outw(adap, I2C_PCA_DAT, b);
  127. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
  128. pca_set_con(adap, sta);
  129. return pca_wait(adap);
  130. }
  131. /*
  132. * Receive a byte
  133. *
  134. * returns immediately.
  135. */
  136. static void pca_rx_byte(struct i2c_algo_pca_data *adap,
  137. __u8 *b, int ack)
  138. {
  139. *b = pca_inw(adap, I2C_PCA_DAT);
  140. DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK");
  141. }
  142. /*
  143. * Setup ACK or NACK for next received byte and wait for it to arrive.
  144. *
  145. * Returns after next byte has arrived.
  146. */
  147. static int pca_rx_ack(struct i2c_algo_pca_data *adap,
  148. int ack)
  149. {
  150. int sta = pca_get_con(adap);
  151. sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI|I2C_PCA_CON_AA);
  152. if (ack)
  153. sta |= I2C_PCA_CON_AA;
  154. pca_set_con(adap, sta);
  155. return pca_wait(adap);
  156. }
  157. static int pca_xfer(struct i2c_adapter *i2c_adap,
  158. struct i2c_msg *msgs,
  159. int num)
  160. {
  161. struct i2c_algo_pca_data *adap = i2c_adap->algo_data;
  162. struct i2c_msg *msg = NULL;
  163. int curmsg;
  164. int numbytes = 0;
  165. int state;
  166. int ret;
  167. int completed = 1;
  168. unsigned long timeout = jiffies + i2c_adap->timeout;
  169. while ((state = pca_status(adap)) != 0xf8) {
  170. if (time_before(jiffies, timeout)) {
  171. msleep(10);
  172. } else {
  173. dev_dbg(&i2c_adap->dev, "bus is not idle. status is "
  174. "%#04x\n", state);
  175. return -EBUSY;
  176. }
  177. }
  178. DEB1("{{{ XFER %d messages\n", num);
  179. if (i2c_debug >= 2) {
  180. for (curmsg = 0; curmsg < num; curmsg++) {
  181. int addr, i;
  182. msg = &msgs[curmsg];
  183. addr = (0x7f & msg->addr) ;
  184. if (msg->flags & I2C_M_RD)
  185. printk(KERN_INFO " [%02d] RD %d bytes from %#02x [%#02x, ...]\n",
  186. curmsg, msg->len, addr, (addr << 1) | 1);
  187. else {
  188. printk(KERN_INFO " [%02d] WR %d bytes to %#02x [%#02x%s",
  189. curmsg, msg->len, addr, addr << 1,
  190. msg->len == 0 ? "" : ", ");
  191. for (i = 0; i < msg->len; i++)
  192. printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", ");
  193. printk("]\n");
  194. }
  195. }
  196. }
  197. curmsg = 0;
  198. ret = -EIO;
  199. while (curmsg < num) {
  200. state = pca_status(adap);
  201. DEB3("STATE is 0x%02x\n", state);
  202. msg = &msgs[curmsg];
  203. switch (state) {
  204. case 0xf8: /* On reset or stop the bus is idle */
  205. completed = pca_start(adap);
  206. break;
  207. case 0x08: /* A START condition has been transmitted */
  208. case 0x10: /* A repeated start condition has been transmitted */
  209. completed = pca_address(adap, msg);
  210. break;
  211. case 0x18: /* SLA+W has been transmitted; ACK has been received */
  212. case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */
  213. if (numbytes < msg->len) {
  214. completed = pca_tx_byte(adap,
  215. msg->buf[numbytes]);
  216. numbytes++;
  217. break;
  218. }
  219. curmsg++; numbytes = 0;
  220. if (curmsg == num)
  221. pca_stop(adap);
  222. else
  223. completed = pca_repeated_start(adap);
  224. break;
  225. case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */
  226. DEB2("NOT ACK received after SLA+W\n");
  227. pca_stop(adap);
  228. ret = -ENXIO;
  229. goto out;
  230. case 0x40: /* SLA+R has been transmitted; ACK has been received */
  231. completed = pca_rx_ack(adap, msg->len > 1);
  232. break;
  233. case 0x50: /* Data bytes has been received; ACK has been returned */
  234. if (numbytes < msg->len) {
  235. pca_rx_byte(adap, &msg->buf[numbytes], 1);
  236. numbytes++;
  237. completed = pca_rx_ack(adap,
  238. numbytes < msg->len - 1);
  239. break;
  240. }
  241. curmsg++; numbytes = 0;
  242. if (curmsg == num)
  243. pca_stop(adap);
  244. else
  245. completed = pca_repeated_start(adap);
  246. break;
  247. case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */
  248. DEB2("NOT ACK received after SLA+R\n");
  249. pca_stop(adap);
  250. ret = -ENXIO;
  251. goto out;
  252. case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */
  253. DEB2("NOT ACK received after data byte\n");
  254. pca_stop(adap);
  255. goto out;
  256. case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */
  257. DEB2("Arbitration lost\n");
  258. /*
  259. * The PCA9564 data sheet (2006-09-01) says "A
  260. * START condition will be transmitted when the
  261. * bus becomes free (STOP or SCL and SDA high)"
  262. * when the STA bit is set (p. 11).
  263. *
  264. * In case this won't work, try pca_reset()
  265. * instead.
  266. */
  267. pca_start(adap);
  268. goto out;
  269. case 0x58: /* Data byte has been received; NOT ACK has been returned */
  270. if (numbytes == msg->len - 1) {
  271. pca_rx_byte(adap, &msg->buf[numbytes], 0);
  272. curmsg++; numbytes = 0;
  273. if (curmsg == num)
  274. pca_stop(adap);
  275. else
  276. completed = pca_repeated_start(adap);
  277. } else {
  278. DEB2("NOT ACK sent after data byte received. "
  279. "Not final byte. numbytes %d. len %d\n",
  280. numbytes, msg->len);
  281. pca_stop(adap);
  282. goto out;
  283. }
  284. break;
  285. case 0x70: /* Bus error - SDA stuck low */
  286. DEB2("BUS ERROR - SDA Stuck low\n");
  287. pca_reset(adap);
  288. goto out;
  289. case 0x90: /* Bus error - SCL stuck low */
  290. DEB2("BUS ERROR - SCL Stuck low\n");
  291. pca_reset(adap);
  292. goto out;
  293. case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */
  294. DEB2("BUS ERROR - Illegal START or STOP\n");
  295. pca_reset(adap);
  296. goto out;
  297. default:
  298. dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state);
  299. break;
  300. }
  301. if (!completed)
  302. goto out;
  303. }
  304. ret = curmsg;
  305. out:
  306. DEB1("}}} transferred %d/%d messages. "
  307. "status is %#04x. control is %#04x\n",
  308. curmsg, num, pca_status(adap),
  309. pca_get_con(adap));
  310. return ret;
  311. }
  312. static u32 pca_func(struct i2c_adapter *adap)
  313. {
  314. return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
  315. }
  316. static const struct i2c_algorithm pca_algo = {
  317. .master_xfer = pca_xfer,
  318. .functionality = pca_func,
  319. };
  320. static unsigned int pca_probe_chip(struct i2c_adapter *adap)
  321. {
  322. struct i2c_algo_pca_data *pca_data = adap->algo_data;
  323. /* The trick here is to check if there is an indirect register
  324. * available. If there is one, we will read the value we first
  325. * wrote on I2C_PCA_IADR. Otherwise, we will read the last value
  326. * we wrote on I2C_PCA_ADR
  327. */
  328. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
  329. pca_outw(pca_data, I2C_PCA_IND, 0xAA);
  330. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO);
  331. pca_outw(pca_data, I2C_PCA_IND, 0x00);
  332. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
  333. if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) {
  334. printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name);
  335. pca_data->chip = I2C_PCA_CHIP_9665;
  336. } else {
  337. printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name);
  338. pca_data->chip = I2C_PCA_CHIP_9564;
  339. }
  340. return pca_data->chip;
  341. }
  342. static int pca_init(struct i2c_adapter *adap)
  343. {
  344. struct i2c_algo_pca_data *pca_data = adap->algo_data;
  345. adap->algo = &pca_algo;
  346. if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) {
  347. static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36};
  348. int clock;
  349. if (pca_data->i2c_clock > 7) {
  350. switch (pca_data->i2c_clock) {
  351. case 330000:
  352. pca_data->i2c_clock = I2C_PCA_CON_330kHz;
  353. break;
  354. case 288000:
  355. pca_data->i2c_clock = I2C_PCA_CON_288kHz;
  356. break;
  357. case 217000:
  358. pca_data->i2c_clock = I2C_PCA_CON_217kHz;
  359. break;
  360. case 146000:
  361. pca_data->i2c_clock = I2C_PCA_CON_146kHz;
  362. break;
  363. case 88000:
  364. pca_data->i2c_clock = I2C_PCA_CON_88kHz;
  365. break;
  366. case 59000:
  367. pca_data->i2c_clock = I2C_PCA_CON_59kHz;
  368. break;
  369. case 44000:
  370. pca_data->i2c_clock = I2C_PCA_CON_44kHz;
  371. break;
  372. case 36000:
  373. pca_data->i2c_clock = I2C_PCA_CON_36kHz;
  374. break;
  375. default:
  376. printk(KERN_WARNING
  377. "%s: Invalid I2C clock speed selected."
  378. " Using default 59kHz.\n", adap->name);
  379. pca_data->i2c_clock = I2C_PCA_CON_59kHz;
  380. }
  381. } else {
  382. printk(KERN_WARNING "%s: "
  383. "Choosing the clock frequency based on "
  384. "index is deprecated."
  385. " Use the nominal frequency.\n", adap->name);
  386. }
  387. pca_reset(pca_data);
  388. clock = pca_clock(pca_data);
  389. printk(KERN_INFO "%s: Clock frequency is %dkHz\n",
  390. adap->name, freqs[clock]);
  391. pca_set_con(pca_data, I2C_PCA_CON_ENSIO | clock);
  392. } else {
  393. int clock;
  394. int mode;
  395. int tlow, thi;
  396. /* Values can be found on PCA9665 datasheet section 7.3.2.6 */
  397. int min_tlow, min_thi;
  398. /* These values are the maximum raise and fall values allowed
  399. * by the I2C operation mode (Standard, Fast or Fast+)
  400. * They are used (added) below to calculate the clock dividers
  401. * of PCA9665. Note that they are slightly different of the
  402. * real maximum, to allow the change on mode exactly on the
  403. * maximum clock rate for each mode
  404. */
  405. int raise_fall_time;
  406. if (pca_data->i2c_clock > 1265800) {
  407. printk(KERN_WARNING "%s: I2C clock speed too high."
  408. " Using 1265.8kHz.\n", adap->name);
  409. pca_data->i2c_clock = 1265800;
  410. }
  411. if (pca_data->i2c_clock < 60300) {
  412. printk(KERN_WARNING "%s: I2C clock speed too low."
  413. " Using 60.3kHz.\n", adap->name);
  414. pca_data->i2c_clock = 60300;
  415. }
  416. /* To avoid integer overflow, use clock/100 for calculations */
  417. clock = pca_clock(pca_data) / 100;
  418. if (pca_data->i2c_clock > 1000000) {
  419. mode = I2C_PCA_MODE_TURBO;
  420. min_tlow = 14;
  421. min_thi = 5;
  422. raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
  423. } else if (pca_data->i2c_clock > 400000) {
  424. mode = I2C_PCA_MODE_FASTP;
  425. min_tlow = 17;
  426. min_thi = 9;
  427. raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
  428. } else if (pca_data->i2c_clock > 100000) {
  429. mode = I2C_PCA_MODE_FAST;
  430. min_tlow = 44;
  431. min_thi = 20;
  432. raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */
  433. } else {
  434. mode = I2C_PCA_MODE_STD;
  435. min_tlow = 157;
  436. min_thi = 134;
  437. raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */
  438. }
  439. /* The minimum clock that respects the thi/tlow = 134/157 is
  440. * 64800 Hz. Below that, we have to fix the tlow to 255 and
  441. * calculate the thi factor.
  442. */
  443. if (clock < 648) {
  444. tlow = 255;
  445. thi = 1000000 - clock * raise_fall_time;
  446. thi /= (I2C_PCA_OSC_PER * clock) - tlow;
  447. } else {
  448. tlow = (1000000 - clock * raise_fall_time) * min_tlow;
  449. tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow);
  450. thi = tlow * min_thi / min_tlow;
  451. }
  452. pca_reset(pca_data);
  453. printk(KERN_INFO
  454. "%s: Clock frequency is %dHz\n", adap->name, clock * 100);
  455. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IMODE);
  456. pca_outw(pca_data, I2C_PCA_IND, mode);
  457. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLL);
  458. pca_outw(pca_data, I2C_PCA_IND, tlow);
  459. pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLH);
  460. pca_outw(pca_data, I2C_PCA_IND, thi);
  461. pca_set_con(pca_data, I2C_PCA_CON_ENSIO);
  462. }
  463. udelay(500); /* 500 us for oscillator to stabilise */
  464. return 0;
  465. }
  466. /*
  467. * registering functions to load algorithms at runtime
  468. */
  469. int i2c_pca_add_bus(struct i2c_adapter *adap)
  470. {
  471. int rval;
  472. rval = pca_init(adap);
  473. if (rval)
  474. return rval;
  475. return i2c_add_adapter(adap);
  476. }
  477. EXPORT_SYMBOL(i2c_pca_add_bus);
  478. int i2c_pca_add_numbered_bus(struct i2c_adapter *adap)
  479. {
  480. int rval;
  481. rval = pca_init(adap);
  482. if (rval)
  483. return rval;
  484. return i2c_add_numbered_adapter(adap);
  485. }
  486. EXPORT_SYMBOL(i2c_pca_add_numbered_bus);
  487. MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, "
  488. "Wolfram Sang <w.sang@pengutronix.de>");
  489. MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm");
  490. MODULE_LICENSE("GPL");
  491. module_param(i2c_debug, int, 0);