i2c-sis630.c 14 KB

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  1. /*
  2. Copyright (c) 2002,2003 Alexander Malysh <amalysh@web.de>
  3. This program is free software; you can redistribute it and/or modify
  4. it under the terms of the GNU General Public License as published by
  5. the Free Software Foundation; either version 2 of the License, or
  6. (at your option) any later version.
  7. This program is distributed in the hope that it will be useful,
  8. but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. GNU General Public License for more details.
  11. */
  12. /*
  13. Status: beta
  14. Supports:
  15. SIS 630
  16. SIS 730
  17. SIS 964
  18. Notable differences between chips:
  19. +------------------------+--------------------+-------------------+
  20. | | SIS630/730 | SIS964 |
  21. +------------------------+--------------------+-------------------+
  22. | Clock | 14kHz/56kHz | 55.56kHz/27.78kHz |
  23. | SMBus registers offset | 0x80 | 0xE0 |
  24. | SMB_CNT | Bit 1 = Slave Busy | Bit 1 = Bus probe |
  25. | (not used yet) | Bit 3 is reserved | Bit 3 = Last byte |
  26. | SMB_PCOUNT | Offset + 0x06 | Offset + 0x14 |
  27. | SMB_COUNT | 4:0 bits | 5:0 bits |
  28. +------------------------+--------------------+-------------------+
  29. (Other differences don't affect the functions provided by the driver)
  30. Note: we assume there can only be one device, with one SMBus interface.
  31. */
  32. #include <linux/kernel.h>
  33. #include <linux/module.h>
  34. #include <linux/delay.h>
  35. #include <linux/pci.h>
  36. #include <linux/ioport.h>
  37. #include <linux/i2c.h>
  38. #include <linux/acpi.h>
  39. #include <linux/io.h>
  40. /* SIS964 id is defined here as we are the only file using it */
  41. #define PCI_DEVICE_ID_SI_964 0x0964
  42. /* SIS630/730/964 SMBus registers */
  43. #define SMB_STS 0x00 /* status */
  44. #define SMB_CNT 0x02 /* control */
  45. #define SMBHOST_CNT 0x03 /* host control */
  46. #define SMB_ADDR 0x04 /* address */
  47. #define SMB_CMD 0x05 /* command */
  48. #define SMB_COUNT 0x07 /* byte count */
  49. #define SMB_BYTE 0x08 /* ~0x8F data byte field */
  50. /* SMB_STS register */
  51. #define BYTE_DONE_STS 0x10 /* Byte Done Status / Block Array */
  52. #define SMBCOL_STS 0x04 /* Collision */
  53. #define SMBERR_STS 0x02 /* Device error */
  54. /* SMB_CNT register */
  55. #define MSTO_EN 0x40 /* Host Master Timeout Enable */
  56. #define SMBCLK_SEL 0x20 /* Host master clock selection */
  57. #define SMB_PROBE 0x02 /* Bus Probe/Slave busy */
  58. #define SMB_HOSTBUSY 0x01 /* Host Busy */
  59. /* SMBHOST_CNT register */
  60. #define SMB_KILL 0x20 /* Kill */
  61. #define SMB_START 0x10 /* Start */
  62. /* register count for request_region
  63. * As we don't use SMB_PCOUNT, 20 is ok for SiS630 and SiS964
  64. */
  65. #define SIS630_SMB_IOREGION 20
  66. /* PCI address constants */
  67. /* acpi base address register */
  68. #define SIS630_ACPI_BASE_REG 0x74
  69. /* bios control register */
  70. #define SIS630_BIOS_CTL_REG 0x40
  71. /* Other settings */
  72. #define MAX_TIMEOUT 500
  73. /* SIS630 constants */
  74. #define SIS630_QUICK 0x00
  75. #define SIS630_BYTE 0x01
  76. #define SIS630_BYTE_DATA 0x02
  77. #define SIS630_WORD_DATA 0x03
  78. #define SIS630_PCALL 0x04
  79. #define SIS630_BLOCK_DATA 0x05
  80. static struct pci_driver sis630_driver;
  81. /* insmod parameters */
  82. static bool high_clock;
  83. static bool force;
  84. module_param(high_clock, bool, 0);
  85. MODULE_PARM_DESC(high_clock,
  86. "Set Host Master Clock to 56KHz (default 14KHz) (SIS630/730 only).");
  87. module_param(force, bool, 0);
  88. MODULE_PARM_DESC(force, "Forcibly enable the SIS630. DANGEROUS!");
  89. /* SMBus base adress */
  90. static unsigned short smbus_base;
  91. /* supported chips */
  92. static int supported[] = {
  93. PCI_DEVICE_ID_SI_630,
  94. PCI_DEVICE_ID_SI_730,
  95. PCI_DEVICE_ID_SI_760,
  96. 0 /* terminates the list */
  97. };
  98. static inline u8 sis630_read(u8 reg)
  99. {
  100. return inb(smbus_base + reg);
  101. }
  102. static inline void sis630_write(u8 reg, u8 data)
  103. {
  104. outb(data, smbus_base + reg);
  105. }
  106. static int sis630_transaction_start(struct i2c_adapter *adap, int size,
  107. u8 *oldclock)
  108. {
  109. int temp;
  110. /* Make sure the SMBus host is ready to start transmitting. */
  111. temp = sis630_read(SMB_CNT);
  112. if ((temp & (SMB_PROBE | SMB_HOSTBUSY)) != 0x00) {
  113. dev_dbg(&adap->dev, "SMBus busy (%02x). Resetting...\n", temp);
  114. /* kill smbus transaction */
  115. sis630_write(SMBHOST_CNT, SMB_KILL);
  116. temp = sis630_read(SMB_CNT);
  117. if (temp & (SMB_PROBE | SMB_HOSTBUSY)) {
  118. dev_dbg(&adap->dev, "Failed! (%02x)\n", temp);
  119. return -EBUSY;
  120. } else {
  121. dev_dbg(&adap->dev, "Successful!\n");
  122. }
  123. }
  124. /* save old clock, so we can prevent machine for hung */
  125. *oldclock = sis630_read(SMB_CNT);
  126. dev_dbg(&adap->dev, "saved clock 0x%02x\n", *oldclock);
  127. /* disable timeout interrupt,
  128. * set Host Master Clock to 56KHz if requested */
  129. if (high_clock)
  130. sis630_write(SMB_CNT, SMBCLK_SEL);
  131. else
  132. sis630_write(SMB_CNT, (*oldclock & ~MSTO_EN));
  133. /* clear all sticky bits */
  134. temp = sis630_read(SMB_STS);
  135. sis630_write(SMB_STS, temp & 0x1e);
  136. /* start the transaction by setting bit 4 and size */
  137. sis630_write(SMBHOST_CNT, SMB_START | (size & 0x07));
  138. return 0;
  139. }
  140. static int sis630_transaction_wait(struct i2c_adapter *adap, int size)
  141. {
  142. int temp, result = 0, timeout = 0;
  143. /* We will always wait for a fraction of a second! */
  144. do {
  145. msleep(1);
  146. temp = sis630_read(SMB_STS);
  147. /* check if block transmitted */
  148. if (size == SIS630_BLOCK_DATA && (temp & BYTE_DONE_STS))
  149. break;
  150. } while (!(temp & 0x0e) && (timeout++ < MAX_TIMEOUT));
  151. /* If the SMBus is still busy, we give up */
  152. if (timeout > MAX_TIMEOUT) {
  153. dev_dbg(&adap->dev, "SMBus Timeout!\n");
  154. result = -ETIMEDOUT;
  155. }
  156. if (temp & SMBERR_STS) {
  157. dev_dbg(&adap->dev, "Error: Failed bus transaction\n");
  158. result = -ENXIO;
  159. }
  160. if (temp & SMBCOL_STS) {
  161. dev_err(&adap->dev, "Bus collision!\n");
  162. result = -EAGAIN;
  163. }
  164. return result;
  165. }
  166. static void sis630_transaction_end(struct i2c_adapter *adap, u8 oldclock)
  167. {
  168. /* clear all status "sticky" bits */
  169. sis630_write(SMB_STS, 0xFF);
  170. dev_dbg(&adap->dev,
  171. "SMB_CNT before clock restore 0x%02x\n", sis630_read(SMB_CNT));
  172. /*
  173. * restore old Host Master Clock if high_clock is set
  174. * and oldclock was not 56KHz
  175. */
  176. if (high_clock && !(oldclock & SMBCLK_SEL))
  177. sis630_write(SMB_CNT, sis630_read(SMB_CNT) & ~SMBCLK_SEL);
  178. dev_dbg(&adap->dev,
  179. "SMB_CNT after clock restore 0x%02x\n", sis630_read(SMB_CNT));
  180. }
  181. static int sis630_transaction(struct i2c_adapter *adap, int size)
  182. {
  183. int result = 0;
  184. u8 oldclock = 0;
  185. result = sis630_transaction_start(adap, size, &oldclock);
  186. if (!result) {
  187. result = sis630_transaction_wait(adap, size);
  188. sis630_transaction_end(adap, oldclock);
  189. }
  190. return result;
  191. }
  192. static int sis630_block_data(struct i2c_adapter *adap,
  193. union i2c_smbus_data *data, int read_write)
  194. {
  195. int i, len = 0, rc = 0;
  196. u8 oldclock = 0;
  197. if (read_write == I2C_SMBUS_WRITE) {
  198. len = data->block[0];
  199. if (len < 0)
  200. len = 0;
  201. else if (len > 32)
  202. len = 32;
  203. sis630_write(SMB_COUNT, len);
  204. for (i = 1; i <= len; i++) {
  205. dev_dbg(&adap->dev,
  206. "set data 0x%02x\n", data->block[i]);
  207. /* set data */
  208. sis630_write(SMB_BYTE + (i - 1) % 8, data->block[i]);
  209. if (i == 8 || (len < 8 && i == len)) {
  210. dev_dbg(&adap->dev,
  211. "start trans len=%d i=%d\n", len, i);
  212. /* first transaction */
  213. rc = sis630_transaction_start(adap,
  214. SIS630_BLOCK_DATA, &oldclock);
  215. if (rc)
  216. return rc;
  217. } else if ((i - 1) % 8 == 7 || i == len) {
  218. dev_dbg(&adap->dev,
  219. "trans_wait len=%d i=%d\n", len, i);
  220. if (i > 8) {
  221. dev_dbg(&adap->dev,
  222. "clear smbary_sts"
  223. " len=%d i=%d\n", len, i);
  224. /*
  225. If this is not first transaction,
  226. we must clear sticky bit.
  227. clear SMBARY_STS
  228. */
  229. sis630_write(SMB_STS, BYTE_DONE_STS);
  230. }
  231. rc = sis630_transaction_wait(adap,
  232. SIS630_BLOCK_DATA);
  233. if (rc) {
  234. dev_dbg(&adap->dev,
  235. "trans_wait failed\n");
  236. break;
  237. }
  238. }
  239. }
  240. } else {
  241. /* read request */
  242. data->block[0] = len = 0;
  243. rc = sis630_transaction_start(adap,
  244. SIS630_BLOCK_DATA, &oldclock);
  245. if (rc)
  246. return rc;
  247. do {
  248. rc = sis630_transaction_wait(adap, SIS630_BLOCK_DATA);
  249. if (rc) {
  250. dev_dbg(&adap->dev, "trans_wait failed\n");
  251. break;
  252. }
  253. /* if this first transaction then read byte count */
  254. if (len == 0)
  255. data->block[0] = sis630_read(SMB_COUNT);
  256. /* just to be sure */
  257. if (data->block[0] > 32)
  258. data->block[0] = 32;
  259. dev_dbg(&adap->dev,
  260. "block data read len=0x%x\n", data->block[0]);
  261. for (i = 0; i < 8 && len < data->block[0]; i++, len++) {
  262. dev_dbg(&adap->dev,
  263. "read i=%d len=%d\n", i, len);
  264. data->block[len + 1] = sis630_read(SMB_BYTE +
  265. i);
  266. }
  267. dev_dbg(&adap->dev,
  268. "clear smbary_sts len=%d i=%d\n", len, i);
  269. /* clear SMBARY_STS */
  270. sis630_write(SMB_STS, BYTE_DONE_STS);
  271. } while (len < data->block[0]);
  272. }
  273. sis630_transaction_end(adap, oldclock);
  274. return rc;
  275. }
  276. /* Return negative errno on error. */
  277. static s32 sis630_access(struct i2c_adapter *adap, u16 addr,
  278. unsigned short flags, char read_write,
  279. u8 command, int size, union i2c_smbus_data *data)
  280. {
  281. int status;
  282. switch (size) {
  283. case I2C_SMBUS_QUICK:
  284. sis630_write(SMB_ADDR,
  285. ((addr & 0x7f) << 1) | (read_write & 0x01));
  286. size = SIS630_QUICK;
  287. break;
  288. case I2C_SMBUS_BYTE:
  289. sis630_write(SMB_ADDR,
  290. ((addr & 0x7f) << 1) | (read_write & 0x01));
  291. if (read_write == I2C_SMBUS_WRITE)
  292. sis630_write(SMB_CMD, command);
  293. size = SIS630_BYTE;
  294. break;
  295. case I2C_SMBUS_BYTE_DATA:
  296. sis630_write(SMB_ADDR,
  297. ((addr & 0x7f) << 1) | (read_write & 0x01));
  298. sis630_write(SMB_CMD, command);
  299. if (read_write == I2C_SMBUS_WRITE)
  300. sis630_write(SMB_BYTE, data->byte);
  301. size = SIS630_BYTE_DATA;
  302. break;
  303. case I2C_SMBUS_PROC_CALL:
  304. case I2C_SMBUS_WORD_DATA:
  305. sis630_write(SMB_ADDR,
  306. ((addr & 0x7f) << 1) | (read_write & 0x01));
  307. sis630_write(SMB_CMD, command);
  308. if (read_write == I2C_SMBUS_WRITE) {
  309. sis630_write(SMB_BYTE, data->word & 0xff);
  310. sis630_write(SMB_BYTE + 1, (data->word & 0xff00) >> 8);
  311. }
  312. size = (size == I2C_SMBUS_PROC_CALL ?
  313. SIS630_PCALL : SIS630_WORD_DATA);
  314. break;
  315. case I2C_SMBUS_BLOCK_DATA:
  316. sis630_write(SMB_ADDR,
  317. ((addr & 0x7f) << 1) | (read_write & 0x01));
  318. sis630_write(SMB_CMD, command);
  319. size = SIS630_BLOCK_DATA;
  320. return sis630_block_data(adap, data, read_write);
  321. default:
  322. dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
  323. return -EOPNOTSUPP;
  324. }
  325. status = sis630_transaction(adap, size);
  326. if (status)
  327. return status;
  328. if ((size != SIS630_PCALL) &&
  329. ((read_write == I2C_SMBUS_WRITE) || (size == SIS630_QUICK))) {
  330. return 0;
  331. }
  332. switch (size) {
  333. case SIS630_BYTE:
  334. case SIS630_BYTE_DATA:
  335. data->byte = sis630_read(SMB_BYTE);
  336. break;
  337. case SIS630_PCALL:
  338. case SIS630_WORD_DATA:
  339. data->word = sis630_read(SMB_BYTE) +
  340. (sis630_read(SMB_BYTE + 1) << 8);
  341. break;
  342. }
  343. return 0;
  344. }
  345. static u32 sis630_func(struct i2c_adapter *adapter)
  346. {
  347. return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
  348. I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
  349. I2C_FUNC_SMBUS_PROC_CALL | I2C_FUNC_SMBUS_BLOCK_DATA;
  350. }
  351. static int sis630_setup(struct pci_dev *sis630_dev)
  352. {
  353. unsigned char b;
  354. struct pci_dev *dummy = NULL;
  355. int retval, i;
  356. /* acpi base address */
  357. unsigned short acpi_base;
  358. /* check for supported SiS devices */
  359. for (i = 0; supported[i] > 0; i++) {
  360. dummy = pci_get_device(PCI_VENDOR_ID_SI, supported[i], dummy);
  361. if (dummy)
  362. break; /* found */
  363. }
  364. if (dummy) {
  365. pci_dev_put(dummy);
  366. } else if (force) {
  367. dev_err(&sis630_dev->dev,
  368. "WARNING: Can't detect SIS630 compatible device, but "
  369. "loading because of force option enabled\n");
  370. } else {
  371. return -ENODEV;
  372. }
  373. /*
  374. Enable ACPI first , so we can accsess reg 74-75
  375. in acpi io space and read acpi base addr
  376. */
  377. if (pci_read_config_byte(sis630_dev, SIS630_BIOS_CTL_REG, &b)) {
  378. dev_err(&sis630_dev->dev, "Error: Can't read bios ctl reg\n");
  379. retval = -ENODEV;
  380. goto exit;
  381. }
  382. /* if ACPI already enabled , do nothing */
  383. if (!(b & 0x80) &&
  384. pci_write_config_byte(sis630_dev, SIS630_BIOS_CTL_REG, b | 0x80)) {
  385. dev_err(&sis630_dev->dev, "Error: Can't enable ACPI\n");
  386. retval = -ENODEV;
  387. goto exit;
  388. }
  389. /* Determine the ACPI base address */
  390. if (pci_read_config_word(sis630_dev,
  391. SIS630_ACPI_BASE_REG, &acpi_base)) {
  392. dev_err(&sis630_dev->dev,
  393. "Error: Can't determine ACPI base address\n");
  394. retval = -ENODEV;
  395. goto exit;
  396. }
  397. dev_dbg(&sis630_dev->dev, "ACPI base at 0x%04hx\n", acpi_base);
  398. if (supported[i] == PCI_DEVICE_ID_SI_760)
  399. smbus_base = acpi_base + 0xE0;
  400. else
  401. smbus_base = acpi_base + 0x80;
  402. dev_dbg(&sis630_dev->dev, "SMBus base at 0x%04hx\n", smbus_base);
  403. retval = acpi_check_region(smbus_base + SMB_STS, SIS630_SMB_IOREGION,
  404. sis630_driver.name);
  405. if (retval)
  406. goto exit;
  407. /* Everything is happy, let's grab the memory and set things up. */
  408. if (!request_region(smbus_base + SMB_STS, SIS630_SMB_IOREGION,
  409. sis630_driver.name)) {
  410. dev_err(&sis630_dev->dev,
  411. "I/O Region 0x%04hx-0x%04hx for SMBus already in use.\n",
  412. smbus_base + SMB_STS,
  413. smbus_base + SMB_STS + SIS630_SMB_IOREGION - 1);
  414. retval = -EBUSY;
  415. goto exit;
  416. }
  417. retval = 0;
  418. exit:
  419. if (retval)
  420. smbus_base = 0;
  421. return retval;
  422. }
  423. static const struct i2c_algorithm smbus_algorithm = {
  424. .smbus_xfer = sis630_access,
  425. .functionality = sis630_func,
  426. };
  427. static struct i2c_adapter sis630_adapter = {
  428. .owner = THIS_MODULE,
  429. .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
  430. .algo = &smbus_algorithm,
  431. .retries = 3
  432. };
  433. static const struct pci_device_id sis630_ids[] = {
  434. { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503) },
  435. { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_LPC) },
  436. { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_964) },
  437. { 0, }
  438. };
  439. MODULE_DEVICE_TABLE(pci, sis630_ids);
  440. static int sis630_probe(struct pci_dev *dev, const struct pci_device_id *id)
  441. {
  442. if (sis630_setup(dev)) {
  443. dev_err(&dev->dev,
  444. "SIS630 compatible bus not detected, "
  445. "module not inserted.\n");
  446. return -ENODEV;
  447. }
  448. /* set up the sysfs linkage to our parent device */
  449. sis630_adapter.dev.parent = &dev->dev;
  450. snprintf(sis630_adapter.name, sizeof(sis630_adapter.name),
  451. "SMBus SIS630 adapter at %04hx", smbus_base + SMB_STS);
  452. return i2c_add_adapter(&sis630_adapter);
  453. }
  454. static void sis630_remove(struct pci_dev *dev)
  455. {
  456. if (smbus_base) {
  457. i2c_del_adapter(&sis630_adapter);
  458. release_region(smbus_base + SMB_STS, SIS630_SMB_IOREGION);
  459. smbus_base = 0;
  460. }
  461. }
  462. static struct pci_driver sis630_driver = {
  463. .name = "sis630_smbus",
  464. .id_table = sis630_ids,
  465. .probe = sis630_probe,
  466. .remove = sis630_remove,
  467. };
  468. module_pci_driver(sis630_driver);
  469. MODULE_LICENSE("GPL");
  470. MODULE_AUTHOR("Alexander Malysh <amalysh@web.de>");
  471. MODULE_DESCRIPTION("SIS630 SMBus driver");