opti621.c 4.5 KB

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  1. /*
  2. * Copyright (C) 1996-1998 Linus Torvalds & authors (see below)
  3. */
  4. /*
  5. * Authors:
  6. * Jaromir Koutek <miri@punknet.cz>,
  7. * Jan Harkes <jaharkes@cwi.nl>,
  8. * Mark Lord <mlord@pobox.com>
  9. * Some parts of code are from ali14xx.c and from rz1000.c.
  10. */
  11. #include <linux/types.h>
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/pci.h>
  15. #include <linux/ide.h>
  16. #include <asm/io.h>
  17. #define DRV_NAME "opti621"
  18. #define READ_REG 0 /* index of Read cycle timing register */
  19. #define WRITE_REG 1 /* index of Write cycle timing register */
  20. #define CNTRL_REG 3 /* index of Control register */
  21. #define STRAP_REG 5 /* index of Strap register */
  22. #define MISC_REG 6 /* index of Miscellaneous register */
  23. static int reg_base;
  24. static DEFINE_SPINLOCK(opti621_lock);
  25. /* Write value to register reg, base of register
  26. * is at reg_base (0x1f0 primary, 0x170 secondary,
  27. * if not changed by PCI configuration).
  28. * This is from setupvic.exe program.
  29. */
  30. static void write_reg(u8 value, int reg)
  31. {
  32. inw(reg_base + 1);
  33. inw(reg_base + 1);
  34. outb(3, reg_base + 2);
  35. outb(value, reg_base + reg);
  36. outb(0x83, reg_base + 2);
  37. }
  38. /* Read value from register reg, base of register
  39. * is at reg_base (0x1f0 primary, 0x170 secondary,
  40. * if not changed by PCI configuration).
  41. * This is from setupvic.exe program.
  42. */
  43. static u8 read_reg(int reg)
  44. {
  45. u8 ret = 0;
  46. inw(reg_base + 1);
  47. inw(reg_base + 1);
  48. outb(3, reg_base + 2);
  49. ret = inb(reg_base + reg);
  50. outb(0x83, reg_base + 2);
  51. return ret;
  52. }
  53. static void opti621_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
  54. {
  55. ide_drive_t *pair = ide_get_pair_dev(drive);
  56. unsigned long flags;
  57. unsigned long mode = drive->pio_mode, pair_mode;
  58. const u8 pio = mode - XFER_PIO_0;
  59. u8 tim, misc, addr_pio = pio, clk;
  60. /* DRDY is default 2 (by OPTi Databook) */
  61. static const u8 addr_timings[2][5] = {
  62. { 0x20, 0x10, 0x00, 0x00, 0x00 }, /* 33 MHz */
  63. { 0x10, 0x10, 0x00, 0x00, 0x00 }, /* 25 MHz */
  64. };
  65. static const u8 data_rec_timings[2][5] = {
  66. { 0x5b, 0x45, 0x32, 0x21, 0x20 }, /* 33 MHz */
  67. { 0x48, 0x34, 0x21, 0x10, 0x10 } /* 25 MHz */
  68. };
  69. ide_set_drivedata(drive, (void *)mode);
  70. if (pair) {
  71. pair_mode = (unsigned long)ide_get_drivedata(pair);
  72. if (pair_mode && pair_mode < mode)
  73. addr_pio = pair_mode - XFER_PIO_0;
  74. }
  75. spin_lock_irqsave(&opti621_lock, flags);
  76. reg_base = hwif->io_ports.data_addr;
  77. /* allow Register-B */
  78. outb(0xc0, reg_base + CNTRL_REG);
  79. /* hmm, setupvic.exe does this ;-) */
  80. outb(0xff, reg_base + 5);
  81. /* if reads 0xff, adapter not exist? */
  82. (void)inb(reg_base + CNTRL_REG);
  83. /* if reads 0xc0, no interface exist? */
  84. read_reg(CNTRL_REG);
  85. /* check CLK speed */
  86. clk = read_reg(STRAP_REG) & 1;
  87. printk(KERN_INFO "%s: CLK = %d MHz\n", hwif->name, clk ? 25 : 33);
  88. tim = data_rec_timings[clk][pio];
  89. misc = addr_timings[clk][addr_pio];
  90. /* select Index-0/1 for Register-A/B */
  91. write_reg(drive->dn & 1, MISC_REG);
  92. /* set read cycle timings */
  93. write_reg(tim, READ_REG);
  94. /* set write cycle timings */
  95. write_reg(tim, WRITE_REG);
  96. /* use Register-A for drive 0 */
  97. /* use Register-B for drive 1 */
  98. write_reg(0x85, CNTRL_REG);
  99. /* set address setup, DRDY timings, */
  100. /* and read prefetch for both drives */
  101. write_reg(misc, MISC_REG);
  102. spin_unlock_irqrestore(&opti621_lock, flags);
  103. }
  104. static const struct ide_port_ops opti621_port_ops = {
  105. .set_pio_mode = opti621_set_pio_mode,
  106. };
  107. static const struct ide_port_info opti621_chipset = {
  108. .name = DRV_NAME,
  109. .enablebits = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} },
  110. .port_ops = &opti621_port_ops,
  111. .host_flags = IDE_HFLAG_NO_DMA,
  112. .pio_mask = ATA_PIO4,
  113. };
  114. static int opti621_init_one(struct pci_dev *dev, const struct pci_device_id *id)
  115. {
  116. return ide_pci_init_one(dev, &opti621_chipset, NULL);
  117. }
  118. static const struct pci_device_id opti621_pci_tbl[] = {
  119. { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C621), 0 },
  120. { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C825), 0 },
  121. { 0, },
  122. };
  123. MODULE_DEVICE_TABLE(pci, opti621_pci_tbl);
  124. static struct pci_driver opti621_pci_driver = {
  125. .name = "Opti621_IDE",
  126. .id_table = opti621_pci_tbl,
  127. .probe = opti621_init_one,
  128. .remove = ide_pci_remove,
  129. .suspend = ide_pci_suspend,
  130. .resume = ide_pci_resume,
  131. };
  132. static int __init opti621_ide_init(void)
  133. {
  134. return ide_pci_register_driver(&opti621_pci_driver);
  135. }
  136. static void __exit opti621_ide_exit(void)
  137. {
  138. pci_unregister_driver(&opti621_pci_driver);
  139. }
  140. module_init(opti621_ide_init);
  141. module_exit(opti621_ide_exit);
  142. MODULE_AUTHOR("Jaromir Koutek, Jan Harkes, Mark Lord");
  143. MODULE_DESCRIPTION("PCI driver module for Opti621 IDE");
  144. MODULE_LICENSE("GPL");