sirfsoc-onkey.c 5.5 KB

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  1. /*
  2. * Power key driver for SiRF PrimaII
  3. *
  4. * Copyright (c) 2013 - 2014 Cambridge Silicon Radio Limited, a CSR plc group
  5. * company.
  6. *
  7. * Licensed under GPLv2 or later.
  8. */
  9. #include <linux/module.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/delay.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/input.h>
  14. #include <linux/rtc/sirfsoc_rtciobrg.h>
  15. #include <linux/of.h>
  16. #include <linux/workqueue.h>
  17. struct sirfsoc_pwrc_drvdata {
  18. u32 pwrc_base;
  19. struct input_dev *input;
  20. struct delayed_work work;
  21. };
  22. #define PWRC_ON_KEY_BIT (1 << 0)
  23. #define PWRC_INT_STATUS 0xc
  24. #define PWRC_INT_MASK 0x10
  25. #define PWRC_PIN_STATUS 0x14
  26. #define PWRC_KEY_DETECT_UP_TIME 20 /* ms*/
  27. static int sirfsoc_pwrc_is_on_key_down(struct sirfsoc_pwrc_drvdata *pwrcdrv)
  28. {
  29. u32 state = sirfsoc_rtc_iobrg_readl(pwrcdrv->pwrc_base +
  30. PWRC_PIN_STATUS);
  31. return !(state & PWRC_ON_KEY_BIT); /* ON_KEY is active low */
  32. }
  33. static void sirfsoc_pwrc_report_event(struct work_struct *work)
  34. {
  35. struct sirfsoc_pwrc_drvdata *pwrcdrv =
  36. container_of(work, struct sirfsoc_pwrc_drvdata, work.work);
  37. if (sirfsoc_pwrc_is_on_key_down(pwrcdrv)) {
  38. schedule_delayed_work(&pwrcdrv->work,
  39. msecs_to_jiffies(PWRC_KEY_DETECT_UP_TIME));
  40. } else {
  41. input_event(pwrcdrv->input, EV_KEY, KEY_POWER, 0);
  42. input_sync(pwrcdrv->input);
  43. }
  44. }
  45. static irqreturn_t sirfsoc_pwrc_isr(int irq, void *dev_id)
  46. {
  47. struct sirfsoc_pwrc_drvdata *pwrcdrv = dev_id;
  48. u32 int_status;
  49. int_status = sirfsoc_rtc_iobrg_readl(pwrcdrv->pwrc_base +
  50. PWRC_INT_STATUS);
  51. sirfsoc_rtc_iobrg_writel(int_status & ~PWRC_ON_KEY_BIT,
  52. pwrcdrv->pwrc_base + PWRC_INT_STATUS);
  53. input_event(pwrcdrv->input, EV_KEY, KEY_POWER, 1);
  54. input_sync(pwrcdrv->input);
  55. schedule_delayed_work(&pwrcdrv->work,
  56. msecs_to_jiffies(PWRC_KEY_DETECT_UP_TIME));
  57. return IRQ_HANDLED;
  58. }
  59. static void sirfsoc_pwrc_toggle_interrupts(struct sirfsoc_pwrc_drvdata *pwrcdrv,
  60. bool enable)
  61. {
  62. u32 int_mask;
  63. int_mask = sirfsoc_rtc_iobrg_readl(pwrcdrv->pwrc_base + PWRC_INT_MASK);
  64. if (enable)
  65. int_mask |= PWRC_ON_KEY_BIT;
  66. else
  67. int_mask &= ~PWRC_ON_KEY_BIT;
  68. sirfsoc_rtc_iobrg_writel(int_mask, pwrcdrv->pwrc_base + PWRC_INT_MASK);
  69. }
  70. static int sirfsoc_pwrc_open(struct input_dev *input)
  71. {
  72. struct sirfsoc_pwrc_drvdata *pwrcdrv = input_get_drvdata(input);
  73. sirfsoc_pwrc_toggle_interrupts(pwrcdrv, true);
  74. return 0;
  75. }
  76. static void sirfsoc_pwrc_close(struct input_dev *input)
  77. {
  78. struct sirfsoc_pwrc_drvdata *pwrcdrv = input_get_drvdata(input);
  79. sirfsoc_pwrc_toggle_interrupts(pwrcdrv, false);
  80. cancel_delayed_work_sync(&pwrcdrv->work);
  81. }
  82. static const struct of_device_id sirfsoc_pwrc_of_match[] = {
  83. { .compatible = "sirf,prima2-pwrc" },
  84. {},
  85. }
  86. MODULE_DEVICE_TABLE(of, sirfsoc_pwrc_of_match);
  87. static int sirfsoc_pwrc_probe(struct platform_device *pdev)
  88. {
  89. struct device_node *np = pdev->dev.of_node;
  90. struct sirfsoc_pwrc_drvdata *pwrcdrv;
  91. int irq;
  92. int error;
  93. pwrcdrv = devm_kzalloc(&pdev->dev, sizeof(struct sirfsoc_pwrc_drvdata),
  94. GFP_KERNEL);
  95. if (!pwrcdrv) {
  96. dev_info(&pdev->dev, "Not enough memory for the device data\n");
  97. return -ENOMEM;
  98. }
  99. /*
  100. * We can't use of_iomap because pwrc is not mapped in memory,
  101. * the so-called base address is only offset in rtciobrg
  102. */
  103. error = of_property_read_u32(np, "reg", &pwrcdrv->pwrc_base);
  104. if (error) {
  105. dev_err(&pdev->dev,
  106. "unable to find base address of pwrc node in dtb\n");
  107. return error;
  108. }
  109. pwrcdrv->input = devm_input_allocate_device(&pdev->dev);
  110. if (!pwrcdrv->input)
  111. return -ENOMEM;
  112. pwrcdrv->input->name = "sirfsoc pwrckey";
  113. pwrcdrv->input->phys = "pwrc/input0";
  114. pwrcdrv->input->evbit[0] = BIT_MASK(EV_KEY);
  115. input_set_capability(pwrcdrv->input, EV_KEY, KEY_POWER);
  116. INIT_DELAYED_WORK(&pwrcdrv->work, sirfsoc_pwrc_report_event);
  117. pwrcdrv->input->open = sirfsoc_pwrc_open;
  118. pwrcdrv->input->close = sirfsoc_pwrc_close;
  119. input_set_drvdata(pwrcdrv->input, pwrcdrv);
  120. /* Make sure the device is quiesced */
  121. sirfsoc_pwrc_toggle_interrupts(pwrcdrv, false);
  122. irq = platform_get_irq(pdev, 0);
  123. error = devm_request_irq(&pdev->dev, irq,
  124. sirfsoc_pwrc_isr, 0,
  125. "sirfsoc_pwrc_int", pwrcdrv);
  126. if (error) {
  127. dev_err(&pdev->dev, "unable to claim irq %d, error: %d\n",
  128. irq, error);
  129. return error;
  130. }
  131. error = input_register_device(pwrcdrv->input);
  132. if (error) {
  133. dev_err(&pdev->dev,
  134. "unable to register input device, error: %d\n",
  135. error);
  136. return error;
  137. }
  138. dev_set_drvdata(&pdev->dev, pwrcdrv);
  139. device_init_wakeup(&pdev->dev, 1);
  140. return 0;
  141. }
  142. static int sirfsoc_pwrc_remove(struct platform_device *pdev)
  143. {
  144. device_init_wakeup(&pdev->dev, 0);
  145. return 0;
  146. }
  147. static int __maybe_unused sirfsoc_pwrc_resume(struct device *dev)
  148. {
  149. struct sirfsoc_pwrc_drvdata *pwrcdrv = dev_get_drvdata(dev);
  150. struct input_dev *input = pwrcdrv->input;
  151. /*
  152. * Do not mask pwrc interrupt as we want pwrc work as a wakeup source
  153. * if users touch X_ONKEY_B, see arch/arm/mach-prima2/pm.c
  154. */
  155. mutex_lock(&input->mutex);
  156. if (input->users)
  157. sirfsoc_pwrc_toggle_interrupts(pwrcdrv, true);
  158. mutex_unlock(&input->mutex);
  159. return 0;
  160. }
  161. static SIMPLE_DEV_PM_OPS(sirfsoc_pwrc_pm_ops, NULL, sirfsoc_pwrc_resume);
  162. static struct platform_driver sirfsoc_pwrc_driver = {
  163. .probe = sirfsoc_pwrc_probe,
  164. .remove = sirfsoc_pwrc_remove,
  165. .driver = {
  166. .name = "sirfsoc-pwrc",
  167. .pm = &sirfsoc_pwrc_pm_ops,
  168. .of_match_table = sirfsoc_pwrc_of_match,
  169. }
  170. };
  171. module_platform_driver(sirfsoc_pwrc_driver);
  172. MODULE_LICENSE("GPL v2");
  173. MODULE_AUTHOR("Binghua Duan <Binghua.Duan@csr.com>, Xianglong Du <Xianglong.Du@csr.com>");
  174. MODULE_DESCRIPTION("CSR Prima2 PWRC Driver");
  175. MODULE_ALIAS("platform:sirfsoc-pwrc");