cyapa_gen3.c 36 KB

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  1. /*
  2. * Cypress APA trackpad with I2C interface
  3. *
  4. * Author: Dudley Du <dudl@cypress.com>
  5. * Further cleanup and restructuring by:
  6. * Daniel Kurtz <djkurtz@chromium.org>
  7. * Benson Leung <bleung@chromium.org>
  8. *
  9. * Copyright (C) 2011-2015 Cypress Semiconductor, Inc.
  10. * Copyright (C) 2011-2012 Google, Inc.
  11. *
  12. * This file is subject to the terms and conditions of the GNU General Public
  13. * License. See the file COPYING in the main directory of this archive for
  14. * more details.
  15. */
  16. #include <linux/delay.h>
  17. #include <linux/i2c.h>
  18. #include <linux/input.h>
  19. #include <linux/input/mt.h>
  20. #include <linux/module.h>
  21. #include <linux/slab.h>
  22. #include <asm/unaligned.h>
  23. #include "cyapa.h"
  24. #define GEN3_MAX_FINGERS 5
  25. #define GEN3_FINGER_NUM(x) (((x) >> 4) & 0x07)
  26. #define BLK_HEAD_BYTES 32
  27. /* Macro for register map group offset. */
  28. #define PRODUCT_ID_SIZE 16
  29. #define QUERY_DATA_SIZE 27
  30. #define REG_PROTOCOL_GEN_QUERY_OFFSET 20
  31. #define REG_OFFSET_DATA_BASE 0x0000
  32. #define REG_OFFSET_COMMAND_BASE 0x0028
  33. #define REG_OFFSET_QUERY_BASE 0x002a
  34. #define CYAPA_OFFSET_SOFT_RESET REG_OFFSET_COMMAND_BASE
  35. #define OP_RECALIBRATION_MASK 0x80
  36. #define OP_REPORT_BASELINE_MASK 0x40
  37. #define REG_OFFSET_MAX_BASELINE 0x0026
  38. #define REG_OFFSET_MIN_BASELINE 0x0027
  39. #define REG_OFFSET_POWER_MODE (REG_OFFSET_COMMAND_BASE + 1)
  40. #define SET_POWER_MODE_DELAY 10000 /* Unit: us */
  41. #define SET_POWER_MODE_TRIES 5
  42. #define GEN3_BL_CMD_CHECKSUM_SEED 0xff
  43. #define GEN3_BL_CMD_INITIATE_BL 0x38
  44. #define GEN3_BL_CMD_WRITE_BLOCK 0x39
  45. #define GEN3_BL_CMD_VERIFY_BLOCK 0x3a
  46. #define GEN3_BL_CMD_TERMINATE_BL 0x3b
  47. #define GEN3_BL_CMD_LAUNCH_APP 0xa5
  48. /*
  49. * CYAPA trackpad device states.
  50. * Used in register 0x00, bit1-0, DeviceStatus field.
  51. * Other values indicate device is in an abnormal state and must be reset.
  52. */
  53. #define CYAPA_DEV_NORMAL 0x03
  54. #define CYAPA_DEV_BUSY 0x01
  55. #define CYAPA_FW_BLOCK_SIZE 64
  56. #define CYAPA_FW_READ_SIZE 16
  57. #define CYAPA_FW_HDR_START 0x0780
  58. #define CYAPA_FW_HDR_BLOCK_COUNT 2
  59. #define CYAPA_FW_HDR_BLOCK_START (CYAPA_FW_HDR_START / CYAPA_FW_BLOCK_SIZE)
  60. #define CYAPA_FW_HDR_SIZE (CYAPA_FW_HDR_BLOCK_COUNT * \
  61. CYAPA_FW_BLOCK_SIZE)
  62. #define CYAPA_FW_DATA_START 0x0800
  63. #define CYAPA_FW_DATA_BLOCK_COUNT 480
  64. #define CYAPA_FW_DATA_BLOCK_START (CYAPA_FW_DATA_START / CYAPA_FW_BLOCK_SIZE)
  65. #define CYAPA_FW_DATA_SIZE (CYAPA_FW_DATA_BLOCK_COUNT * \
  66. CYAPA_FW_BLOCK_SIZE)
  67. #define CYAPA_FW_SIZE (CYAPA_FW_HDR_SIZE + CYAPA_FW_DATA_SIZE)
  68. #define CYAPA_CMD_LEN 16
  69. #define GEN3_BL_IDLE_FW_MAJ_VER_OFFSET 0x0b
  70. #define GEN3_BL_IDLE_FW_MIN_VER_OFFSET (GEN3_BL_IDLE_FW_MAJ_VER_OFFSET + 1)
  71. struct cyapa_touch {
  72. /*
  73. * high bits or x/y position value
  74. * bit 7 - 4: high 4 bits of x position value
  75. * bit 3 - 0: high 4 bits of y position value
  76. */
  77. u8 xy_hi;
  78. u8 x_lo; /* low 8 bits of x position value. */
  79. u8 y_lo; /* low 8 bits of y position value. */
  80. u8 pressure;
  81. /* id range is 1 - 15. It is incremented with every new touch. */
  82. u8 id;
  83. } __packed;
  84. struct cyapa_reg_data {
  85. /*
  86. * bit 0 - 1: device status
  87. * bit 3 - 2: power mode
  88. * bit 6 - 4: reserved
  89. * bit 7: interrupt valid bit
  90. */
  91. u8 device_status;
  92. /*
  93. * bit 7 - 4: number of fingers currently touching pad
  94. * bit 3: valid data check bit
  95. * bit 2: middle mechanism button state if exists
  96. * bit 1: right mechanism button state if exists
  97. * bit 0: left mechanism button state if exists
  98. */
  99. u8 finger_btn;
  100. /* CYAPA reports up to 5 touches per packet. */
  101. struct cyapa_touch touches[5];
  102. } __packed;
  103. struct gen3_write_block_cmd {
  104. u8 checksum_seed; /* Always be 0xff */
  105. u8 cmd_code; /* command code: 0x39 */
  106. u8 key[8]; /* 8-byte security key */
  107. __be16 block_num;
  108. u8 block_data[CYAPA_FW_BLOCK_SIZE];
  109. u8 block_checksum; /* Calculated using bytes 12 - 75 */
  110. u8 cmd_checksum; /* Calculated using bytes 0-76 */
  111. } __packed;
  112. static const u8 security_key[] = {
  113. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07 };
  114. static const u8 bl_activate[] = { 0x00, 0xff, 0x38, 0x00, 0x01, 0x02, 0x03,
  115. 0x04, 0x05, 0x06, 0x07 };
  116. static const u8 bl_deactivate[] = { 0x00, 0xff, 0x3b, 0x00, 0x01, 0x02, 0x03,
  117. 0x04, 0x05, 0x06, 0x07 };
  118. static const u8 bl_exit[] = { 0x00, 0xff, 0xa5, 0x00, 0x01, 0x02, 0x03, 0x04,
  119. 0x05, 0x06, 0x07 };
  120. /* for byte read/write command */
  121. #define CMD_RESET 0
  122. #define CMD_POWER_MODE 1
  123. #define CMD_DEV_STATUS 2
  124. #define CMD_REPORT_MAX_BASELINE 3
  125. #define CMD_REPORT_MIN_BASELINE 4
  126. #define SMBUS_BYTE_CMD(cmd) (((cmd) & 0x3f) << 1)
  127. #define CYAPA_SMBUS_RESET SMBUS_BYTE_CMD(CMD_RESET)
  128. #define CYAPA_SMBUS_POWER_MODE SMBUS_BYTE_CMD(CMD_POWER_MODE)
  129. #define CYAPA_SMBUS_DEV_STATUS SMBUS_BYTE_CMD(CMD_DEV_STATUS)
  130. #define CYAPA_SMBUS_MAX_BASELINE SMBUS_BYTE_CMD(CMD_REPORT_MAX_BASELINE)
  131. #define CYAPA_SMBUS_MIN_BASELINE SMBUS_BYTE_CMD(CMD_REPORT_MIN_BASELINE)
  132. /* for group registers read/write command */
  133. #define REG_GROUP_DATA 0
  134. #define REG_GROUP_CMD 2
  135. #define REG_GROUP_QUERY 3
  136. #define SMBUS_GROUP_CMD(grp) (0x80 | (((grp) & 0x07) << 3))
  137. #define CYAPA_SMBUS_GROUP_DATA SMBUS_GROUP_CMD(REG_GROUP_DATA)
  138. #define CYAPA_SMBUS_GROUP_CMD SMBUS_GROUP_CMD(REG_GROUP_CMD)
  139. #define CYAPA_SMBUS_GROUP_QUERY SMBUS_GROUP_CMD(REG_GROUP_QUERY)
  140. /* for register block read/write command */
  141. #define CMD_BL_STATUS 0
  142. #define CMD_BL_HEAD 1
  143. #define CMD_BL_CMD 2
  144. #define CMD_BL_DATA 3
  145. #define CMD_BL_ALL 4
  146. #define CMD_BLK_PRODUCT_ID 5
  147. #define CMD_BLK_HEAD 6
  148. #define SMBUS_BLOCK_CMD(cmd) (0xc0 | (((cmd) & 0x1f) << 1))
  149. /* register block read/write command in bootloader mode */
  150. #define CYAPA_SMBUS_BL_STATUS SMBUS_BLOCK_CMD(CMD_BL_STATUS)
  151. #define CYAPA_SMBUS_BL_HEAD SMBUS_BLOCK_CMD(CMD_BL_HEAD)
  152. #define CYAPA_SMBUS_BL_CMD SMBUS_BLOCK_CMD(CMD_BL_CMD)
  153. #define CYAPA_SMBUS_BL_DATA SMBUS_BLOCK_CMD(CMD_BL_DATA)
  154. #define CYAPA_SMBUS_BL_ALL SMBUS_BLOCK_CMD(CMD_BL_ALL)
  155. /* register block read/write command in operational mode */
  156. #define CYAPA_SMBUS_BLK_PRODUCT_ID SMBUS_BLOCK_CMD(CMD_BLK_PRODUCT_ID)
  157. #define CYAPA_SMBUS_BLK_HEAD SMBUS_BLOCK_CMD(CMD_BLK_HEAD)
  158. /* for byte read/write command */
  159. #define CMD_RESET 0
  160. #define CMD_POWER_MODE 1
  161. #define CMD_DEV_STATUS 2
  162. #define CMD_REPORT_MAX_BASELINE 3
  163. #define CMD_REPORT_MIN_BASELINE 4
  164. #define SMBUS_BYTE_CMD(cmd) (((cmd) & 0x3f) << 1)
  165. #define CYAPA_SMBUS_RESET SMBUS_BYTE_CMD(CMD_RESET)
  166. #define CYAPA_SMBUS_POWER_MODE SMBUS_BYTE_CMD(CMD_POWER_MODE)
  167. #define CYAPA_SMBUS_DEV_STATUS SMBUS_BYTE_CMD(CMD_DEV_STATUS)
  168. #define CYAPA_SMBUS_MAX_BASELINE SMBUS_BYTE_CMD(CMD_REPORT_MAX_BASELINE)
  169. #define CYAPA_SMBUS_MIN_BASELINE SMBUS_BYTE_CMD(CMD_REPORT_MIN_BASELINE)
  170. /* for group registers read/write command */
  171. #define REG_GROUP_DATA 0
  172. #define REG_GROUP_CMD 2
  173. #define REG_GROUP_QUERY 3
  174. #define SMBUS_GROUP_CMD(grp) (0x80 | (((grp) & 0x07) << 3))
  175. #define CYAPA_SMBUS_GROUP_DATA SMBUS_GROUP_CMD(REG_GROUP_DATA)
  176. #define CYAPA_SMBUS_GROUP_CMD SMBUS_GROUP_CMD(REG_GROUP_CMD)
  177. #define CYAPA_SMBUS_GROUP_QUERY SMBUS_GROUP_CMD(REG_GROUP_QUERY)
  178. /* for register block read/write command */
  179. #define CMD_BL_STATUS 0
  180. #define CMD_BL_HEAD 1
  181. #define CMD_BL_CMD 2
  182. #define CMD_BL_DATA 3
  183. #define CMD_BL_ALL 4
  184. #define CMD_BLK_PRODUCT_ID 5
  185. #define CMD_BLK_HEAD 6
  186. #define SMBUS_BLOCK_CMD(cmd) (0xc0 | (((cmd) & 0x1f) << 1))
  187. /* register block read/write command in bootloader mode */
  188. #define CYAPA_SMBUS_BL_STATUS SMBUS_BLOCK_CMD(CMD_BL_STATUS)
  189. #define CYAPA_SMBUS_BL_HEAD SMBUS_BLOCK_CMD(CMD_BL_HEAD)
  190. #define CYAPA_SMBUS_BL_CMD SMBUS_BLOCK_CMD(CMD_BL_CMD)
  191. #define CYAPA_SMBUS_BL_DATA SMBUS_BLOCK_CMD(CMD_BL_DATA)
  192. #define CYAPA_SMBUS_BL_ALL SMBUS_BLOCK_CMD(CMD_BL_ALL)
  193. /* register block read/write command in operational mode */
  194. #define CYAPA_SMBUS_BLK_PRODUCT_ID SMBUS_BLOCK_CMD(CMD_BLK_PRODUCT_ID)
  195. #define CYAPA_SMBUS_BLK_HEAD SMBUS_BLOCK_CMD(CMD_BLK_HEAD)
  196. struct cyapa_cmd_len {
  197. u8 cmd;
  198. u8 len;
  199. };
  200. /* maps generic CYAPA_CMD_* code to the I2C equivalent */
  201. static const struct cyapa_cmd_len cyapa_i2c_cmds[] = {
  202. { CYAPA_OFFSET_SOFT_RESET, 1 }, /* CYAPA_CMD_SOFT_RESET */
  203. { REG_OFFSET_COMMAND_BASE + 1, 1 }, /* CYAPA_CMD_POWER_MODE */
  204. { REG_OFFSET_DATA_BASE, 1 }, /* CYAPA_CMD_DEV_STATUS */
  205. { REG_OFFSET_DATA_BASE, sizeof(struct cyapa_reg_data) },
  206. /* CYAPA_CMD_GROUP_DATA */
  207. { REG_OFFSET_COMMAND_BASE, 0 }, /* CYAPA_CMD_GROUP_CMD */
  208. { REG_OFFSET_QUERY_BASE, QUERY_DATA_SIZE }, /* CYAPA_CMD_GROUP_QUERY */
  209. { BL_HEAD_OFFSET, 3 }, /* CYAPA_CMD_BL_STATUS */
  210. { BL_HEAD_OFFSET, 16 }, /* CYAPA_CMD_BL_HEAD */
  211. { BL_HEAD_OFFSET, 16 }, /* CYAPA_CMD_BL_CMD */
  212. { BL_DATA_OFFSET, 16 }, /* CYAPA_CMD_BL_DATA */
  213. { BL_HEAD_OFFSET, 32 }, /* CYAPA_CMD_BL_ALL */
  214. { REG_OFFSET_QUERY_BASE, PRODUCT_ID_SIZE },
  215. /* CYAPA_CMD_BLK_PRODUCT_ID */
  216. { REG_OFFSET_DATA_BASE, 32 }, /* CYAPA_CMD_BLK_HEAD */
  217. { REG_OFFSET_MAX_BASELINE, 1 }, /* CYAPA_CMD_MAX_BASELINE */
  218. { REG_OFFSET_MIN_BASELINE, 1 }, /* CYAPA_CMD_MIN_BASELINE */
  219. };
  220. static const struct cyapa_cmd_len cyapa_smbus_cmds[] = {
  221. { CYAPA_SMBUS_RESET, 1 }, /* CYAPA_CMD_SOFT_RESET */
  222. { CYAPA_SMBUS_POWER_MODE, 1 }, /* CYAPA_CMD_POWER_MODE */
  223. { CYAPA_SMBUS_DEV_STATUS, 1 }, /* CYAPA_CMD_DEV_STATUS */
  224. { CYAPA_SMBUS_GROUP_DATA, sizeof(struct cyapa_reg_data) },
  225. /* CYAPA_CMD_GROUP_DATA */
  226. { CYAPA_SMBUS_GROUP_CMD, 2 }, /* CYAPA_CMD_GROUP_CMD */
  227. { CYAPA_SMBUS_GROUP_QUERY, QUERY_DATA_SIZE },
  228. /* CYAPA_CMD_GROUP_QUERY */
  229. { CYAPA_SMBUS_BL_STATUS, 3 }, /* CYAPA_CMD_BL_STATUS */
  230. { CYAPA_SMBUS_BL_HEAD, 16 }, /* CYAPA_CMD_BL_HEAD */
  231. { CYAPA_SMBUS_BL_CMD, 16 }, /* CYAPA_CMD_BL_CMD */
  232. { CYAPA_SMBUS_BL_DATA, 16 }, /* CYAPA_CMD_BL_DATA */
  233. { CYAPA_SMBUS_BL_ALL, 32 }, /* CYAPA_CMD_BL_ALL */
  234. { CYAPA_SMBUS_BLK_PRODUCT_ID, PRODUCT_ID_SIZE },
  235. /* CYAPA_CMD_BLK_PRODUCT_ID */
  236. { CYAPA_SMBUS_BLK_HEAD, 16 }, /* CYAPA_CMD_BLK_HEAD */
  237. { CYAPA_SMBUS_MAX_BASELINE, 1 }, /* CYAPA_CMD_MAX_BASELINE */
  238. { CYAPA_SMBUS_MIN_BASELINE, 1 }, /* CYAPA_CMD_MIN_BASELINE */
  239. };
  240. /*
  241. * cyapa_smbus_read_block - perform smbus block read command
  242. * @cyapa - private data structure of the driver
  243. * @cmd - the properly encoded smbus command
  244. * @len - expected length of smbus command result
  245. * @values - buffer to store smbus command result
  246. *
  247. * Returns negative errno, else the number of bytes written.
  248. *
  249. * Note:
  250. * In trackpad device, the memory block allocated for I2C register map
  251. * is 256 bytes, so the max read block for I2C bus is 256 bytes.
  252. */
  253. ssize_t cyapa_smbus_read_block(struct cyapa *cyapa, u8 cmd, size_t len,
  254. u8 *values)
  255. {
  256. ssize_t ret;
  257. u8 index;
  258. u8 smbus_cmd;
  259. u8 *buf;
  260. struct i2c_client *client = cyapa->client;
  261. if (!(SMBUS_BYTE_BLOCK_CMD_MASK & cmd))
  262. return -EINVAL;
  263. if (SMBUS_GROUP_BLOCK_CMD_MASK & cmd) {
  264. /* read specific block registers command. */
  265. smbus_cmd = SMBUS_ENCODE_RW(cmd, SMBUS_READ);
  266. ret = i2c_smbus_read_block_data(client, smbus_cmd, values);
  267. goto out;
  268. }
  269. ret = 0;
  270. for (index = 0; index * I2C_SMBUS_BLOCK_MAX < len; index++) {
  271. smbus_cmd = SMBUS_ENCODE_IDX(cmd, index);
  272. smbus_cmd = SMBUS_ENCODE_RW(smbus_cmd, SMBUS_READ);
  273. buf = values + I2C_SMBUS_BLOCK_MAX * index;
  274. ret = i2c_smbus_read_block_data(client, smbus_cmd, buf);
  275. if (ret < 0)
  276. goto out;
  277. }
  278. out:
  279. return ret > 0 ? len : ret;
  280. }
  281. static s32 cyapa_read_byte(struct cyapa *cyapa, u8 cmd_idx)
  282. {
  283. u8 cmd;
  284. if (cyapa->smbus) {
  285. cmd = cyapa_smbus_cmds[cmd_idx].cmd;
  286. cmd = SMBUS_ENCODE_RW(cmd, SMBUS_READ);
  287. } else {
  288. cmd = cyapa_i2c_cmds[cmd_idx].cmd;
  289. }
  290. return i2c_smbus_read_byte_data(cyapa->client, cmd);
  291. }
  292. static s32 cyapa_write_byte(struct cyapa *cyapa, u8 cmd_idx, u8 value)
  293. {
  294. u8 cmd;
  295. if (cyapa->smbus) {
  296. cmd = cyapa_smbus_cmds[cmd_idx].cmd;
  297. cmd = SMBUS_ENCODE_RW(cmd, SMBUS_WRITE);
  298. } else {
  299. cmd = cyapa_i2c_cmds[cmd_idx].cmd;
  300. }
  301. return i2c_smbus_write_byte_data(cyapa->client, cmd, value);
  302. }
  303. ssize_t cyapa_i2c_reg_read_block(struct cyapa *cyapa, u8 reg, size_t len,
  304. u8 *values)
  305. {
  306. return i2c_smbus_read_i2c_block_data(cyapa->client, reg, len, values);
  307. }
  308. static ssize_t cyapa_i2c_reg_write_block(struct cyapa *cyapa, u8 reg,
  309. size_t len, const u8 *values)
  310. {
  311. return i2c_smbus_write_i2c_block_data(cyapa->client, reg, len, values);
  312. }
  313. ssize_t cyapa_read_block(struct cyapa *cyapa, u8 cmd_idx, u8 *values)
  314. {
  315. u8 cmd;
  316. size_t len;
  317. if (cyapa->smbus) {
  318. cmd = cyapa_smbus_cmds[cmd_idx].cmd;
  319. len = cyapa_smbus_cmds[cmd_idx].len;
  320. return cyapa_smbus_read_block(cyapa, cmd, len, values);
  321. }
  322. cmd = cyapa_i2c_cmds[cmd_idx].cmd;
  323. len = cyapa_i2c_cmds[cmd_idx].len;
  324. return cyapa_i2c_reg_read_block(cyapa, cmd, len, values);
  325. }
  326. /*
  327. * Determine the Gen3 trackpad device's current operating state.
  328. *
  329. */
  330. static int cyapa_gen3_state_parse(struct cyapa *cyapa, u8 *reg_data, int len)
  331. {
  332. cyapa->state = CYAPA_STATE_NO_DEVICE;
  333. /* Parse based on Gen3 characteristic registers and bits */
  334. if (reg_data[REG_BL_FILE] == BL_FILE &&
  335. reg_data[REG_BL_ERROR] == BL_ERROR_NO_ERR_IDLE &&
  336. (reg_data[REG_BL_STATUS] ==
  337. (BL_STATUS_RUNNING | BL_STATUS_CSUM_VALID) ||
  338. reg_data[REG_BL_STATUS] == BL_STATUS_RUNNING)) {
  339. /*
  340. * Normal state after power on or reset,
  341. * REG_BL_STATUS == 0x11, firmware image checksum is valid.
  342. * REG_BL_STATUS == 0x10, firmware image checksum is invalid.
  343. */
  344. cyapa->gen = CYAPA_GEN3;
  345. cyapa->state = CYAPA_STATE_BL_IDLE;
  346. } else if (reg_data[REG_BL_FILE] == BL_FILE &&
  347. (reg_data[REG_BL_STATUS] & BL_STATUS_RUNNING) ==
  348. BL_STATUS_RUNNING) {
  349. cyapa->gen = CYAPA_GEN3;
  350. if (reg_data[REG_BL_STATUS] & BL_STATUS_BUSY) {
  351. cyapa->state = CYAPA_STATE_BL_BUSY;
  352. } else {
  353. if ((reg_data[REG_BL_ERROR] & BL_ERROR_BOOTLOADING) ==
  354. BL_ERROR_BOOTLOADING)
  355. cyapa->state = CYAPA_STATE_BL_ACTIVE;
  356. else
  357. cyapa->state = CYAPA_STATE_BL_IDLE;
  358. }
  359. } else if ((reg_data[REG_OP_STATUS] & OP_STATUS_SRC) &&
  360. (reg_data[REG_OP_DATA1] & OP_DATA_VALID)) {
  361. /*
  362. * Normal state when running in operational mode,
  363. * may also not in full power state or
  364. * busying in command process.
  365. */
  366. if (GEN3_FINGER_NUM(reg_data[REG_OP_DATA1]) <=
  367. GEN3_MAX_FINGERS) {
  368. /* Finger number data is valid. */
  369. cyapa->gen = CYAPA_GEN3;
  370. cyapa->state = CYAPA_STATE_OP;
  371. }
  372. } else if (reg_data[REG_OP_STATUS] == 0x0C &&
  373. reg_data[REG_OP_DATA1] == 0x08) {
  374. /* Op state when first two registers overwritten with 0x00 */
  375. cyapa->gen = CYAPA_GEN3;
  376. cyapa->state = CYAPA_STATE_OP;
  377. } else if (reg_data[REG_BL_STATUS] &
  378. (BL_STATUS_RUNNING | BL_STATUS_BUSY)) {
  379. cyapa->gen = CYAPA_GEN3;
  380. cyapa->state = CYAPA_STATE_BL_BUSY;
  381. }
  382. if (cyapa->gen == CYAPA_GEN3 && (cyapa->state == CYAPA_STATE_OP ||
  383. cyapa->state == CYAPA_STATE_BL_IDLE ||
  384. cyapa->state == CYAPA_STATE_BL_ACTIVE ||
  385. cyapa->state == CYAPA_STATE_BL_BUSY))
  386. return 0;
  387. return -EAGAIN;
  388. }
  389. /*
  390. * Enter bootloader by soft resetting the device.
  391. *
  392. * If device is already in the bootloader, the function just returns.
  393. * Otherwise, reset the device; after reset, device enters bootloader idle
  394. * state immediately.
  395. *
  396. * Returns:
  397. * 0 on success
  398. * -EAGAIN device was reset, but is not now in bootloader idle state
  399. * < 0 if the device never responds within the timeout
  400. */
  401. static int cyapa_gen3_bl_enter(struct cyapa *cyapa)
  402. {
  403. int error;
  404. int waiting_time;
  405. error = cyapa_poll_state(cyapa, 500);
  406. if (error)
  407. return error;
  408. if (cyapa->state == CYAPA_STATE_BL_IDLE) {
  409. /* Already in BL_IDLE. Skipping reset. */
  410. return 0;
  411. }
  412. if (cyapa->state != CYAPA_STATE_OP)
  413. return -EAGAIN;
  414. cyapa->operational = false;
  415. cyapa->state = CYAPA_STATE_NO_DEVICE;
  416. error = cyapa_write_byte(cyapa, CYAPA_CMD_SOFT_RESET, 0x01);
  417. if (error)
  418. return -EIO;
  419. usleep_range(25000, 50000);
  420. waiting_time = 2000; /* For some shipset, max waiting time is 1~2s. */
  421. do {
  422. error = cyapa_poll_state(cyapa, 500);
  423. if (error) {
  424. if (error == -ETIMEDOUT) {
  425. waiting_time -= 500;
  426. continue;
  427. }
  428. return error;
  429. }
  430. if ((cyapa->state == CYAPA_STATE_BL_IDLE) &&
  431. !(cyapa->status[REG_BL_STATUS] & BL_STATUS_WATCHDOG))
  432. break;
  433. msleep(100);
  434. waiting_time -= 100;
  435. } while (waiting_time > 0);
  436. if ((cyapa->state != CYAPA_STATE_BL_IDLE) ||
  437. (cyapa->status[REG_BL_STATUS] & BL_STATUS_WATCHDOG))
  438. return -EAGAIN;
  439. return 0;
  440. }
  441. static int cyapa_gen3_bl_activate(struct cyapa *cyapa)
  442. {
  443. int error;
  444. error = cyapa_i2c_reg_write_block(cyapa, 0, sizeof(bl_activate),
  445. bl_activate);
  446. if (error)
  447. return error;
  448. /* Wait for bootloader to activate; takes between 2 and 12 seconds */
  449. msleep(2000);
  450. error = cyapa_poll_state(cyapa, 11000);
  451. if (error)
  452. return error;
  453. if (cyapa->state != CYAPA_STATE_BL_ACTIVE)
  454. return -EAGAIN;
  455. return 0;
  456. }
  457. static int cyapa_gen3_bl_deactivate(struct cyapa *cyapa)
  458. {
  459. int error;
  460. error = cyapa_i2c_reg_write_block(cyapa, 0, sizeof(bl_deactivate),
  461. bl_deactivate);
  462. if (error)
  463. return error;
  464. /* Wait for bootloader to switch to idle state; should take < 100ms */
  465. msleep(100);
  466. error = cyapa_poll_state(cyapa, 500);
  467. if (error)
  468. return error;
  469. if (cyapa->state != CYAPA_STATE_BL_IDLE)
  470. return -EAGAIN;
  471. return 0;
  472. }
  473. /*
  474. * Exit bootloader
  475. *
  476. * Send bl_exit command, then wait 50 - 100 ms to let device transition to
  477. * operational mode. If this is the first time the device's firmware is
  478. * running, it can take up to 2 seconds to calibrate its sensors. So, poll
  479. * the device's new state for up to 2 seconds.
  480. *
  481. * Returns:
  482. * -EIO failure while reading from device
  483. * -EAGAIN device is stuck in bootloader, b/c it has invalid firmware
  484. * 0 device is supported and in operational mode
  485. */
  486. static int cyapa_gen3_bl_exit(struct cyapa *cyapa)
  487. {
  488. int error;
  489. error = cyapa_i2c_reg_write_block(cyapa, 0, sizeof(bl_exit), bl_exit);
  490. if (error)
  491. return error;
  492. /*
  493. * Wait for bootloader to exit, and operation mode to start.
  494. * Normally, this takes at least 50 ms.
  495. */
  496. usleep_range(50000, 100000);
  497. /*
  498. * In addition, when a device boots for the first time after being
  499. * updated to new firmware, it must first calibrate its sensors, which
  500. * can take up to an additional 2 seconds. If the device power is
  501. * running low, this may take even longer.
  502. */
  503. error = cyapa_poll_state(cyapa, 4000);
  504. if (error < 0)
  505. return error;
  506. if (cyapa->state != CYAPA_STATE_OP)
  507. return -EAGAIN;
  508. return 0;
  509. }
  510. static u16 cyapa_gen3_csum(const u8 *buf, size_t count)
  511. {
  512. int i;
  513. u16 csum = 0;
  514. for (i = 0; i < count; i++)
  515. csum += buf[i];
  516. return csum;
  517. }
  518. /*
  519. * Verify the integrity of a CYAPA firmware image file.
  520. *
  521. * The firmware image file is 30848 bytes, composed of 482 64-byte blocks.
  522. *
  523. * The first 2 blocks are the firmware header.
  524. * The next 480 blocks are the firmware image.
  525. *
  526. * The first two bytes of the header hold the header checksum, computed by
  527. * summing the other 126 bytes of the header.
  528. * The last two bytes of the header hold the firmware image checksum, computed
  529. * by summing the 30720 bytes of the image modulo 0xffff.
  530. *
  531. * Both checksums are stored little-endian.
  532. */
  533. static int cyapa_gen3_check_fw(struct cyapa *cyapa, const struct firmware *fw)
  534. {
  535. struct device *dev = &cyapa->client->dev;
  536. u16 csum;
  537. u16 csum_expected;
  538. /* Firmware must match exact 30848 bytes = 482 64-byte blocks. */
  539. if (fw->size != CYAPA_FW_SIZE) {
  540. dev_err(dev, "invalid firmware size = %zu, expected %u.\n",
  541. fw->size, CYAPA_FW_SIZE);
  542. return -EINVAL;
  543. }
  544. /* Verify header block */
  545. csum_expected = (fw->data[0] << 8) | fw->data[1];
  546. csum = cyapa_gen3_csum(&fw->data[2], CYAPA_FW_HDR_SIZE - 2);
  547. if (csum != csum_expected) {
  548. dev_err(dev, "%s %04x, expected: %04x\n",
  549. "invalid firmware header checksum = ",
  550. csum, csum_expected);
  551. return -EINVAL;
  552. }
  553. /* Verify firmware image */
  554. csum_expected = (fw->data[CYAPA_FW_HDR_SIZE - 2] << 8) |
  555. fw->data[CYAPA_FW_HDR_SIZE - 1];
  556. csum = cyapa_gen3_csum(&fw->data[CYAPA_FW_HDR_SIZE],
  557. CYAPA_FW_DATA_SIZE);
  558. if (csum != csum_expected) {
  559. dev_err(dev, "%s %04x, expected: %04x\n",
  560. "invalid firmware header checksum = ",
  561. csum, csum_expected);
  562. return -EINVAL;
  563. }
  564. return 0;
  565. }
  566. /*
  567. * Write a |len| byte long buffer |buf| to the device, by chopping it up into a
  568. * sequence of smaller |CYAPA_CMD_LEN|-length write commands.
  569. *
  570. * The data bytes for a write command are prepended with the 1-byte offset
  571. * of the data relative to the start of |buf|.
  572. */
  573. static int cyapa_gen3_write_buffer(struct cyapa *cyapa,
  574. const u8 *buf, size_t len)
  575. {
  576. int error;
  577. size_t i;
  578. unsigned char cmd[CYAPA_CMD_LEN + 1];
  579. size_t cmd_len;
  580. for (i = 0; i < len; i += CYAPA_CMD_LEN) {
  581. const u8 *payload = &buf[i];
  582. cmd_len = (len - i >= CYAPA_CMD_LEN) ? CYAPA_CMD_LEN : len - i;
  583. cmd[0] = i;
  584. memcpy(&cmd[1], payload, cmd_len);
  585. error = cyapa_i2c_reg_write_block(cyapa, 0, cmd_len + 1, cmd);
  586. if (error)
  587. return error;
  588. }
  589. return 0;
  590. }
  591. /*
  592. * A firmware block write command writes 64 bytes of data to a single flash
  593. * page in the device. The 78-byte block write command has the format:
  594. * <0xff> <CMD> <Key> <Start> <Data> <Data-Checksum> <CMD Checksum>
  595. *
  596. * <0xff> - every command starts with 0xff
  597. * <CMD> - the write command value is 0x39
  598. * <Key> - write commands include an 8-byte key: { 00 01 02 03 04 05 06 07 }
  599. * <Block> - Memory Block number (address / 64) (16-bit, big-endian)
  600. * <Data> - 64 bytes of firmware image data
  601. * <Data Checksum> - sum of 64 <Data> bytes, modulo 0xff
  602. * <CMD Checksum> - sum of 77 bytes, from 0xff to <Data Checksum>
  603. *
  604. * Each write command is split into 5 i2c write transactions of up to 16 bytes.
  605. * Each transaction starts with an i2c register offset: (00, 10, 20, 30, 40).
  606. */
  607. static int cyapa_gen3_write_fw_block(struct cyapa *cyapa,
  608. u16 block, const u8 *data)
  609. {
  610. int ret;
  611. struct gen3_write_block_cmd write_block_cmd;
  612. u8 status[BL_STATUS_SIZE];
  613. int tries;
  614. u8 bl_status, bl_error;
  615. /* Set write command and security key bytes. */
  616. write_block_cmd.checksum_seed = GEN3_BL_CMD_CHECKSUM_SEED;
  617. write_block_cmd.cmd_code = GEN3_BL_CMD_WRITE_BLOCK;
  618. memcpy(write_block_cmd.key, security_key, sizeof(security_key));
  619. put_unaligned_be16(block, &write_block_cmd.block_num);
  620. memcpy(write_block_cmd.block_data, data, CYAPA_FW_BLOCK_SIZE);
  621. write_block_cmd.block_checksum = cyapa_gen3_csum(
  622. write_block_cmd.block_data, CYAPA_FW_BLOCK_SIZE);
  623. write_block_cmd.cmd_checksum = cyapa_gen3_csum((u8 *)&write_block_cmd,
  624. sizeof(write_block_cmd) - 1);
  625. ret = cyapa_gen3_write_buffer(cyapa, (u8 *)&write_block_cmd,
  626. sizeof(write_block_cmd));
  627. if (ret)
  628. return ret;
  629. /* Wait for write to finish */
  630. tries = 11; /* Programming for one block can take about 100ms. */
  631. do {
  632. usleep_range(10000, 20000);
  633. /* Check block write command result status. */
  634. ret = cyapa_i2c_reg_read_block(cyapa, BL_HEAD_OFFSET,
  635. BL_STATUS_SIZE, status);
  636. if (ret != BL_STATUS_SIZE)
  637. return (ret < 0) ? ret : -EIO;
  638. } while ((status[REG_BL_STATUS] & BL_STATUS_BUSY) && --tries);
  639. /* Ignore WATCHDOG bit and reserved bits. */
  640. bl_status = status[REG_BL_STATUS] & ~BL_STATUS_REV_MASK;
  641. bl_error = status[REG_BL_ERROR] & ~BL_ERROR_RESERVED;
  642. if (bl_status & BL_STATUS_BUSY)
  643. ret = -ETIMEDOUT;
  644. else if (bl_status != BL_STATUS_RUNNING ||
  645. bl_error != BL_ERROR_BOOTLOADING)
  646. ret = -EIO;
  647. else
  648. ret = 0;
  649. return ret;
  650. }
  651. static int cyapa_gen3_write_blocks(struct cyapa *cyapa,
  652. size_t start_block, size_t block_count,
  653. const u8 *image_data)
  654. {
  655. int error;
  656. int i;
  657. for (i = 0; i < block_count; i++) {
  658. size_t block = start_block + i;
  659. size_t addr = i * CYAPA_FW_BLOCK_SIZE;
  660. const u8 *data = &image_data[addr];
  661. error = cyapa_gen3_write_fw_block(cyapa, block, data);
  662. if (error)
  663. return error;
  664. }
  665. return 0;
  666. }
  667. static int cyapa_gen3_do_fw_update(struct cyapa *cyapa,
  668. const struct firmware *fw)
  669. {
  670. struct device *dev = &cyapa->client->dev;
  671. int error;
  672. /* First write data, starting at byte 128 of fw->data */
  673. error = cyapa_gen3_write_blocks(cyapa,
  674. CYAPA_FW_DATA_BLOCK_START, CYAPA_FW_DATA_BLOCK_COUNT,
  675. &fw->data[CYAPA_FW_HDR_BLOCK_COUNT * CYAPA_FW_BLOCK_SIZE]);
  676. if (error) {
  677. dev_err(dev, "FW update aborted, write image: %d\n", error);
  678. return error;
  679. }
  680. /* Then write checksum */
  681. error = cyapa_gen3_write_blocks(cyapa,
  682. CYAPA_FW_HDR_BLOCK_START, CYAPA_FW_HDR_BLOCK_COUNT,
  683. &fw->data[0]);
  684. if (error) {
  685. dev_err(dev, "FW update aborted, write checksum: %d\n", error);
  686. return error;
  687. }
  688. return 0;
  689. }
  690. static ssize_t cyapa_gen3_do_calibrate(struct device *dev,
  691. struct device_attribute *attr,
  692. const char *buf, size_t count)
  693. {
  694. struct cyapa *cyapa = dev_get_drvdata(dev);
  695. int tries;
  696. int ret;
  697. ret = cyapa_read_byte(cyapa, CYAPA_CMD_DEV_STATUS);
  698. if (ret < 0) {
  699. dev_err(dev, "Error reading dev status: %d\n", ret);
  700. goto out;
  701. }
  702. if ((ret & CYAPA_DEV_NORMAL) != CYAPA_DEV_NORMAL) {
  703. dev_warn(dev, "Trackpad device is busy, device state: 0x%02x\n",
  704. ret);
  705. ret = -EAGAIN;
  706. goto out;
  707. }
  708. ret = cyapa_write_byte(cyapa, CYAPA_CMD_SOFT_RESET,
  709. OP_RECALIBRATION_MASK);
  710. if (ret < 0) {
  711. dev_err(dev, "Failed to send calibrate command: %d\n",
  712. ret);
  713. goto out;
  714. }
  715. tries = 20; /* max recalibration timeout 2s. */
  716. do {
  717. /*
  718. * For this recalibration, the max time will not exceed 2s.
  719. * The average time is approximately 500 - 700 ms, and we
  720. * will check the status every 100 - 200ms.
  721. */
  722. usleep_range(100000, 200000);
  723. ret = cyapa_read_byte(cyapa, CYAPA_CMD_DEV_STATUS);
  724. if (ret < 0) {
  725. dev_err(dev, "Error reading dev status: %d\n",
  726. ret);
  727. goto out;
  728. }
  729. if ((ret & CYAPA_DEV_NORMAL) == CYAPA_DEV_NORMAL)
  730. break;
  731. } while (--tries);
  732. if (tries == 0) {
  733. dev_err(dev, "Failed to calibrate. Timeout.\n");
  734. ret = -ETIMEDOUT;
  735. goto out;
  736. }
  737. dev_dbg(dev, "Calibration successful.\n");
  738. out:
  739. return ret < 0 ? ret : count;
  740. }
  741. static ssize_t cyapa_gen3_show_baseline(struct device *dev,
  742. struct device_attribute *attr, char *buf)
  743. {
  744. struct cyapa *cyapa = dev_get_drvdata(dev);
  745. int max_baseline, min_baseline;
  746. int tries;
  747. int ret;
  748. ret = cyapa_read_byte(cyapa, CYAPA_CMD_DEV_STATUS);
  749. if (ret < 0) {
  750. dev_err(dev, "Error reading dev status. err = %d\n", ret);
  751. goto out;
  752. }
  753. if ((ret & CYAPA_DEV_NORMAL) != CYAPA_DEV_NORMAL) {
  754. dev_warn(dev, "Trackpad device is busy. device state = 0x%x\n",
  755. ret);
  756. ret = -EAGAIN;
  757. goto out;
  758. }
  759. ret = cyapa_write_byte(cyapa, CYAPA_CMD_SOFT_RESET,
  760. OP_REPORT_BASELINE_MASK);
  761. if (ret < 0) {
  762. dev_err(dev, "Failed to send report baseline command. %d\n",
  763. ret);
  764. goto out;
  765. }
  766. tries = 3; /* Try for 30 to 60 ms */
  767. do {
  768. usleep_range(10000, 20000);
  769. ret = cyapa_read_byte(cyapa, CYAPA_CMD_DEV_STATUS);
  770. if (ret < 0) {
  771. dev_err(dev, "Error reading dev status. err = %d\n",
  772. ret);
  773. goto out;
  774. }
  775. if ((ret & CYAPA_DEV_NORMAL) == CYAPA_DEV_NORMAL)
  776. break;
  777. } while (--tries);
  778. if (tries == 0) {
  779. dev_err(dev, "Device timed out going to Normal state.\n");
  780. ret = -ETIMEDOUT;
  781. goto out;
  782. }
  783. ret = cyapa_read_byte(cyapa, CYAPA_CMD_MAX_BASELINE);
  784. if (ret < 0) {
  785. dev_err(dev, "Failed to read max baseline. err = %d\n", ret);
  786. goto out;
  787. }
  788. max_baseline = ret;
  789. ret = cyapa_read_byte(cyapa, CYAPA_CMD_MIN_BASELINE);
  790. if (ret < 0) {
  791. dev_err(dev, "Failed to read min baseline. err = %d\n", ret);
  792. goto out;
  793. }
  794. min_baseline = ret;
  795. dev_dbg(dev, "Baseline report successful. Max: %d Min: %d\n",
  796. max_baseline, min_baseline);
  797. ret = scnprintf(buf, PAGE_SIZE, "%d %d\n", max_baseline, min_baseline);
  798. out:
  799. return ret;
  800. }
  801. /*
  802. * cyapa_get_wait_time_for_pwr_cmd
  803. *
  804. * Compute the amount of time we need to wait after updating the touchpad
  805. * power mode. The touchpad needs to consume the incoming power mode set
  806. * command at the current clock rate.
  807. */
  808. static u16 cyapa_get_wait_time_for_pwr_cmd(u8 pwr_mode)
  809. {
  810. switch (pwr_mode) {
  811. case PWR_MODE_FULL_ACTIVE: return 20;
  812. case PWR_MODE_BTN_ONLY: return 20;
  813. case PWR_MODE_OFF: return 20;
  814. default: return cyapa_pwr_cmd_to_sleep_time(pwr_mode) + 50;
  815. }
  816. }
  817. /*
  818. * Set device power mode
  819. *
  820. * Write to the field to configure power state. Power states include :
  821. * Full : Max scans and report rate.
  822. * Idle : Report rate set by user specified time.
  823. * ButtonOnly : No scans for fingers. When the button is triggered,
  824. * a slave interrupt is asserted to notify host to wake up.
  825. * Off : Only awake for i2c commands from host. No function for button
  826. * or touch sensors.
  827. *
  828. * The power_mode command should conform to the following :
  829. * Full : 0x3f
  830. * Idle : Configurable from 20 to 1000ms. See note below for
  831. * cyapa_sleep_time_to_pwr_cmd and cyapa_pwr_cmd_to_sleep_time
  832. * ButtonOnly : 0x01
  833. * Off : 0x00
  834. *
  835. * Device power mode can only be set when device is in operational mode.
  836. */
  837. static int cyapa_gen3_set_power_mode(struct cyapa *cyapa, u8 power_mode,
  838. u16 always_unused, bool is_suspend_unused)
  839. {
  840. int ret;
  841. u8 power;
  842. int tries;
  843. u16 sleep_time;
  844. if (cyapa->state != CYAPA_STATE_OP)
  845. return 0;
  846. tries = SET_POWER_MODE_TRIES;
  847. while (tries--) {
  848. ret = cyapa_read_byte(cyapa, CYAPA_CMD_POWER_MODE);
  849. if (ret >= 0)
  850. break;
  851. usleep_range(SET_POWER_MODE_DELAY, 2 * SET_POWER_MODE_DELAY);
  852. }
  853. if (ret < 0)
  854. return ret;
  855. /*
  856. * Return early if the power mode to set is the same as the current
  857. * one.
  858. */
  859. if ((ret & PWR_MODE_MASK) == power_mode)
  860. return 0;
  861. sleep_time = cyapa_get_wait_time_for_pwr_cmd(ret & PWR_MODE_MASK);
  862. power = ret;
  863. power &= ~PWR_MODE_MASK;
  864. power |= power_mode & PWR_MODE_MASK;
  865. tries = SET_POWER_MODE_TRIES;
  866. while (tries--) {
  867. ret = cyapa_write_byte(cyapa, CYAPA_CMD_POWER_MODE, power);
  868. if (!ret)
  869. break;
  870. usleep_range(SET_POWER_MODE_DELAY, 2 * SET_POWER_MODE_DELAY);
  871. }
  872. /*
  873. * Wait for the newly set power command to go in at the previous
  874. * clock speed (scanrate) used by the touchpad firmware. Not
  875. * doing so before issuing the next command may result in errors
  876. * depending on the command's content.
  877. */
  878. msleep(sleep_time);
  879. return ret;
  880. }
  881. static int cyapa_gen3_set_proximity(struct cyapa *cyapa, bool enable)
  882. {
  883. return -EOPNOTSUPP;
  884. }
  885. static int cyapa_gen3_get_query_data(struct cyapa *cyapa)
  886. {
  887. u8 query_data[QUERY_DATA_SIZE];
  888. int ret;
  889. if (cyapa->state != CYAPA_STATE_OP)
  890. return -EBUSY;
  891. ret = cyapa_read_block(cyapa, CYAPA_CMD_GROUP_QUERY, query_data);
  892. if (ret != QUERY_DATA_SIZE)
  893. return (ret < 0) ? ret : -EIO;
  894. memcpy(&cyapa->product_id[0], &query_data[0], 5);
  895. cyapa->product_id[5] = '-';
  896. memcpy(&cyapa->product_id[6], &query_data[5], 6);
  897. cyapa->product_id[12] = '-';
  898. memcpy(&cyapa->product_id[13], &query_data[11], 2);
  899. cyapa->product_id[15] = '\0';
  900. cyapa->fw_maj_ver = query_data[15];
  901. cyapa->fw_min_ver = query_data[16];
  902. cyapa->btn_capability = query_data[19] & CAPABILITY_BTN_MASK;
  903. cyapa->gen = query_data[20] & 0x0f;
  904. cyapa->max_abs_x = ((query_data[21] & 0xf0) << 4) | query_data[22];
  905. cyapa->max_abs_y = ((query_data[21] & 0x0f) << 8) | query_data[23];
  906. cyapa->physical_size_x =
  907. ((query_data[24] & 0xf0) << 4) | query_data[25];
  908. cyapa->physical_size_y =
  909. ((query_data[24] & 0x0f) << 8) | query_data[26];
  910. cyapa->max_z = 255;
  911. return 0;
  912. }
  913. static int cyapa_gen3_bl_query_data(struct cyapa *cyapa)
  914. {
  915. u8 bl_data[CYAPA_CMD_LEN];
  916. int ret;
  917. ret = cyapa_i2c_reg_read_block(cyapa, 0, CYAPA_CMD_LEN, bl_data);
  918. if (ret != CYAPA_CMD_LEN)
  919. return (ret < 0) ? ret : -EIO;
  920. /*
  921. * This value will be updated again when entered application mode.
  922. * If TP failed to enter application mode, this fw version values
  923. * can be used as a reference.
  924. * This firmware version valid when fw image checksum is valid.
  925. */
  926. if (bl_data[REG_BL_STATUS] ==
  927. (BL_STATUS_RUNNING | BL_STATUS_CSUM_VALID)) {
  928. cyapa->fw_maj_ver = bl_data[GEN3_BL_IDLE_FW_MAJ_VER_OFFSET];
  929. cyapa->fw_min_ver = bl_data[GEN3_BL_IDLE_FW_MIN_VER_OFFSET];
  930. }
  931. return 0;
  932. }
  933. /*
  934. * Check if device is operational.
  935. *
  936. * An operational device is responding, has exited bootloader, and has
  937. * firmware supported by this driver.
  938. *
  939. * Returns:
  940. * -EBUSY no device or in bootloader
  941. * -EIO failure while reading from device
  942. * -EAGAIN device is still in bootloader
  943. * if ->state = CYAPA_STATE_BL_IDLE, device has invalid firmware
  944. * -EINVAL device is in operational mode, but not supported by this driver
  945. * 0 device is supported
  946. */
  947. static int cyapa_gen3_do_operational_check(struct cyapa *cyapa)
  948. {
  949. struct device *dev = &cyapa->client->dev;
  950. int error;
  951. switch (cyapa->state) {
  952. case CYAPA_STATE_BL_ACTIVE:
  953. error = cyapa_gen3_bl_deactivate(cyapa);
  954. if (error) {
  955. dev_err(dev, "failed to bl_deactivate: %d\n", error);
  956. return error;
  957. }
  958. /* Fallthrough state */
  959. case CYAPA_STATE_BL_IDLE:
  960. /* Try to get firmware version in bootloader mode. */
  961. cyapa_gen3_bl_query_data(cyapa);
  962. error = cyapa_gen3_bl_exit(cyapa);
  963. if (error) {
  964. dev_err(dev, "failed to bl_exit: %d\n", error);
  965. return error;
  966. }
  967. /* Fallthrough state */
  968. case CYAPA_STATE_OP:
  969. /*
  970. * Reading query data before going back to the full mode
  971. * may cause problems, so we set the power mode first here.
  972. */
  973. error = cyapa_gen3_set_power_mode(cyapa,
  974. PWR_MODE_FULL_ACTIVE, 0, false);
  975. if (error)
  976. dev_err(dev, "%s: set full power mode failed: %d\n",
  977. __func__, error);
  978. error = cyapa_gen3_get_query_data(cyapa);
  979. if (error < 0)
  980. return error;
  981. /* Only support firmware protocol gen3 */
  982. if (cyapa->gen != CYAPA_GEN3) {
  983. dev_err(dev, "unsupported protocol version (%d)",
  984. cyapa->gen);
  985. return -EINVAL;
  986. }
  987. /* Only support product ID starting with CYTRA */
  988. if (memcmp(cyapa->product_id, product_id,
  989. strlen(product_id)) != 0) {
  990. dev_err(dev, "unsupported product ID (%s)\n",
  991. cyapa->product_id);
  992. return -EINVAL;
  993. }
  994. return 0;
  995. default:
  996. return -EIO;
  997. }
  998. return 0;
  999. }
  1000. /*
  1001. * Return false, do not continue process
  1002. * Return true, continue process.
  1003. */
  1004. static bool cyapa_gen3_irq_cmd_handler(struct cyapa *cyapa)
  1005. {
  1006. /* Not gen3 irq command response, skip for continue. */
  1007. if (cyapa->gen != CYAPA_GEN3)
  1008. return true;
  1009. if (cyapa->operational)
  1010. return true;
  1011. /*
  1012. * Driver in detecting or other interface function processing,
  1013. * so, stop cyapa_gen3_irq_handler to continue process to
  1014. * avoid unwanted to error detecting and processing.
  1015. *
  1016. * And also, avoid the periodically asserted interrupts to be processed
  1017. * as touch inputs when gen3 failed to launch into application mode,
  1018. * which will cause gen3 stays in bootloader mode.
  1019. */
  1020. return false;
  1021. }
  1022. static int cyapa_gen3_irq_handler(struct cyapa *cyapa)
  1023. {
  1024. struct input_dev *input = cyapa->input;
  1025. struct device *dev = &cyapa->client->dev;
  1026. struct cyapa_reg_data data;
  1027. int num_fingers;
  1028. int ret;
  1029. int i;
  1030. ret = cyapa_read_block(cyapa, CYAPA_CMD_GROUP_DATA, (u8 *)&data);
  1031. if (ret != sizeof(data)) {
  1032. dev_err(dev, "failed to read report data, (%d)\n", ret);
  1033. return -EINVAL;
  1034. }
  1035. if ((data.device_status & OP_STATUS_SRC) != OP_STATUS_SRC ||
  1036. (data.device_status & OP_STATUS_DEV) != CYAPA_DEV_NORMAL ||
  1037. (data.finger_btn & OP_DATA_VALID) != OP_DATA_VALID) {
  1038. dev_err(dev, "invalid device state bytes, %02x %02x\n",
  1039. data.device_status, data.finger_btn);
  1040. return -EINVAL;
  1041. }
  1042. num_fingers = (data.finger_btn >> 4) & 0x0f;
  1043. for (i = 0; i < num_fingers; i++) {
  1044. const struct cyapa_touch *touch = &data.touches[i];
  1045. /* Note: touch->id range is 1 to 15; slots are 0 to 14. */
  1046. int slot = touch->id - 1;
  1047. input_mt_slot(input, slot);
  1048. input_mt_report_slot_state(input, MT_TOOL_FINGER, true);
  1049. input_report_abs(input, ABS_MT_POSITION_X,
  1050. ((touch->xy_hi & 0xf0) << 4) | touch->x_lo);
  1051. input_report_abs(input, ABS_MT_POSITION_Y,
  1052. ((touch->xy_hi & 0x0f) << 8) | touch->y_lo);
  1053. input_report_abs(input, ABS_MT_PRESSURE, touch->pressure);
  1054. }
  1055. input_mt_sync_frame(input);
  1056. if (cyapa->btn_capability & CAPABILITY_LEFT_BTN_MASK)
  1057. input_report_key(input, BTN_LEFT,
  1058. !!(data.finger_btn & OP_DATA_LEFT_BTN));
  1059. if (cyapa->btn_capability & CAPABILITY_MIDDLE_BTN_MASK)
  1060. input_report_key(input, BTN_MIDDLE,
  1061. !!(data.finger_btn & OP_DATA_MIDDLE_BTN));
  1062. if (cyapa->btn_capability & CAPABILITY_RIGHT_BTN_MASK)
  1063. input_report_key(input, BTN_RIGHT,
  1064. !!(data.finger_btn & OP_DATA_RIGHT_BTN));
  1065. input_sync(input);
  1066. return 0;
  1067. }
  1068. static int cyapa_gen3_initialize(struct cyapa *cyapa) { return 0; }
  1069. static int cyapa_gen3_bl_initiate(struct cyapa *cyapa,
  1070. const struct firmware *fw) { return 0; }
  1071. static int cyapa_gen3_empty_output_data(struct cyapa *cyapa,
  1072. u8 *buf, int *len, cb_sort func) { return 0; }
  1073. const struct cyapa_dev_ops cyapa_gen3_ops = {
  1074. .check_fw = cyapa_gen3_check_fw,
  1075. .bl_enter = cyapa_gen3_bl_enter,
  1076. .bl_activate = cyapa_gen3_bl_activate,
  1077. .update_fw = cyapa_gen3_do_fw_update,
  1078. .bl_deactivate = cyapa_gen3_bl_deactivate,
  1079. .bl_initiate = cyapa_gen3_bl_initiate,
  1080. .show_baseline = cyapa_gen3_show_baseline,
  1081. .calibrate_store = cyapa_gen3_do_calibrate,
  1082. .initialize = cyapa_gen3_initialize,
  1083. .state_parse = cyapa_gen3_state_parse,
  1084. .operational_check = cyapa_gen3_do_operational_check,
  1085. .irq_handler = cyapa_gen3_irq_handler,
  1086. .irq_cmd_handler = cyapa_gen3_irq_cmd_handler,
  1087. .sort_empty_output_data = cyapa_gen3_empty_output_data,
  1088. .set_power_mode = cyapa_gen3_set_power_mode,
  1089. .set_proximity = cyapa_gen3_set_proximity,
  1090. };