imx6ul_tsc.c 13 KB

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  1. /*
  2. * Freescale i.MX6UL touchscreen controller driver
  3. *
  4. * Copyright (C) 2015 Freescale Semiconductor, Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/errno.h>
  11. #include <linux/kernel.h>
  12. #include <linux/module.h>
  13. #include <linux/gpio/consumer.h>
  14. #include <linux/input.h>
  15. #include <linux/slab.h>
  16. #include <linux/completion.h>
  17. #include <linux/delay.h>
  18. #include <linux/of.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/clk.h>
  22. #include <linux/io.h>
  23. /* ADC configuration registers field define */
  24. #define ADC_AIEN (0x1 << 7)
  25. #define ADC_CONV_DISABLE 0x1F
  26. #define ADC_CAL (0x1 << 7)
  27. #define ADC_CALF 0x2
  28. #define ADC_12BIT_MODE (0x2 << 2)
  29. #define ADC_IPG_CLK 0x00
  30. #define ADC_CLK_DIV_8 (0x03 << 5)
  31. #define ADC_SHORT_SAMPLE_MODE (0x0 << 4)
  32. #define ADC_HARDWARE_TRIGGER (0x1 << 13)
  33. #define SELECT_CHANNEL_4 0x04
  34. #define SELECT_CHANNEL_1 0x01
  35. #define DISABLE_CONVERSION_INT (0x0 << 7)
  36. /* ADC registers */
  37. #define REG_ADC_HC0 0x00
  38. #define REG_ADC_HC1 0x04
  39. #define REG_ADC_HC2 0x08
  40. #define REG_ADC_HC3 0x0C
  41. #define REG_ADC_HC4 0x10
  42. #define REG_ADC_HS 0x14
  43. #define REG_ADC_R0 0x18
  44. #define REG_ADC_CFG 0x2C
  45. #define REG_ADC_GC 0x30
  46. #define REG_ADC_GS 0x34
  47. #define ADC_TIMEOUT msecs_to_jiffies(100)
  48. /* TSC registers */
  49. #define REG_TSC_BASIC_SETING 0x00
  50. #define REG_TSC_PRE_CHARGE_TIME 0x10
  51. #define REG_TSC_FLOW_CONTROL 0x20
  52. #define REG_TSC_MEASURE_VALUE 0x30
  53. #define REG_TSC_INT_EN 0x40
  54. #define REG_TSC_INT_SIG_EN 0x50
  55. #define REG_TSC_INT_STATUS 0x60
  56. #define REG_TSC_DEBUG_MODE 0x70
  57. #define REG_TSC_DEBUG_MODE2 0x80
  58. /* TSC configuration registers field define */
  59. #define DETECT_4_WIRE_MODE (0x0 << 4)
  60. #define AUTO_MEASURE 0x1
  61. #define MEASURE_SIGNAL 0x1
  62. #define DETECT_SIGNAL (0x1 << 4)
  63. #define VALID_SIGNAL (0x1 << 8)
  64. #define MEASURE_INT_EN 0x1
  65. #define MEASURE_SIG_EN 0x1
  66. #define VALID_SIG_EN (0x1 << 8)
  67. #define DE_GLITCH_2 (0x2 << 29)
  68. #define START_SENSE (0x1 << 12)
  69. #define TSC_DISABLE (0x1 << 16)
  70. #define DETECT_MODE 0x2
  71. struct imx6ul_tsc {
  72. struct device *dev;
  73. struct input_dev *input;
  74. void __iomem *tsc_regs;
  75. void __iomem *adc_regs;
  76. struct clk *tsc_clk;
  77. struct clk *adc_clk;
  78. struct gpio_desc *xnur_gpio;
  79. int measure_delay_time;
  80. int pre_charge_time;
  81. struct completion completion;
  82. };
  83. /*
  84. * TSC module need ADC to get the measure value. So
  85. * before config TSC, we should initialize ADC module.
  86. */
  87. static int imx6ul_adc_init(struct imx6ul_tsc *tsc)
  88. {
  89. int adc_hc = 0;
  90. int adc_gc;
  91. int adc_gs;
  92. int adc_cfg;
  93. int timeout;
  94. reinit_completion(&tsc->completion);
  95. adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
  96. adc_cfg |= ADC_12BIT_MODE | ADC_IPG_CLK;
  97. adc_cfg |= ADC_CLK_DIV_8 | ADC_SHORT_SAMPLE_MODE;
  98. adc_cfg &= ~ADC_HARDWARE_TRIGGER;
  99. writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
  100. /* enable calibration interrupt */
  101. adc_hc |= ADC_AIEN;
  102. adc_hc |= ADC_CONV_DISABLE;
  103. writel(adc_hc, tsc->adc_regs + REG_ADC_HC0);
  104. /* start ADC calibration */
  105. adc_gc = readl(tsc->adc_regs + REG_ADC_GC);
  106. adc_gc |= ADC_CAL;
  107. writel(adc_gc, tsc->adc_regs + REG_ADC_GC);
  108. timeout = wait_for_completion_timeout
  109. (&tsc->completion, ADC_TIMEOUT);
  110. if (timeout == 0) {
  111. dev_err(tsc->dev, "Timeout for adc calibration\n");
  112. return -ETIMEDOUT;
  113. }
  114. adc_gs = readl(tsc->adc_regs + REG_ADC_GS);
  115. if (adc_gs & ADC_CALF) {
  116. dev_err(tsc->dev, "ADC calibration failed\n");
  117. return -EINVAL;
  118. }
  119. /* TSC need the ADC work in hardware trigger */
  120. adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
  121. adc_cfg |= ADC_HARDWARE_TRIGGER;
  122. writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
  123. return 0;
  124. }
  125. /*
  126. * This is a TSC workaround. Currently TSC misconnect two
  127. * ADC channels, this function remap channel configure for
  128. * hardware trigger.
  129. */
  130. static void imx6ul_tsc_channel_config(struct imx6ul_tsc *tsc)
  131. {
  132. int adc_hc0, adc_hc1, adc_hc2, adc_hc3, adc_hc4;
  133. adc_hc0 = DISABLE_CONVERSION_INT;
  134. writel(adc_hc0, tsc->adc_regs + REG_ADC_HC0);
  135. adc_hc1 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_4;
  136. writel(adc_hc1, tsc->adc_regs + REG_ADC_HC1);
  137. adc_hc2 = DISABLE_CONVERSION_INT;
  138. writel(adc_hc2, tsc->adc_regs + REG_ADC_HC2);
  139. adc_hc3 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_1;
  140. writel(adc_hc3, tsc->adc_regs + REG_ADC_HC3);
  141. adc_hc4 = DISABLE_CONVERSION_INT;
  142. writel(adc_hc4, tsc->adc_regs + REG_ADC_HC4);
  143. }
  144. /*
  145. * TSC setting, confige the pre-charge time and measure delay time.
  146. * different touch screen may need different pre-charge time and
  147. * measure delay time.
  148. */
  149. static void imx6ul_tsc_set(struct imx6ul_tsc *tsc)
  150. {
  151. int basic_setting = 0;
  152. int start;
  153. basic_setting |= tsc->measure_delay_time << 8;
  154. basic_setting |= DETECT_4_WIRE_MODE | AUTO_MEASURE;
  155. writel(basic_setting, tsc->tsc_regs + REG_TSC_BASIC_SETING);
  156. writel(DE_GLITCH_2, tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
  157. writel(tsc->pre_charge_time, tsc->tsc_regs + REG_TSC_PRE_CHARGE_TIME);
  158. writel(MEASURE_INT_EN, tsc->tsc_regs + REG_TSC_INT_EN);
  159. writel(MEASURE_SIG_EN | VALID_SIG_EN,
  160. tsc->tsc_regs + REG_TSC_INT_SIG_EN);
  161. /* start sense detection */
  162. start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
  163. start |= START_SENSE;
  164. start &= ~TSC_DISABLE;
  165. writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
  166. }
  167. static int imx6ul_tsc_init(struct imx6ul_tsc *tsc)
  168. {
  169. int err;
  170. err = imx6ul_adc_init(tsc);
  171. if (err)
  172. return err;
  173. imx6ul_tsc_channel_config(tsc);
  174. imx6ul_tsc_set(tsc);
  175. return 0;
  176. }
  177. static void imx6ul_tsc_disable(struct imx6ul_tsc *tsc)
  178. {
  179. int tsc_flow;
  180. int adc_cfg;
  181. /* TSC controller enters to idle status */
  182. tsc_flow = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
  183. tsc_flow |= TSC_DISABLE;
  184. writel(tsc_flow, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
  185. /* ADC controller enters to stop mode */
  186. adc_cfg = readl(tsc->adc_regs + REG_ADC_HC0);
  187. adc_cfg |= ADC_CONV_DISABLE;
  188. writel(adc_cfg, tsc->adc_regs + REG_ADC_HC0);
  189. }
  190. /* Delay some time (max 2ms), wait the pre-charge done. */
  191. static bool tsc_wait_detect_mode(struct imx6ul_tsc *tsc)
  192. {
  193. unsigned long timeout = jiffies + msecs_to_jiffies(2);
  194. int state_machine;
  195. int debug_mode2;
  196. do {
  197. if (time_after(jiffies, timeout))
  198. return false;
  199. usleep_range(200, 400);
  200. debug_mode2 = readl(tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
  201. state_machine = (debug_mode2 >> 20) & 0x7;
  202. } while (state_machine != DETECT_MODE);
  203. usleep_range(200, 400);
  204. return true;
  205. }
  206. static irqreturn_t tsc_irq_fn(int irq, void *dev_id)
  207. {
  208. struct imx6ul_tsc *tsc = dev_id;
  209. int status;
  210. int value;
  211. int x, y;
  212. int start;
  213. status = readl(tsc->tsc_regs + REG_TSC_INT_STATUS);
  214. /* write 1 to clear the bit measure-signal */
  215. writel(MEASURE_SIGNAL | DETECT_SIGNAL,
  216. tsc->tsc_regs + REG_TSC_INT_STATUS);
  217. /* It's a HW self-clean bit. Set this bit and start sense detection */
  218. start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
  219. start |= START_SENSE;
  220. writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
  221. if (status & MEASURE_SIGNAL) {
  222. value = readl(tsc->tsc_regs + REG_TSC_MEASURE_VALUE);
  223. x = (value >> 16) & 0x0fff;
  224. y = value & 0x0fff;
  225. /*
  226. * In detect mode, we can get the xnur gpio value,
  227. * otherwise assume contact is stiull active.
  228. */
  229. if (!tsc_wait_detect_mode(tsc) ||
  230. gpiod_get_value_cansleep(tsc->xnur_gpio)) {
  231. input_report_key(tsc->input, BTN_TOUCH, 1);
  232. input_report_abs(tsc->input, ABS_X, x);
  233. input_report_abs(tsc->input, ABS_Y, y);
  234. } else {
  235. input_report_key(tsc->input, BTN_TOUCH, 0);
  236. }
  237. input_sync(tsc->input);
  238. }
  239. return IRQ_HANDLED;
  240. }
  241. static irqreturn_t adc_irq_fn(int irq, void *dev_id)
  242. {
  243. struct imx6ul_tsc *tsc = dev_id;
  244. int coco;
  245. int value;
  246. coco = readl(tsc->adc_regs + REG_ADC_HS);
  247. if (coco & 0x01) {
  248. value = readl(tsc->adc_regs + REG_ADC_R0);
  249. complete(&tsc->completion);
  250. }
  251. return IRQ_HANDLED;
  252. }
  253. static int imx6ul_tsc_open(struct input_dev *input_dev)
  254. {
  255. struct imx6ul_tsc *tsc = input_get_drvdata(input_dev);
  256. int err;
  257. err = clk_prepare_enable(tsc->adc_clk);
  258. if (err) {
  259. dev_err(tsc->dev,
  260. "Could not prepare or enable the adc clock: %d\n",
  261. err);
  262. return err;
  263. }
  264. err = clk_prepare_enable(tsc->tsc_clk);
  265. if (err) {
  266. dev_err(tsc->dev,
  267. "Could not prepare or enable the tsc clock: %d\n",
  268. err);
  269. clk_disable_unprepare(tsc->adc_clk);
  270. return err;
  271. }
  272. return imx6ul_tsc_init(tsc);
  273. }
  274. static void imx6ul_tsc_close(struct input_dev *input_dev)
  275. {
  276. struct imx6ul_tsc *tsc = input_get_drvdata(input_dev);
  277. imx6ul_tsc_disable(tsc);
  278. clk_disable_unprepare(tsc->tsc_clk);
  279. clk_disable_unprepare(tsc->adc_clk);
  280. }
  281. static int imx6ul_tsc_probe(struct platform_device *pdev)
  282. {
  283. struct device_node *np = pdev->dev.of_node;
  284. struct imx6ul_tsc *tsc;
  285. struct input_dev *input_dev;
  286. struct resource *tsc_mem;
  287. struct resource *adc_mem;
  288. int err;
  289. int tsc_irq;
  290. int adc_irq;
  291. tsc = devm_kzalloc(&pdev->dev, sizeof(*tsc), GFP_KERNEL);
  292. if (!tsc)
  293. return -ENOMEM;
  294. input_dev = devm_input_allocate_device(&pdev->dev);
  295. if (!input_dev)
  296. return -ENOMEM;
  297. input_dev->name = "iMX6UL Touchscreen Controller";
  298. input_dev->id.bustype = BUS_HOST;
  299. input_dev->open = imx6ul_tsc_open;
  300. input_dev->close = imx6ul_tsc_close;
  301. input_set_capability(input_dev, EV_KEY, BTN_TOUCH);
  302. input_set_abs_params(input_dev, ABS_X, 0, 0xFFF, 0, 0);
  303. input_set_abs_params(input_dev, ABS_Y, 0, 0xFFF, 0, 0);
  304. input_set_drvdata(input_dev, tsc);
  305. tsc->dev = &pdev->dev;
  306. tsc->input = input_dev;
  307. init_completion(&tsc->completion);
  308. tsc->xnur_gpio = devm_gpiod_get(&pdev->dev, "xnur", GPIOD_IN);
  309. if (IS_ERR(tsc->xnur_gpio)) {
  310. err = PTR_ERR(tsc->xnur_gpio);
  311. dev_err(&pdev->dev,
  312. "failed to request GPIO tsc_X- (xnur): %d\n", err);
  313. return err;
  314. }
  315. tsc_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  316. tsc->tsc_regs = devm_ioremap_resource(&pdev->dev, tsc_mem);
  317. if (IS_ERR(tsc->tsc_regs)) {
  318. err = PTR_ERR(tsc->tsc_regs);
  319. dev_err(&pdev->dev, "failed to remap tsc memory: %d\n", err);
  320. return err;
  321. }
  322. adc_mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  323. tsc->adc_regs = devm_ioremap_resource(&pdev->dev, adc_mem);
  324. if (IS_ERR(tsc->adc_regs)) {
  325. err = PTR_ERR(tsc->adc_regs);
  326. dev_err(&pdev->dev, "failed to remap adc memory: %d\n", err);
  327. return err;
  328. }
  329. tsc->tsc_clk = devm_clk_get(&pdev->dev, "tsc");
  330. if (IS_ERR(tsc->tsc_clk)) {
  331. err = PTR_ERR(tsc->tsc_clk);
  332. dev_err(&pdev->dev, "failed getting tsc clock: %d\n", err);
  333. return err;
  334. }
  335. tsc->adc_clk = devm_clk_get(&pdev->dev, "adc");
  336. if (IS_ERR(tsc->adc_clk)) {
  337. err = PTR_ERR(tsc->adc_clk);
  338. dev_err(&pdev->dev, "failed getting adc clock: %d\n", err);
  339. return err;
  340. }
  341. tsc_irq = platform_get_irq(pdev, 0);
  342. if (tsc_irq < 0) {
  343. dev_err(&pdev->dev, "no tsc irq resource?\n");
  344. return tsc_irq;
  345. }
  346. adc_irq = platform_get_irq(pdev, 1);
  347. if (adc_irq < 0) {
  348. dev_err(&pdev->dev, "no adc irq resource?\n");
  349. return adc_irq;
  350. }
  351. err = devm_request_threaded_irq(tsc->dev, tsc_irq,
  352. NULL, tsc_irq_fn, IRQF_ONESHOT,
  353. dev_name(&pdev->dev), tsc);
  354. if (err) {
  355. dev_err(&pdev->dev,
  356. "failed requesting tsc irq %d: %d\n",
  357. tsc_irq, err);
  358. return err;
  359. }
  360. err = devm_request_irq(tsc->dev, adc_irq, adc_irq_fn, 0,
  361. dev_name(&pdev->dev), tsc);
  362. if (err) {
  363. dev_err(&pdev->dev,
  364. "failed requesting adc irq %d: %d\n",
  365. adc_irq, err);
  366. return err;
  367. }
  368. err = of_property_read_u32(np, "measure-delay-time",
  369. &tsc->measure_delay_time);
  370. if (err)
  371. tsc->measure_delay_time = 0xffff;
  372. err = of_property_read_u32(np, "pre-charge-time",
  373. &tsc->pre_charge_time);
  374. if (err)
  375. tsc->pre_charge_time = 0xfff;
  376. err = input_register_device(tsc->input);
  377. if (err) {
  378. dev_err(&pdev->dev,
  379. "failed to register input device: %d\n", err);
  380. return err;
  381. }
  382. platform_set_drvdata(pdev, tsc);
  383. return 0;
  384. }
  385. static int __maybe_unused imx6ul_tsc_suspend(struct device *dev)
  386. {
  387. struct platform_device *pdev = to_platform_device(dev);
  388. struct imx6ul_tsc *tsc = platform_get_drvdata(pdev);
  389. struct input_dev *input_dev = tsc->input;
  390. mutex_lock(&input_dev->mutex);
  391. if (input_dev->users) {
  392. imx6ul_tsc_disable(tsc);
  393. clk_disable_unprepare(tsc->tsc_clk);
  394. clk_disable_unprepare(tsc->adc_clk);
  395. }
  396. mutex_unlock(&input_dev->mutex);
  397. return 0;
  398. }
  399. static int __maybe_unused imx6ul_tsc_resume(struct device *dev)
  400. {
  401. struct platform_device *pdev = to_platform_device(dev);
  402. struct imx6ul_tsc *tsc = platform_get_drvdata(pdev);
  403. struct input_dev *input_dev = tsc->input;
  404. int retval = 0;
  405. mutex_lock(&input_dev->mutex);
  406. if (input_dev->users) {
  407. retval = clk_prepare_enable(tsc->adc_clk);
  408. if (retval)
  409. goto out;
  410. retval = clk_prepare_enable(tsc->tsc_clk);
  411. if (retval) {
  412. clk_disable_unprepare(tsc->adc_clk);
  413. goto out;
  414. }
  415. retval = imx6ul_tsc_init(tsc);
  416. }
  417. out:
  418. mutex_unlock(&input_dev->mutex);
  419. return retval;
  420. }
  421. static SIMPLE_DEV_PM_OPS(imx6ul_tsc_pm_ops,
  422. imx6ul_tsc_suspend, imx6ul_tsc_resume);
  423. static const struct of_device_id imx6ul_tsc_match[] = {
  424. { .compatible = "fsl,imx6ul-tsc", },
  425. { /* sentinel */ }
  426. };
  427. MODULE_DEVICE_TABLE(of, imx6ul_tsc_match);
  428. static struct platform_driver imx6ul_tsc_driver = {
  429. .driver = {
  430. .name = "imx6ul-tsc",
  431. .of_match_table = imx6ul_tsc_match,
  432. .pm = &imx6ul_tsc_pm_ops,
  433. },
  434. .probe = imx6ul_tsc_probe,
  435. };
  436. module_platform_driver(imx6ul_tsc_driver);
  437. MODULE_AUTHOR("Haibo Chen <haibo.chen@freescale.com>");
  438. MODULE_DESCRIPTION("Freescale i.MX6UL Touchscreen controller driver");
  439. MODULE_LICENSE("GPL v2");