netjet.h 1.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657
  1. /*
  2. * NETjet common header file
  3. *
  4. * Author Karsten Keil
  5. * based on work of Matt Henderson and Daniel Potts,
  6. * Traverse Technologies P/L www.traverse.com.au
  7. *
  8. * Copyright 2009 by Karsten Keil <keil@isdn4linux.de>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. *
  23. */
  24. #define NJ_CTRL 0x00
  25. #define NJ_DMACTRL 0x01
  26. #define NJ_AUXCTRL 0x02
  27. #define NJ_AUXDATA 0x03
  28. #define NJ_IRQMASK0 0x04
  29. #define NJ_IRQMASK1 0x05
  30. #define NJ_IRQSTAT0 0x06
  31. #define NJ_IRQSTAT1 0x07
  32. #define NJ_DMA_READ_START 0x08
  33. #define NJ_DMA_READ_IRQ 0x0c
  34. #define NJ_DMA_READ_END 0x10
  35. #define NJ_DMA_READ_ADR 0x14
  36. #define NJ_DMA_WRITE_START 0x18
  37. #define NJ_DMA_WRITE_IRQ 0x1c
  38. #define NJ_DMA_WRITE_END 0x20
  39. #define NJ_DMA_WRITE_ADR 0x24
  40. #define NJ_PULSE_CNT 0x28
  41. #define NJ_ISAC_OFF 0xc0
  42. #define NJ_ISACIRQ 0x10
  43. #define NJ_IRQM0_RD_MASK 0x03
  44. #define NJ_IRQM0_RD_IRQ 0x01
  45. #define NJ_IRQM0_RD_END 0x02
  46. #define NJ_IRQM0_WR_MASK 0x0c
  47. #define NJ_IRQM0_WR_IRQ 0x04
  48. #define NJ_IRQM0_WR_END 0x08
  49. /* one page here is no need to be smaller */
  50. #define NJ_DMA_SIZE 4096
  51. /* 2 * 64 byte is a compromise between IRQ count and latency */
  52. #define NJ_DMA_RXSIZE 128 /* 2 * 64 */
  53. #define NJ_DMA_TXSIZE 128 /* 2 * 64 */