w6692.c 36 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437
  1. /*
  2. * w6692.c mISDN driver for Winbond w6692 based cards
  3. *
  4. * Author Karsten Keil <kkeil@suse.de>
  5. * based on the w6692 I4L driver from Petr Novak <petr.novak@i.cz>
  6. *
  7. * Copyright 2009 by Karsten Keil <keil@isdn4linux.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. *
  22. */
  23. #include <linux/interrupt.h>
  24. #include <linux/module.h>
  25. #include <linux/pci.h>
  26. #include <linux/delay.h>
  27. #include <linux/mISDNhw.h>
  28. #include <linux/slab.h>
  29. #include "w6692.h"
  30. #define W6692_REV "2.0"
  31. #define DBUSY_TIMER_VALUE 80
  32. enum {
  33. W6692_ASUS,
  34. W6692_WINBOND,
  35. W6692_USR
  36. };
  37. /* private data in the PCI devices list */
  38. struct w6692map {
  39. u_int subtype;
  40. char *name;
  41. };
  42. static const struct w6692map w6692_map[] =
  43. {
  44. {W6692_ASUS, "Dynalink/AsusCom IS64PH"},
  45. {W6692_WINBOND, "Winbond W6692"},
  46. {W6692_USR, "USR W6692"}
  47. };
  48. #ifndef PCI_VENDOR_ID_USR
  49. #define PCI_VENDOR_ID_USR 0x16ec
  50. #define PCI_DEVICE_ID_USR_6692 0x3409
  51. #endif
  52. struct w6692_ch {
  53. struct bchannel bch;
  54. u32 addr;
  55. struct timer_list timer;
  56. u8 b_mode;
  57. };
  58. struct w6692_hw {
  59. struct list_head list;
  60. struct pci_dev *pdev;
  61. char name[MISDN_MAX_IDLEN];
  62. u32 irq;
  63. u32 irqcnt;
  64. u32 addr;
  65. u32 fmask; /* feature mask - bit set per card nr */
  66. int subtype;
  67. spinlock_t lock; /* hw lock */
  68. u8 imask;
  69. u8 pctl;
  70. u8 xaddr;
  71. u8 xdata;
  72. u8 state;
  73. struct w6692_ch bc[2];
  74. struct dchannel dch;
  75. char log[64];
  76. };
  77. static LIST_HEAD(Cards);
  78. static DEFINE_RWLOCK(card_lock); /* protect Cards */
  79. static int w6692_cnt;
  80. static int debug;
  81. static u32 led;
  82. static u32 pots;
  83. static void
  84. _set_debug(struct w6692_hw *card)
  85. {
  86. card->dch.debug = debug;
  87. card->bc[0].bch.debug = debug;
  88. card->bc[1].bch.debug = debug;
  89. }
  90. static int
  91. set_debug(const char *val, struct kernel_param *kp)
  92. {
  93. int ret;
  94. struct w6692_hw *card;
  95. ret = param_set_uint(val, kp);
  96. if (!ret) {
  97. read_lock(&card_lock);
  98. list_for_each_entry(card, &Cards, list)
  99. _set_debug(card);
  100. read_unlock(&card_lock);
  101. }
  102. return ret;
  103. }
  104. MODULE_AUTHOR("Karsten Keil");
  105. MODULE_LICENSE("GPL v2");
  106. MODULE_VERSION(W6692_REV);
  107. module_param_call(debug, set_debug, param_get_uint, &debug, S_IRUGO | S_IWUSR);
  108. MODULE_PARM_DESC(debug, "W6692 debug mask");
  109. module_param(led, uint, S_IRUGO | S_IWUSR);
  110. MODULE_PARM_DESC(led, "W6692 LED support bitmask (one bit per card)");
  111. module_param(pots, uint, S_IRUGO | S_IWUSR);
  112. MODULE_PARM_DESC(pots, "W6692 POTS support bitmask (one bit per card)");
  113. static inline u8
  114. ReadW6692(struct w6692_hw *card, u8 offset)
  115. {
  116. return inb(card->addr + offset);
  117. }
  118. static inline void
  119. WriteW6692(struct w6692_hw *card, u8 offset, u8 value)
  120. {
  121. outb(value, card->addr + offset);
  122. }
  123. static inline u8
  124. ReadW6692B(struct w6692_ch *bc, u8 offset)
  125. {
  126. return inb(bc->addr + offset);
  127. }
  128. static inline void
  129. WriteW6692B(struct w6692_ch *bc, u8 offset, u8 value)
  130. {
  131. outb(value, bc->addr + offset);
  132. }
  133. static void
  134. enable_hwirq(struct w6692_hw *card)
  135. {
  136. WriteW6692(card, W_IMASK, card->imask);
  137. }
  138. static void
  139. disable_hwirq(struct w6692_hw *card)
  140. {
  141. WriteW6692(card, W_IMASK, 0xff);
  142. }
  143. static const char *W6692Ver[] = {"V00", "V01", "V10", "V11"};
  144. static void
  145. W6692Version(struct w6692_hw *card)
  146. {
  147. int val;
  148. val = ReadW6692(card, W_D_RBCH);
  149. pr_notice("%s: Winbond W6692 version: %s\n", card->name,
  150. W6692Ver[(val >> 6) & 3]);
  151. }
  152. static void
  153. w6692_led_handler(struct w6692_hw *card, int on)
  154. {
  155. if ((!(card->fmask & led)) || card->subtype == W6692_USR)
  156. return;
  157. if (on) {
  158. card->xdata &= 0xfb; /* LED ON */
  159. WriteW6692(card, W_XDATA, card->xdata);
  160. } else {
  161. card->xdata |= 0x04; /* LED OFF */
  162. WriteW6692(card, W_XDATA, card->xdata);
  163. }
  164. }
  165. static void
  166. ph_command(struct w6692_hw *card, u8 cmd)
  167. {
  168. pr_debug("%s: ph_command %x\n", card->name, cmd);
  169. WriteW6692(card, W_CIX, cmd);
  170. }
  171. static void
  172. W6692_new_ph(struct w6692_hw *card)
  173. {
  174. if (card->state == W_L1CMD_RST)
  175. ph_command(card, W_L1CMD_DRC);
  176. schedule_event(&card->dch, FLG_PHCHANGE);
  177. }
  178. static void
  179. W6692_ph_bh(struct dchannel *dch)
  180. {
  181. struct w6692_hw *card = dch->hw;
  182. switch (card->state) {
  183. case W_L1CMD_RST:
  184. dch->state = 0;
  185. l1_event(dch->l1, HW_RESET_IND);
  186. break;
  187. case W_L1IND_CD:
  188. dch->state = 3;
  189. l1_event(dch->l1, HW_DEACT_CNF);
  190. break;
  191. case W_L1IND_DRD:
  192. dch->state = 3;
  193. l1_event(dch->l1, HW_DEACT_IND);
  194. break;
  195. case W_L1IND_CE:
  196. dch->state = 4;
  197. l1_event(dch->l1, HW_POWERUP_IND);
  198. break;
  199. case W_L1IND_LD:
  200. if (dch->state <= 5) {
  201. dch->state = 5;
  202. l1_event(dch->l1, ANYSIGNAL);
  203. } else {
  204. dch->state = 8;
  205. l1_event(dch->l1, LOSTFRAMING);
  206. }
  207. break;
  208. case W_L1IND_ARD:
  209. dch->state = 6;
  210. l1_event(dch->l1, INFO2);
  211. break;
  212. case W_L1IND_AI8:
  213. dch->state = 7;
  214. l1_event(dch->l1, INFO4_P8);
  215. break;
  216. case W_L1IND_AI10:
  217. dch->state = 7;
  218. l1_event(dch->l1, INFO4_P10);
  219. break;
  220. default:
  221. pr_debug("%s: TE unknown state %02x dch state %02x\n",
  222. card->name, card->state, dch->state);
  223. break;
  224. }
  225. pr_debug("%s: TE newstate %02x\n", card->name, dch->state);
  226. }
  227. static void
  228. W6692_empty_Dfifo(struct w6692_hw *card, int count)
  229. {
  230. struct dchannel *dch = &card->dch;
  231. u8 *ptr;
  232. pr_debug("%s: empty_Dfifo %d\n", card->name, count);
  233. if (!dch->rx_skb) {
  234. dch->rx_skb = mI_alloc_skb(card->dch.maxlen, GFP_ATOMIC);
  235. if (!dch->rx_skb) {
  236. pr_info("%s: D receive out of memory\n", card->name);
  237. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  238. return;
  239. }
  240. }
  241. if ((dch->rx_skb->len + count) >= dch->maxlen) {
  242. pr_debug("%s: empty_Dfifo overrun %d\n", card->name,
  243. dch->rx_skb->len + count);
  244. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  245. return;
  246. }
  247. ptr = skb_put(dch->rx_skb, count);
  248. insb(card->addr + W_D_RFIFO, ptr, count);
  249. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  250. if (debug & DEBUG_HW_DFIFO) {
  251. snprintf(card->log, 63, "D-recv %s %d ",
  252. card->name, count);
  253. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  254. }
  255. }
  256. static void
  257. W6692_fill_Dfifo(struct w6692_hw *card)
  258. {
  259. struct dchannel *dch = &card->dch;
  260. int count;
  261. u8 *ptr;
  262. u8 cmd = W_D_CMDR_XMS;
  263. pr_debug("%s: fill_Dfifo\n", card->name);
  264. if (!dch->tx_skb)
  265. return;
  266. count = dch->tx_skb->len - dch->tx_idx;
  267. if (count <= 0)
  268. return;
  269. if (count > W_D_FIFO_THRESH)
  270. count = W_D_FIFO_THRESH;
  271. else
  272. cmd |= W_D_CMDR_XME;
  273. ptr = dch->tx_skb->data + dch->tx_idx;
  274. dch->tx_idx += count;
  275. outsb(card->addr + W_D_XFIFO, ptr, count);
  276. WriteW6692(card, W_D_CMDR, cmd);
  277. if (test_and_set_bit(FLG_BUSY_TIMER, &dch->Flags)) {
  278. pr_debug("%s: fill_Dfifo dbusytimer running\n", card->name);
  279. del_timer(&dch->timer);
  280. }
  281. init_timer(&dch->timer);
  282. dch->timer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ) / 1000);
  283. add_timer(&dch->timer);
  284. if (debug & DEBUG_HW_DFIFO) {
  285. snprintf(card->log, 63, "D-send %s %d ",
  286. card->name, count);
  287. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  288. }
  289. }
  290. static void
  291. d_retransmit(struct w6692_hw *card)
  292. {
  293. struct dchannel *dch = &card->dch;
  294. if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags))
  295. del_timer(&dch->timer);
  296. #ifdef FIXME
  297. if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags))
  298. dchannel_sched_event(dch, D_CLEARBUSY);
  299. #endif
  300. if (test_bit(FLG_TX_BUSY, &dch->Flags)) {
  301. /* Restart frame */
  302. dch->tx_idx = 0;
  303. W6692_fill_Dfifo(card);
  304. } else if (dch->tx_skb) { /* should not happen */
  305. pr_info("%s: %s without TX_BUSY\n", card->name, __func__);
  306. test_and_set_bit(FLG_TX_BUSY, &dch->Flags);
  307. dch->tx_idx = 0;
  308. W6692_fill_Dfifo(card);
  309. } else {
  310. pr_info("%s: XDU no TX_BUSY\n", card->name);
  311. if (get_next_dframe(dch))
  312. W6692_fill_Dfifo(card);
  313. }
  314. }
  315. static void
  316. handle_rxD(struct w6692_hw *card) {
  317. u8 stat;
  318. int count;
  319. stat = ReadW6692(card, W_D_RSTA);
  320. if (stat & (W_D_RSTA_RDOV | W_D_RSTA_CRCE | W_D_RSTA_RMB)) {
  321. if (stat & W_D_RSTA_RDOV) {
  322. pr_debug("%s: D-channel RDOV\n", card->name);
  323. #ifdef ERROR_STATISTIC
  324. card->dch.err_rx++;
  325. #endif
  326. }
  327. if (stat & W_D_RSTA_CRCE) {
  328. pr_debug("%s: D-channel CRC error\n", card->name);
  329. #ifdef ERROR_STATISTIC
  330. card->dch.err_crc++;
  331. #endif
  332. }
  333. if (stat & W_D_RSTA_RMB) {
  334. pr_debug("%s: D-channel ABORT\n", card->name);
  335. #ifdef ERROR_STATISTIC
  336. card->dch.err_rx++;
  337. #endif
  338. }
  339. if (card->dch.rx_skb)
  340. dev_kfree_skb(card->dch.rx_skb);
  341. card->dch.rx_skb = NULL;
  342. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK | W_D_CMDR_RRST);
  343. } else {
  344. count = ReadW6692(card, W_D_RBCL) & (W_D_FIFO_THRESH - 1);
  345. if (count == 0)
  346. count = W_D_FIFO_THRESH;
  347. W6692_empty_Dfifo(card, count);
  348. recv_Dchannel(&card->dch);
  349. }
  350. }
  351. static void
  352. handle_txD(struct w6692_hw *card) {
  353. if (test_and_clear_bit(FLG_BUSY_TIMER, &card->dch.Flags))
  354. del_timer(&card->dch.timer);
  355. if (card->dch.tx_skb && card->dch.tx_idx < card->dch.tx_skb->len) {
  356. W6692_fill_Dfifo(card);
  357. } else {
  358. if (card->dch.tx_skb)
  359. dev_kfree_skb(card->dch.tx_skb);
  360. if (get_next_dframe(&card->dch))
  361. W6692_fill_Dfifo(card);
  362. }
  363. }
  364. static void
  365. handle_statusD(struct w6692_hw *card)
  366. {
  367. struct dchannel *dch = &card->dch;
  368. u8 exval, v1, cir;
  369. exval = ReadW6692(card, W_D_EXIR);
  370. pr_debug("%s: D_EXIR %02x\n", card->name, exval);
  371. if (exval & (W_D_EXI_XDUN | W_D_EXI_XCOL)) {
  372. /* Transmit underrun/collision */
  373. pr_debug("%s: D-channel underrun/collision\n", card->name);
  374. #ifdef ERROR_STATISTIC
  375. dch->err_tx++;
  376. #endif
  377. d_retransmit(card);
  378. }
  379. if (exval & W_D_EXI_RDOV) { /* RDOV */
  380. pr_debug("%s: D-channel RDOV\n", card->name);
  381. WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST);
  382. }
  383. if (exval & W_D_EXI_TIN2) /* TIN2 - never */
  384. pr_debug("%s: spurious TIN2 interrupt\n", card->name);
  385. if (exval & W_D_EXI_MOC) { /* MOC - not supported */
  386. v1 = ReadW6692(card, W_MOSR);
  387. pr_debug("%s: spurious MOC interrupt MOSR %02x\n",
  388. card->name, v1);
  389. }
  390. if (exval & W_D_EXI_ISC) { /* ISC - Level1 change */
  391. cir = ReadW6692(card, W_CIR);
  392. pr_debug("%s: ISC CIR %02X\n", card->name, cir);
  393. if (cir & W_CIR_ICC) {
  394. v1 = cir & W_CIR_COD_MASK;
  395. pr_debug("%s: ph_state_change %x -> %x\n", card->name,
  396. dch->state, v1);
  397. card->state = v1;
  398. if (card->fmask & led) {
  399. switch (v1) {
  400. case W_L1IND_AI8:
  401. case W_L1IND_AI10:
  402. w6692_led_handler(card, 1);
  403. break;
  404. default:
  405. w6692_led_handler(card, 0);
  406. break;
  407. }
  408. }
  409. W6692_new_ph(card);
  410. }
  411. if (cir & W_CIR_SCC) {
  412. v1 = ReadW6692(card, W_SQR);
  413. pr_debug("%s: SCC SQR %02X\n", card->name, v1);
  414. }
  415. }
  416. if (exval & W_D_EXI_WEXP)
  417. pr_debug("%s: spurious WEXP interrupt!\n", card->name);
  418. if (exval & W_D_EXI_TEXP)
  419. pr_debug("%s: spurious TEXP interrupt!\n", card->name);
  420. }
  421. static void
  422. W6692_empty_Bfifo(struct w6692_ch *wch, int count)
  423. {
  424. struct w6692_hw *card = wch->bch.hw;
  425. u8 *ptr;
  426. int maxlen;
  427. pr_debug("%s: empty_Bfifo %d\n", card->name, count);
  428. if (unlikely(wch->bch.state == ISDN_P_NONE)) {
  429. pr_debug("%s: empty_Bfifo ISDN_P_NONE\n", card->name);
  430. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  431. if (wch->bch.rx_skb)
  432. skb_trim(wch->bch.rx_skb, 0);
  433. return;
  434. }
  435. if (test_bit(FLG_RX_OFF, &wch->bch.Flags)) {
  436. wch->bch.dropcnt += count;
  437. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  438. return;
  439. }
  440. maxlen = bchannel_get_rxbuf(&wch->bch, count);
  441. if (maxlen < 0) {
  442. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  443. if (wch->bch.rx_skb)
  444. skb_trim(wch->bch.rx_skb, 0);
  445. pr_warning("%s.B%d: No bufferspace for %d bytes\n",
  446. card->name, wch->bch.nr, count);
  447. return;
  448. }
  449. ptr = skb_put(wch->bch.rx_skb, count);
  450. insb(wch->addr + W_B_RFIFO, ptr, count);
  451. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  452. if (debug & DEBUG_HW_DFIFO) {
  453. snprintf(card->log, 63, "B%1d-recv %s %d ",
  454. wch->bch.nr, card->name, count);
  455. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  456. }
  457. }
  458. static void
  459. W6692_fill_Bfifo(struct w6692_ch *wch)
  460. {
  461. struct w6692_hw *card = wch->bch.hw;
  462. int count, fillempty = 0;
  463. u8 *ptr, cmd = W_B_CMDR_RACT | W_B_CMDR_XMS;
  464. pr_debug("%s: fill Bfifo\n", card->name);
  465. if (!wch->bch.tx_skb) {
  466. if (!test_bit(FLG_TX_EMPTY, &wch->bch.Flags))
  467. return;
  468. ptr = wch->bch.fill;
  469. count = W_B_FIFO_THRESH;
  470. fillempty = 1;
  471. } else {
  472. count = wch->bch.tx_skb->len - wch->bch.tx_idx;
  473. if (count <= 0)
  474. return;
  475. ptr = wch->bch.tx_skb->data + wch->bch.tx_idx;
  476. }
  477. if (count > W_B_FIFO_THRESH)
  478. count = W_B_FIFO_THRESH;
  479. else if (test_bit(FLG_HDLC, &wch->bch.Flags))
  480. cmd |= W_B_CMDR_XME;
  481. pr_debug("%s: fill Bfifo%d/%d\n", card->name,
  482. count, wch->bch.tx_idx);
  483. wch->bch.tx_idx += count;
  484. if (fillempty) {
  485. while (count > 0) {
  486. outsb(wch->addr + W_B_XFIFO, ptr, MISDN_BCH_FILL_SIZE);
  487. count -= MISDN_BCH_FILL_SIZE;
  488. }
  489. } else {
  490. outsb(wch->addr + W_B_XFIFO, ptr, count);
  491. }
  492. WriteW6692B(wch, W_B_CMDR, cmd);
  493. if ((debug & DEBUG_HW_BFIFO) && !fillempty) {
  494. snprintf(card->log, 63, "B%1d-send %s %d ",
  495. wch->bch.nr, card->name, count);
  496. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  497. }
  498. }
  499. #if 0
  500. static int
  501. setvolume(struct w6692_ch *wch, int mic, struct sk_buff *skb)
  502. {
  503. struct w6692_hw *card = wch->bch.hw;
  504. u16 *vol = (u16 *)skb->data;
  505. u8 val;
  506. if ((!(card->fmask & pots)) ||
  507. !test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  508. return -ENODEV;
  509. if (skb->len < 2)
  510. return -EINVAL;
  511. if (*vol > 7)
  512. return -EINVAL;
  513. val = *vol & 7;
  514. val = 7 - val;
  515. if (mic) {
  516. val <<= 3;
  517. card->xaddr &= 0xc7;
  518. } else {
  519. card->xaddr &= 0xf8;
  520. }
  521. card->xaddr |= val;
  522. WriteW6692(card, W_XADDR, card->xaddr);
  523. return 0;
  524. }
  525. static int
  526. enable_pots(struct w6692_ch *wch)
  527. {
  528. struct w6692_hw *card = wch->bch.hw;
  529. if ((!(card->fmask & pots)) ||
  530. !test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  531. return -ENODEV;
  532. wch->b_mode |= W_B_MODE_EPCM | W_B_MODE_BSW0;
  533. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  534. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  535. card->pctl |= ((wch->bch.nr & 2) ? W_PCTL_PCX : 0);
  536. WriteW6692(card, W_PCTL, card->pctl);
  537. return 0;
  538. }
  539. #endif
  540. static int
  541. disable_pots(struct w6692_ch *wch)
  542. {
  543. struct w6692_hw *card = wch->bch.hw;
  544. if (!(card->fmask & pots))
  545. return -ENODEV;
  546. wch->b_mode &= ~(W_B_MODE_EPCM | W_B_MODE_BSW0);
  547. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  548. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  549. W_B_CMDR_XRST);
  550. return 0;
  551. }
  552. static int
  553. w6692_mode(struct w6692_ch *wch, u32 pr)
  554. {
  555. struct w6692_hw *card;
  556. card = wch->bch.hw;
  557. pr_debug("%s: B%d protocol %x-->%x\n", card->name,
  558. wch->bch.nr, wch->bch.state, pr);
  559. switch (pr) {
  560. case ISDN_P_NONE:
  561. if ((card->fmask & pots) && (wch->b_mode & W_B_MODE_EPCM))
  562. disable_pots(wch);
  563. wch->b_mode = 0;
  564. mISDN_clear_bchannel(&wch->bch);
  565. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  566. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  567. test_and_clear_bit(FLG_HDLC, &wch->bch.Flags);
  568. test_and_clear_bit(FLG_TRANSPARENT, &wch->bch.Flags);
  569. break;
  570. case ISDN_P_B_RAW:
  571. wch->b_mode = W_B_MODE_MMS;
  572. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  573. WriteW6692B(wch, W_B_EXIM, 0);
  574. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  575. W_B_CMDR_XRST);
  576. test_and_set_bit(FLG_TRANSPARENT, &wch->bch.Flags);
  577. break;
  578. case ISDN_P_B_HDLC:
  579. wch->b_mode = W_B_MODE_ITF;
  580. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  581. WriteW6692B(wch, W_B_ADM1, 0xff);
  582. WriteW6692B(wch, W_B_ADM2, 0xff);
  583. WriteW6692B(wch, W_B_EXIM, 0);
  584. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  585. W_B_CMDR_XRST);
  586. test_and_set_bit(FLG_HDLC, &wch->bch.Flags);
  587. break;
  588. default:
  589. pr_info("%s: protocol %x not known\n", card->name, pr);
  590. return -ENOPROTOOPT;
  591. }
  592. wch->bch.state = pr;
  593. return 0;
  594. }
  595. static void
  596. send_next(struct w6692_ch *wch)
  597. {
  598. if (wch->bch.tx_skb && wch->bch.tx_idx < wch->bch.tx_skb->len) {
  599. W6692_fill_Bfifo(wch);
  600. } else {
  601. if (wch->bch.tx_skb)
  602. dev_kfree_skb(wch->bch.tx_skb);
  603. if (get_next_bframe(&wch->bch)) {
  604. W6692_fill_Bfifo(wch);
  605. test_and_clear_bit(FLG_TX_EMPTY, &wch->bch.Flags);
  606. } else if (test_bit(FLG_TX_EMPTY, &wch->bch.Flags)) {
  607. W6692_fill_Bfifo(wch);
  608. }
  609. }
  610. }
  611. static void
  612. W6692B_interrupt(struct w6692_hw *card, int ch)
  613. {
  614. struct w6692_ch *wch = &card->bc[ch];
  615. int count;
  616. u8 stat, star = 0;
  617. stat = ReadW6692B(wch, W_B_EXIR);
  618. pr_debug("%s: B%d EXIR %02x\n", card->name, wch->bch.nr, stat);
  619. if (stat & W_B_EXI_RME) {
  620. star = ReadW6692B(wch, W_B_STAR);
  621. if (star & (W_B_STAR_RDOV | W_B_STAR_CRCE | W_B_STAR_RMB)) {
  622. if ((star & W_B_STAR_RDOV) &&
  623. test_bit(FLG_ACTIVE, &wch->bch.Flags)) {
  624. pr_debug("%s: B%d RDOV proto=%x\n", card->name,
  625. wch->bch.nr, wch->bch.state);
  626. #ifdef ERROR_STATISTIC
  627. wch->bch.err_rdo++;
  628. #endif
  629. }
  630. if (test_bit(FLG_HDLC, &wch->bch.Flags)) {
  631. if (star & W_B_STAR_CRCE) {
  632. pr_debug("%s: B%d CRC error\n",
  633. card->name, wch->bch.nr);
  634. #ifdef ERROR_STATISTIC
  635. wch->bch.err_crc++;
  636. #endif
  637. }
  638. if (star & W_B_STAR_RMB) {
  639. pr_debug("%s: B%d message abort\n",
  640. card->name, wch->bch.nr);
  641. #ifdef ERROR_STATISTIC
  642. wch->bch.err_inv++;
  643. #endif
  644. }
  645. }
  646. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  647. W_B_CMDR_RRST | W_B_CMDR_RACT);
  648. if (wch->bch.rx_skb)
  649. skb_trim(wch->bch.rx_skb, 0);
  650. } else {
  651. count = ReadW6692B(wch, W_B_RBCL) &
  652. (W_B_FIFO_THRESH - 1);
  653. if (count == 0)
  654. count = W_B_FIFO_THRESH;
  655. W6692_empty_Bfifo(wch, count);
  656. recv_Bchannel(&wch->bch, 0, false);
  657. }
  658. }
  659. if (stat & W_B_EXI_RMR) {
  660. if (!(stat & W_B_EXI_RME))
  661. star = ReadW6692B(wch, W_B_STAR);
  662. if (star & W_B_STAR_RDOV) {
  663. pr_debug("%s: B%d RDOV proto=%x\n", card->name,
  664. wch->bch.nr, wch->bch.state);
  665. #ifdef ERROR_STATISTIC
  666. wch->bch.err_rdo++;
  667. #endif
  668. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  669. W_B_CMDR_RRST | W_B_CMDR_RACT);
  670. } else {
  671. W6692_empty_Bfifo(wch, W_B_FIFO_THRESH);
  672. if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  673. recv_Bchannel(&wch->bch, 0, false);
  674. }
  675. }
  676. if (stat & W_B_EXI_RDOV) {
  677. /* only if it is not handled yet */
  678. if (!(star & W_B_STAR_RDOV)) {
  679. pr_debug("%s: B%d RDOV IRQ proto=%x\n", card->name,
  680. wch->bch.nr, wch->bch.state);
  681. #ifdef ERROR_STATISTIC
  682. wch->bch.err_rdo++;
  683. #endif
  684. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  685. W_B_CMDR_RRST | W_B_CMDR_RACT);
  686. }
  687. }
  688. if (stat & W_B_EXI_XFR) {
  689. if (!(stat & (W_B_EXI_RME | W_B_EXI_RMR))) {
  690. star = ReadW6692B(wch, W_B_STAR);
  691. pr_debug("%s: B%d star %02x\n", card->name,
  692. wch->bch.nr, star);
  693. }
  694. if (star & W_B_STAR_XDOW) {
  695. pr_warning("%s: B%d XDOW proto=%x\n", card->name,
  696. wch->bch.nr, wch->bch.state);
  697. #ifdef ERROR_STATISTIC
  698. wch->bch.err_xdu++;
  699. #endif
  700. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST |
  701. W_B_CMDR_RACT);
  702. /* resend */
  703. if (wch->bch.tx_skb) {
  704. if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  705. wch->bch.tx_idx = 0;
  706. }
  707. }
  708. send_next(wch);
  709. if (star & W_B_STAR_XDOW)
  710. return; /* handle XDOW only once */
  711. }
  712. if (stat & W_B_EXI_XDUN) {
  713. pr_warning("%s: B%d XDUN proto=%x\n", card->name,
  714. wch->bch.nr, wch->bch.state);
  715. #ifdef ERROR_STATISTIC
  716. wch->bch.err_xdu++;
  717. #endif
  718. /* resend - no XRST needed */
  719. if (wch->bch.tx_skb) {
  720. if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  721. wch->bch.tx_idx = 0;
  722. } else if (test_bit(FLG_FILLEMPTY, &wch->bch.Flags)) {
  723. test_and_set_bit(FLG_TX_EMPTY, &wch->bch.Flags);
  724. }
  725. send_next(wch);
  726. }
  727. }
  728. static irqreturn_t
  729. w6692_irq(int intno, void *dev_id)
  730. {
  731. struct w6692_hw *card = dev_id;
  732. u8 ista;
  733. spin_lock(&card->lock);
  734. ista = ReadW6692(card, W_ISTA);
  735. if ((ista | card->imask) == card->imask) {
  736. /* possible a shared IRQ reqest */
  737. spin_unlock(&card->lock);
  738. return IRQ_NONE;
  739. }
  740. card->irqcnt++;
  741. pr_debug("%s: ista %02x\n", card->name, ista);
  742. ista &= ~card->imask;
  743. if (ista & W_INT_B1_EXI)
  744. W6692B_interrupt(card, 0);
  745. if (ista & W_INT_B2_EXI)
  746. W6692B_interrupt(card, 1);
  747. if (ista & W_INT_D_RME)
  748. handle_rxD(card);
  749. if (ista & W_INT_D_RMR)
  750. W6692_empty_Dfifo(card, W_D_FIFO_THRESH);
  751. if (ista & W_INT_D_XFR)
  752. handle_txD(card);
  753. if (ista & W_INT_D_EXI)
  754. handle_statusD(card);
  755. if (ista & (W_INT_XINT0 | W_INT_XINT1)) /* XINT0/1 - never */
  756. pr_debug("%s: W6692 spurious XINT!\n", card->name);
  757. /* End IRQ Handler */
  758. spin_unlock(&card->lock);
  759. return IRQ_HANDLED;
  760. }
  761. static void
  762. dbusy_timer_handler(struct dchannel *dch)
  763. {
  764. struct w6692_hw *card = dch->hw;
  765. int rbch, star;
  766. u_long flags;
  767. if (test_bit(FLG_BUSY_TIMER, &dch->Flags)) {
  768. spin_lock_irqsave(&card->lock, flags);
  769. rbch = ReadW6692(card, W_D_RBCH);
  770. star = ReadW6692(card, W_D_STAR);
  771. pr_debug("%s: D-Channel Busy RBCH %02x STAR %02x\n",
  772. card->name, rbch, star);
  773. if (star & W_D_STAR_XBZ) /* D-Channel Busy */
  774. test_and_set_bit(FLG_L1_BUSY, &dch->Flags);
  775. else {
  776. /* discard frame; reset transceiver */
  777. test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags);
  778. if (dch->tx_idx)
  779. dch->tx_idx = 0;
  780. else
  781. pr_info("%s: W6692 D-Channel Busy no tx_idx\n",
  782. card->name);
  783. /* Transmitter reset */
  784. WriteW6692(card, W_D_CMDR, W_D_CMDR_XRST);
  785. }
  786. spin_unlock_irqrestore(&card->lock, flags);
  787. }
  788. }
  789. void initW6692(struct w6692_hw *card)
  790. {
  791. u8 val;
  792. card->dch.timer.function = (void *)dbusy_timer_handler;
  793. card->dch.timer.data = (u_long)&card->dch;
  794. init_timer(&card->dch.timer);
  795. w6692_mode(&card->bc[0], ISDN_P_NONE);
  796. w6692_mode(&card->bc[1], ISDN_P_NONE);
  797. WriteW6692(card, W_D_CTL, 0x00);
  798. disable_hwirq(card);
  799. WriteW6692(card, W_D_SAM, 0xff);
  800. WriteW6692(card, W_D_TAM, 0xff);
  801. WriteW6692(card, W_D_MODE, W_D_MODE_RACT);
  802. card->state = W_L1CMD_RST;
  803. ph_command(card, W_L1CMD_RST);
  804. ph_command(card, W_L1CMD_ECK);
  805. /* enable all IRQ but extern */
  806. card->imask = 0x18;
  807. WriteW6692(card, W_D_EXIM, 0x00);
  808. WriteW6692B(&card->bc[0], W_B_EXIM, 0);
  809. WriteW6692B(&card->bc[1], W_B_EXIM, 0);
  810. /* Reset D-chan receiver and transmitter */
  811. WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST | W_D_CMDR_XRST);
  812. /* Reset B-chan receiver and transmitter */
  813. WriteW6692B(&card->bc[0], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  814. WriteW6692B(&card->bc[1], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  815. /* enable peripheral */
  816. if (card->subtype == W6692_USR) {
  817. /* seems that USR implemented some power control features
  818. * Pin 79 is connected to the oscilator circuit so we
  819. * have to handle it here
  820. */
  821. card->pctl = 0x80;
  822. card->xdata = 0;
  823. WriteW6692(card, W_PCTL, card->pctl);
  824. WriteW6692(card, W_XDATA, card->xdata);
  825. } else {
  826. card->pctl = W_PCTL_OE5 | W_PCTL_OE4 | W_PCTL_OE2 |
  827. W_PCTL_OE1 | W_PCTL_OE0;
  828. card->xaddr = 0x00;/* all sw off */
  829. if (card->fmask & pots)
  830. card->xdata |= 0x06; /* POWER UP/ LED OFF / ALAW */
  831. if (card->fmask & led)
  832. card->xdata |= 0x04; /* LED OFF */
  833. if ((card->fmask & pots) || (card->fmask & led)) {
  834. WriteW6692(card, W_PCTL, card->pctl);
  835. WriteW6692(card, W_XADDR, card->xaddr);
  836. WriteW6692(card, W_XDATA, card->xdata);
  837. val = ReadW6692(card, W_XADDR);
  838. if (debug & DEBUG_HW)
  839. pr_notice("%s: W_XADDR=%02x\n",
  840. card->name, val);
  841. }
  842. }
  843. }
  844. static void
  845. reset_w6692(struct w6692_hw *card)
  846. {
  847. WriteW6692(card, W_D_CTL, W_D_CTL_SRST);
  848. mdelay(10);
  849. WriteW6692(card, W_D_CTL, 0);
  850. }
  851. static int
  852. init_card(struct w6692_hw *card)
  853. {
  854. int cnt = 3;
  855. u_long flags;
  856. spin_lock_irqsave(&card->lock, flags);
  857. disable_hwirq(card);
  858. spin_unlock_irqrestore(&card->lock, flags);
  859. if (request_irq(card->irq, w6692_irq, IRQF_SHARED, card->name, card)) {
  860. pr_info("%s: couldn't get interrupt %d\n", card->name,
  861. card->irq);
  862. return -EIO;
  863. }
  864. while (cnt--) {
  865. spin_lock_irqsave(&card->lock, flags);
  866. initW6692(card);
  867. enable_hwirq(card);
  868. spin_unlock_irqrestore(&card->lock, flags);
  869. /* Timeout 10ms */
  870. msleep_interruptible(10);
  871. if (debug & DEBUG_HW)
  872. pr_notice("%s: IRQ %d count %d\n", card->name,
  873. card->irq, card->irqcnt);
  874. if (!card->irqcnt) {
  875. pr_info("%s: IRQ(%d) getting no IRQs during init %d\n",
  876. card->name, card->irq, 3 - cnt);
  877. reset_w6692(card);
  878. } else
  879. return 0;
  880. }
  881. free_irq(card->irq, card);
  882. return -EIO;
  883. }
  884. static int
  885. w6692_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb)
  886. {
  887. struct bchannel *bch = container_of(ch, struct bchannel, ch);
  888. struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch);
  889. struct w6692_hw *card = bch->hw;
  890. int ret = -EINVAL;
  891. struct mISDNhead *hh = mISDN_HEAD_P(skb);
  892. unsigned long flags;
  893. switch (hh->prim) {
  894. case PH_DATA_REQ:
  895. spin_lock_irqsave(&card->lock, flags);
  896. ret = bchannel_senddata(bch, skb);
  897. if (ret > 0) { /* direct TX */
  898. ret = 0;
  899. W6692_fill_Bfifo(bc);
  900. }
  901. spin_unlock_irqrestore(&card->lock, flags);
  902. return ret;
  903. case PH_ACTIVATE_REQ:
  904. spin_lock_irqsave(&card->lock, flags);
  905. if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags))
  906. ret = w6692_mode(bc, ch->protocol);
  907. else
  908. ret = 0;
  909. spin_unlock_irqrestore(&card->lock, flags);
  910. if (!ret)
  911. _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0,
  912. NULL, GFP_KERNEL);
  913. break;
  914. case PH_DEACTIVATE_REQ:
  915. spin_lock_irqsave(&card->lock, flags);
  916. mISDN_clear_bchannel(bch);
  917. w6692_mode(bc, ISDN_P_NONE);
  918. spin_unlock_irqrestore(&card->lock, flags);
  919. _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0,
  920. NULL, GFP_KERNEL);
  921. ret = 0;
  922. break;
  923. default:
  924. pr_info("%s: %s unknown prim(%x,%x)\n",
  925. card->name, __func__, hh->prim, hh->id);
  926. ret = -EINVAL;
  927. }
  928. if (!ret)
  929. dev_kfree_skb(skb);
  930. return ret;
  931. }
  932. static int
  933. channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
  934. {
  935. return mISDN_ctrl_bchannel(bch, cq);
  936. }
  937. static int
  938. open_bchannel(struct w6692_hw *card, struct channel_req *rq)
  939. {
  940. struct bchannel *bch;
  941. if (rq->adr.channel == 0 || rq->adr.channel > 2)
  942. return -EINVAL;
  943. if (rq->protocol == ISDN_P_NONE)
  944. return -EINVAL;
  945. bch = &card->bc[rq->adr.channel - 1].bch;
  946. if (test_and_set_bit(FLG_OPEN, &bch->Flags))
  947. return -EBUSY; /* b-channel can be only open once */
  948. bch->ch.protocol = rq->protocol;
  949. rq->ch = &bch->ch;
  950. return 0;
  951. }
  952. static int
  953. channel_ctrl(struct w6692_hw *card, struct mISDN_ctrl_req *cq)
  954. {
  955. int ret = 0;
  956. switch (cq->op) {
  957. case MISDN_CTRL_GETOP:
  958. cq->op = MISDN_CTRL_L1_TIMER3;
  959. break;
  960. case MISDN_CTRL_L1_TIMER3:
  961. ret = l1_event(card->dch.l1, HW_TIMER3_VALUE | (cq->p1 & 0xff));
  962. break;
  963. default:
  964. pr_info("%s: unknown CTRL OP %x\n", card->name, cq->op);
  965. ret = -EINVAL;
  966. break;
  967. }
  968. return ret;
  969. }
  970. static int
  971. w6692_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
  972. {
  973. struct bchannel *bch = container_of(ch, struct bchannel, ch);
  974. struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch);
  975. struct w6692_hw *card = bch->hw;
  976. int ret = -EINVAL;
  977. u_long flags;
  978. pr_debug("%s: %s cmd:%x %p\n", card->name, __func__, cmd, arg);
  979. switch (cmd) {
  980. case CLOSE_CHANNEL:
  981. test_and_clear_bit(FLG_OPEN, &bch->Flags);
  982. cancel_work_sync(&bch->workq);
  983. spin_lock_irqsave(&card->lock, flags);
  984. mISDN_clear_bchannel(bch);
  985. w6692_mode(bc, ISDN_P_NONE);
  986. spin_unlock_irqrestore(&card->lock, flags);
  987. ch->protocol = ISDN_P_NONE;
  988. ch->peer = NULL;
  989. module_put(THIS_MODULE);
  990. ret = 0;
  991. break;
  992. case CONTROL_CHANNEL:
  993. ret = channel_bctrl(bch, arg);
  994. break;
  995. default:
  996. pr_info("%s: %s unknown prim(%x)\n",
  997. card->name, __func__, cmd);
  998. }
  999. return ret;
  1000. }
  1001. static int
  1002. w6692_l2l1D(struct mISDNchannel *ch, struct sk_buff *skb)
  1003. {
  1004. struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D);
  1005. struct dchannel *dch = container_of(dev, struct dchannel, dev);
  1006. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  1007. int ret = -EINVAL;
  1008. struct mISDNhead *hh = mISDN_HEAD_P(skb);
  1009. u32 id;
  1010. u_long flags;
  1011. switch (hh->prim) {
  1012. case PH_DATA_REQ:
  1013. spin_lock_irqsave(&card->lock, flags);
  1014. ret = dchannel_senddata(dch, skb);
  1015. if (ret > 0) { /* direct TX */
  1016. id = hh->id; /* skb can be freed */
  1017. W6692_fill_Dfifo(card);
  1018. ret = 0;
  1019. spin_unlock_irqrestore(&card->lock, flags);
  1020. queue_ch_frame(ch, PH_DATA_CNF, id, NULL);
  1021. } else
  1022. spin_unlock_irqrestore(&card->lock, flags);
  1023. return ret;
  1024. case PH_ACTIVATE_REQ:
  1025. ret = l1_event(dch->l1, hh->prim);
  1026. break;
  1027. case PH_DEACTIVATE_REQ:
  1028. test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags);
  1029. ret = l1_event(dch->l1, hh->prim);
  1030. break;
  1031. }
  1032. if (!ret)
  1033. dev_kfree_skb(skb);
  1034. return ret;
  1035. }
  1036. static int
  1037. w6692_l1callback(struct dchannel *dch, u32 cmd)
  1038. {
  1039. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  1040. u_long flags;
  1041. pr_debug("%s: cmd(%x) state(%02x)\n", card->name, cmd, card->state);
  1042. switch (cmd) {
  1043. case INFO3_P8:
  1044. spin_lock_irqsave(&card->lock, flags);
  1045. ph_command(card, W_L1CMD_AR8);
  1046. spin_unlock_irqrestore(&card->lock, flags);
  1047. break;
  1048. case INFO3_P10:
  1049. spin_lock_irqsave(&card->lock, flags);
  1050. ph_command(card, W_L1CMD_AR10);
  1051. spin_unlock_irqrestore(&card->lock, flags);
  1052. break;
  1053. case HW_RESET_REQ:
  1054. spin_lock_irqsave(&card->lock, flags);
  1055. if (card->state != W_L1IND_DRD)
  1056. ph_command(card, W_L1CMD_RST);
  1057. ph_command(card, W_L1CMD_ECK);
  1058. spin_unlock_irqrestore(&card->lock, flags);
  1059. break;
  1060. case HW_DEACT_REQ:
  1061. skb_queue_purge(&dch->squeue);
  1062. if (dch->tx_skb) {
  1063. dev_kfree_skb(dch->tx_skb);
  1064. dch->tx_skb = NULL;
  1065. }
  1066. dch->tx_idx = 0;
  1067. if (dch->rx_skb) {
  1068. dev_kfree_skb(dch->rx_skb);
  1069. dch->rx_skb = NULL;
  1070. }
  1071. test_and_clear_bit(FLG_TX_BUSY, &dch->Flags);
  1072. if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags))
  1073. del_timer(&dch->timer);
  1074. break;
  1075. case HW_POWERUP_REQ:
  1076. spin_lock_irqsave(&card->lock, flags);
  1077. ph_command(card, W_L1CMD_ECK);
  1078. spin_unlock_irqrestore(&card->lock, flags);
  1079. break;
  1080. case PH_ACTIVATE_IND:
  1081. test_and_set_bit(FLG_ACTIVE, &dch->Flags);
  1082. _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
  1083. GFP_ATOMIC);
  1084. break;
  1085. case PH_DEACTIVATE_IND:
  1086. test_and_clear_bit(FLG_ACTIVE, &dch->Flags);
  1087. _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
  1088. GFP_ATOMIC);
  1089. break;
  1090. default:
  1091. pr_debug("%s: %s unknown command %x\n", card->name,
  1092. __func__, cmd);
  1093. return -1;
  1094. }
  1095. return 0;
  1096. }
  1097. static int
  1098. open_dchannel(struct w6692_hw *card, struct channel_req *rq, void *caller)
  1099. {
  1100. pr_debug("%s: %s dev(%d) open from %p\n", card->name, __func__,
  1101. card->dch.dev.id, caller);
  1102. if (rq->protocol != ISDN_P_TE_S0)
  1103. return -EINVAL;
  1104. if (rq->adr.channel == 1)
  1105. /* E-Channel not supported */
  1106. return -EINVAL;
  1107. rq->ch = &card->dch.dev.D;
  1108. rq->ch->protocol = rq->protocol;
  1109. if (card->dch.state == 7)
  1110. _queue_data(rq->ch, PH_ACTIVATE_IND, MISDN_ID_ANY,
  1111. 0, NULL, GFP_KERNEL);
  1112. return 0;
  1113. }
  1114. static int
  1115. w6692_dctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
  1116. {
  1117. struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D);
  1118. struct dchannel *dch = container_of(dev, struct dchannel, dev);
  1119. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  1120. struct channel_req *rq;
  1121. int err = 0;
  1122. pr_debug("%s: DCTRL: %x %p\n", card->name, cmd, arg);
  1123. switch (cmd) {
  1124. case OPEN_CHANNEL:
  1125. rq = arg;
  1126. if (rq->protocol == ISDN_P_TE_S0)
  1127. err = open_dchannel(card, rq, __builtin_return_address(0));
  1128. else
  1129. err = open_bchannel(card, rq);
  1130. if (err)
  1131. break;
  1132. if (!try_module_get(THIS_MODULE))
  1133. pr_info("%s: cannot get module\n", card->name);
  1134. break;
  1135. case CLOSE_CHANNEL:
  1136. pr_debug("%s: dev(%d) close from %p\n", card->name,
  1137. dch->dev.id, __builtin_return_address(0));
  1138. module_put(THIS_MODULE);
  1139. break;
  1140. case CONTROL_CHANNEL:
  1141. err = channel_ctrl(card, arg);
  1142. break;
  1143. default:
  1144. pr_debug("%s: unknown DCTRL command %x\n", card->name, cmd);
  1145. return -EINVAL;
  1146. }
  1147. return err;
  1148. }
  1149. static int
  1150. setup_w6692(struct w6692_hw *card)
  1151. {
  1152. u32 val;
  1153. if (!request_region(card->addr, 256, card->name)) {
  1154. pr_info("%s: config port %x-%x already in use\n", card->name,
  1155. card->addr, card->addr + 255);
  1156. return -EIO;
  1157. }
  1158. W6692Version(card);
  1159. card->bc[0].addr = card->addr;
  1160. card->bc[1].addr = card->addr + 0x40;
  1161. val = ReadW6692(card, W_ISTA);
  1162. if (debug & DEBUG_HW)
  1163. pr_notice("%s ISTA=%02x\n", card->name, val);
  1164. val = ReadW6692(card, W_IMASK);
  1165. if (debug & DEBUG_HW)
  1166. pr_notice("%s IMASK=%02x\n", card->name, val);
  1167. val = ReadW6692(card, W_D_EXIR);
  1168. if (debug & DEBUG_HW)
  1169. pr_notice("%s D_EXIR=%02x\n", card->name, val);
  1170. val = ReadW6692(card, W_D_EXIM);
  1171. if (debug & DEBUG_HW)
  1172. pr_notice("%s D_EXIM=%02x\n", card->name, val);
  1173. val = ReadW6692(card, W_D_RSTA);
  1174. if (debug & DEBUG_HW)
  1175. pr_notice("%s D_RSTA=%02x\n", card->name, val);
  1176. return 0;
  1177. }
  1178. static void
  1179. release_card(struct w6692_hw *card)
  1180. {
  1181. u_long flags;
  1182. spin_lock_irqsave(&card->lock, flags);
  1183. disable_hwirq(card);
  1184. w6692_mode(&card->bc[0], ISDN_P_NONE);
  1185. w6692_mode(&card->bc[1], ISDN_P_NONE);
  1186. if ((card->fmask & led) || card->subtype == W6692_USR) {
  1187. card->xdata |= 0x04; /* LED OFF */
  1188. WriteW6692(card, W_XDATA, card->xdata);
  1189. }
  1190. spin_unlock_irqrestore(&card->lock, flags);
  1191. free_irq(card->irq, card);
  1192. l1_event(card->dch.l1, CLOSE_CHANNEL);
  1193. mISDN_unregister_device(&card->dch.dev);
  1194. release_region(card->addr, 256);
  1195. mISDN_freebchannel(&card->bc[1].bch);
  1196. mISDN_freebchannel(&card->bc[0].bch);
  1197. mISDN_freedchannel(&card->dch);
  1198. write_lock_irqsave(&card_lock, flags);
  1199. list_del(&card->list);
  1200. write_unlock_irqrestore(&card_lock, flags);
  1201. pci_disable_device(card->pdev);
  1202. pci_set_drvdata(card->pdev, NULL);
  1203. kfree(card);
  1204. }
  1205. static int
  1206. setup_instance(struct w6692_hw *card)
  1207. {
  1208. int i, err;
  1209. u_long flags;
  1210. snprintf(card->name, MISDN_MAX_IDLEN - 1, "w6692.%d", w6692_cnt + 1);
  1211. write_lock_irqsave(&card_lock, flags);
  1212. list_add_tail(&card->list, &Cards);
  1213. write_unlock_irqrestore(&card_lock, flags);
  1214. card->fmask = (1 << w6692_cnt);
  1215. _set_debug(card);
  1216. spin_lock_init(&card->lock);
  1217. mISDN_initdchannel(&card->dch, MAX_DFRAME_LEN_L1, W6692_ph_bh);
  1218. card->dch.dev.Dprotocols = (1 << ISDN_P_TE_S0);
  1219. card->dch.dev.D.send = w6692_l2l1D;
  1220. card->dch.dev.D.ctrl = w6692_dctrl;
  1221. card->dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) |
  1222. (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK));
  1223. card->dch.hw = card;
  1224. card->dch.dev.nrbchan = 2;
  1225. for (i = 0; i < 2; i++) {
  1226. mISDN_initbchannel(&card->bc[i].bch, MAX_DATA_MEM,
  1227. W_B_FIFO_THRESH);
  1228. card->bc[i].bch.hw = card;
  1229. card->bc[i].bch.nr = i + 1;
  1230. card->bc[i].bch.ch.nr = i + 1;
  1231. card->bc[i].bch.ch.send = w6692_l2l1B;
  1232. card->bc[i].bch.ch.ctrl = w6692_bctrl;
  1233. set_channelmap(i + 1, card->dch.dev.channelmap);
  1234. list_add(&card->bc[i].bch.ch.list, &card->dch.dev.bchannels);
  1235. }
  1236. err = setup_w6692(card);
  1237. if (err)
  1238. goto error_setup;
  1239. err = mISDN_register_device(&card->dch.dev, &card->pdev->dev,
  1240. card->name);
  1241. if (err)
  1242. goto error_reg;
  1243. err = init_card(card);
  1244. if (err)
  1245. goto error_init;
  1246. err = create_l1(&card->dch, w6692_l1callback);
  1247. if (!err) {
  1248. w6692_cnt++;
  1249. pr_notice("W6692 %d cards installed\n", w6692_cnt);
  1250. return 0;
  1251. }
  1252. free_irq(card->irq, card);
  1253. error_init:
  1254. mISDN_unregister_device(&card->dch.dev);
  1255. error_reg:
  1256. release_region(card->addr, 256);
  1257. error_setup:
  1258. mISDN_freebchannel(&card->bc[1].bch);
  1259. mISDN_freebchannel(&card->bc[0].bch);
  1260. mISDN_freedchannel(&card->dch);
  1261. write_lock_irqsave(&card_lock, flags);
  1262. list_del(&card->list);
  1263. write_unlock_irqrestore(&card_lock, flags);
  1264. kfree(card);
  1265. return err;
  1266. }
  1267. static int
  1268. w6692_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  1269. {
  1270. int err = -ENOMEM;
  1271. struct w6692_hw *card;
  1272. struct w6692map *m = (struct w6692map *)ent->driver_data;
  1273. card = kzalloc(sizeof(struct w6692_hw), GFP_KERNEL);
  1274. if (!card) {
  1275. pr_info("No kmem for w6692 card\n");
  1276. return err;
  1277. }
  1278. card->pdev = pdev;
  1279. card->subtype = m->subtype;
  1280. err = pci_enable_device(pdev);
  1281. if (err) {
  1282. kfree(card);
  1283. return err;
  1284. }
  1285. printk(KERN_INFO "mISDN_w6692: found adapter %s at %s\n",
  1286. m->name, pci_name(pdev));
  1287. card->addr = pci_resource_start(pdev, 1);
  1288. card->irq = pdev->irq;
  1289. pci_set_drvdata(pdev, card);
  1290. err = setup_instance(card);
  1291. if (err)
  1292. pci_set_drvdata(pdev, NULL);
  1293. return err;
  1294. }
  1295. static void
  1296. w6692_remove_pci(struct pci_dev *pdev)
  1297. {
  1298. struct w6692_hw *card = pci_get_drvdata(pdev);
  1299. if (card)
  1300. release_card(card);
  1301. else
  1302. if (debug)
  1303. pr_notice("%s: drvdata already removed\n", __func__);
  1304. }
  1305. static struct pci_device_id w6692_ids[] = {
  1306. { PCI_VENDOR_ID_DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH,
  1307. PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[0]},
  1308. { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692,
  1309. PCI_VENDOR_ID_USR, PCI_DEVICE_ID_USR_6692, 0, 0,
  1310. (ulong)&w6692_map[2]},
  1311. { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692,
  1312. PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[1]},
  1313. { }
  1314. };
  1315. MODULE_DEVICE_TABLE(pci, w6692_ids);
  1316. static struct pci_driver w6692_driver = {
  1317. .name = "w6692",
  1318. .probe = w6692_probe,
  1319. .remove = w6692_remove_pci,
  1320. .id_table = w6692_ids,
  1321. };
  1322. static int __init w6692_init(void)
  1323. {
  1324. int err;
  1325. pr_notice("Winbond W6692 PCI driver Rev. %s\n", W6692_REV);
  1326. err = pci_register_driver(&w6692_driver);
  1327. return err;
  1328. }
  1329. static void __exit w6692_cleanup(void)
  1330. {
  1331. pci_unregister_driver(&w6692_driver);
  1332. }
  1333. module_init(w6692_init);
  1334. module_exit(w6692_cleanup);