jade_irq.c 6.2 KB

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  1. /* $Id: jade_irq.c,v 1.7.2.4 2004/02/11 13:21:34 keil Exp $
  2. *
  3. * Low level JADE IRQ stuff (derived from original hscx_irq.c)
  4. *
  5. * Author Roland Klabunde
  6. * Copyright by Roland Klabunde <R.Klabunde@Berkom.de>
  7. *
  8. * This software may be used and distributed according to the terms
  9. * of the GNU General Public License, incorporated herein by reference.
  10. *
  11. */
  12. static inline void
  13. waitforCEC(struct IsdnCardState *cs, int jade, int reg)
  14. {
  15. int to = 50;
  16. int mask = (reg == jade_HDLC_XCMD ? jadeSTAR_XCEC : jadeSTAR_RCEC);
  17. while ((READJADE(cs, jade, jade_HDLC_STAR) & mask) && to) {
  18. udelay(1);
  19. to--;
  20. }
  21. if (!to)
  22. printk(KERN_WARNING "HiSax: waitforCEC (jade) timeout\n");
  23. }
  24. static inline void
  25. waitforXFW(struct IsdnCardState *cs, int jade)
  26. {
  27. /* Does not work on older jade versions, don't care */
  28. }
  29. static inline void
  30. WriteJADECMDR(struct IsdnCardState *cs, int jade, int reg, u_char data)
  31. {
  32. waitforCEC(cs, jade, reg);
  33. WRITEJADE(cs, jade, reg, data);
  34. }
  35. static void
  36. jade_empty_fifo(struct BCState *bcs, int count)
  37. {
  38. u_char *ptr;
  39. struct IsdnCardState *cs = bcs->cs;
  40. if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
  41. debugl1(cs, "jade_empty_fifo");
  42. if (bcs->hw.hscx.rcvidx + count > HSCX_BUFMAX) {
  43. if (cs->debug & L1_DEB_WARN)
  44. debugl1(cs, "jade_empty_fifo: incoming packet too large");
  45. WriteJADECMDR(cs, bcs->hw.hscx.hscx, jade_HDLC_RCMD, jadeRCMD_RMC);
  46. bcs->hw.hscx.rcvidx = 0;
  47. return;
  48. }
  49. ptr = bcs->hw.hscx.rcvbuf + bcs->hw.hscx.rcvidx;
  50. bcs->hw.hscx.rcvidx += count;
  51. READJADEFIFO(cs, bcs->hw.hscx.hscx, ptr, count);
  52. WriteJADECMDR(cs, bcs->hw.hscx.hscx, jade_HDLC_RCMD, jadeRCMD_RMC);
  53. if (cs->debug & L1_DEB_HSCX_FIFO) {
  54. char *t = bcs->blog;
  55. t += sprintf(t, "jade_empty_fifo %c cnt %d",
  56. bcs->hw.hscx.hscx ? 'B' : 'A', count);
  57. QuickHex(t, ptr, count);
  58. debugl1(cs, "%s", bcs->blog);
  59. }
  60. }
  61. static void
  62. jade_fill_fifo(struct BCState *bcs)
  63. {
  64. struct IsdnCardState *cs = bcs->cs;
  65. int more, count;
  66. int fifo_size = 32;
  67. u_char *ptr;
  68. if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
  69. debugl1(cs, "jade_fill_fifo");
  70. if (!bcs->tx_skb)
  71. return;
  72. if (bcs->tx_skb->len <= 0)
  73. return;
  74. more = (bcs->mode == L1_MODE_TRANS) ? 1 : 0;
  75. if (bcs->tx_skb->len > fifo_size) {
  76. more = !0;
  77. count = fifo_size;
  78. } else
  79. count = bcs->tx_skb->len;
  80. waitforXFW(cs, bcs->hw.hscx.hscx);
  81. ptr = bcs->tx_skb->data;
  82. skb_pull(bcs->tx_skb, count);
  83. bcs->tx_cnt -= count;
  84. bcs->hw.hscx.count += count;
  85. WRITEJADEFIFO(cs, bcs->hw.hscx.hscx, ptr, count);
  86. WriteJADECMDR(cs, bcs->hw.hscx.hscx, jade_HDLC_XCMD, more ? jadeXCMD_XF : (jadeXCMD_XF | jadeXCMD_XME));
  87. if (cs->debug & L1_DEB_HSCX_FIFO) {
  88. char *t = bcs->blog;
  89. t += sprintf(t, "jade_fill_fifo %c cnt %d",
  90. bcs->hw.hscx.hscx ? 'B' : 'A', count);
  91. QuickHex(t, ptr, count);
  92. debugl1(cs, "%s", bcs->blog);
  93. }
  94. }
  95. static void
  96. jade_interrupt(struct IsdnCardState *cs, u_char val, u_char jade)
  97. {
  98. u_char r;
  99. struct BCState *bcs = cs->bcs + jade;
  100. struct sk_buff *skb;
  101. int fifo_size = 32;
  102. int count;
  103. int i_jade = (int) jade; /* To satisfy the compiler */
  104. if (!test_bit(BC_FLG_INIT, &bcs->Flag))
  105. return;
  106. if (val & 0x80) { /* RME */
  107. r = READJADE(cs, i_jade, jade_HDLC_RSTA);
  108. if ((r & 0xf0) != 0xa0) {
  109. if (!(r & 0x80))
  110. if (cs->debug & L1_DEB_WARN)
  111. debugl1(cs, "JADE %s invalid frame", (jade ? "B" : "A"));
  112. if ((r & 0x40) && bcs->mode)
  113. if (cs->debug & L1_DEB_WARN)
  114. debugl1(cs, "JADE %c RDO mode=%d", 'A' + jade, bcs->mode);
  115. if (!(r & 0x20))
  116. if (cs->debug & L1_DEB_WARN)
  117. debugl1(cs, "JADE %c CRC error", 'A' + jade);
  118. WriteJADECMDR(cs, jade, jade_HDLC_RCMD, jadeRCMD_RMC);
  119. } else {
  120. count = READJADE(cs, i_jade, jade_HDLC_RBCL) & 0x1F;
  121. if (count == 0)
  122. count = fifo_size;
  123. jade_empty_fifo(bcs, count);
  124. if ((count = bcs->hw.hscx.rcvidx - 1) > 0) {
  125. if (cs->debug & L1_DEB_HSCX_FIFO)
  126. debugl1(cs, "HX Frame %d", count);
  127. if (!(skb = dev_alloc_skb(count)))
  128. printk(KERN_WARNING "JADE %s receive out of memory\n", (jade ? "B" : "A"));
  129. else {
  130. memcpy(skb_put(skb, count), bcs->hw.hscx.rcvbuf, count);
  131. skb_queue_tail(&bcs->rqueue, skb);
  132. }
  133. }
  134. }
  135. bcs->hw.hscx.rcvidx = 0;
  136. schedule_event(bcs, B_RCVBUFREADY);
  137. }
  138. if (val & 0x40) { /* RPF */
  139. jade_empty_fifo(bcs, fifo_size);
  140. if (bcs->mode == L1_MODE_TRANS) {
  141. /* receive audio data */
  142. if (!(skb = dev_alloc_skb(fifo_size)))
  143. printk(KERN_WARNING "HiSax: receive out of memory\n");
  144. else {
  145. memcpy(skb_put(skb, fifo_size), bcs->hw.hscx.rcvbuf, fifo_size);
  146. skb_queue_tail(&bcs->rqueue, skb);
  147. }
  148. bcs->hw.hscx.rcvidx = 0;
  149. schedule_event(bcs, B_RCVBUFREADY);
  150. }
  151. }
  152. if (val & 0x10) { /* XPR */
  153. if (bcs->tx_skb) {
  154. if (bcs->tx_skb->len) {
  155. jade_fill_fifo(bcs);
  156. return;
  157. } else {
  158. if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
  159. (PACKET_NOACK != bcs->tx_skb->pkt_type)) {
  160. u_long flags;
  161. spin_lock_irqsave(&bcs->aclock, flags);
  162. bcs->ackcnt += bcs->hw.hscx.count;
  163. spin_unlock_irqrestore(&bcs->aclock, flags);
  164. schedule_event(bcs, B_ACKPENDING);
  165. }
  166. dev_kfree_skb_irq(bcs->tx_skb);
  167. bcs->hw.hscx.count = 0;
  168. bcs->tx_skb = NULL;
  169. }
  170. }
  171. if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) {
  172. bcs->hw.hscx.count = 0;
  173. test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
  174. jade_fill_fifo(bcs);
  175. } else {
  176. test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
  177. schedule_event(bcs, B_XMTBUFREADY);
  178. }
  179. }
  180. }
  181. static inline void
  182. jade_int_main(struct IsdnCardState *cs, u_char val, int jade)
  183. {
  184. struct BCState *bcs;
  185. bcs = cs->bcs + jade;
  186. if (val & jadeISR_RFO) {
  187. /* handled with RDO */
  188. val &= ~jadeISR_RFO;
  189. }
  190. if (val & jadeISR_XDU) {
  191. /* relevant in HDLC mode only */
  192. /* don't reset XPR here */
  193. if (bcs->mode == 1)
  194. jade_fill_fifo(bcs);
  195. else {
  196. /* Here we lost an TX interrupt, so
  197. * restart transmitting the whole frame.
  198. */
  199. if (bcs->tx_skb) {
  200. skb_push(bcs->tx_skb, bcs->hw.hscx.count);
  201. bcs->tx_cnt += bcs->hw.hscx.count;
  202. bcs->hw.hscx.count = 0;
  203. }
  204. WriteJADECMDR(cs, bcs->hw.hscx.hscx, jade_HDLC_XCMD, jadeXCMD_XRES);
  205. if (cs->debug & L1_DEB_WARN)
  206. debugl1(cs, "JADE %c EXIR %x Lost TX", 'A' + jade, val);
  207. }
  208. }
  209. if (val & (jadeISR_RME | jadeISR_RPF | jadeISR_XPR)) {
  210. if (cs->debug & L1_DEB_HSCX)
  211. debugl1(cs, "JADE %c interrupt %x", 'A' + jade, val);
  212. jade_interrupt(cs, val, jade);
  213. }
  214. }