layer2.h 6.3 KB

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  1. /*
  2. * PCBIT-D low-layer interface definitions
  3. *
  4. * Copyright (C) 1996 Universidade de Lisboa
  5. *
  6. * Written by Pedro Roque Marques (roque@di.fc.ul.pt)
  7. *
  8. * This software may be used and distributed according to the terms of
  9. * the GNU General Public License, incorporated herein by reference.
  10. */
  11. /*
  12. * 19991203 - Fernando Carvalho - takion@superbofh.org
  13. * Hacked to compile with egcs and run with current version of isdn modules
  14. */
  15. #ifndef LAYER2_H
  16. #define LAYER2_H
  17. #include <linux/interrupt.h>
  18. #include <asm/byteorder.h>
  19. #define BANK1 0x0000U /* PC -> Board */
  20. #define BANK2 0x01ffU /* Board -> PC */
  21. #define BANK3 0x03feU /* Att Board */
  22. #define BANK4 0x03ffU /* Att PC */
  23. #define BANKLEN 0x01FFU
  24. #define LOAD_ZONE_START 0x03f8U
  25. #define LOAD_ZONE_END 0x03fdU
  26. #define LOAD_RETRY 18000000
  27. /* TAM - XX - C - S - NUM */
  28. #define PREHDR_LEN 8
  29. /* TT - M - I - TH - TD */
  30. #define FRAME_HDR_LEN 8
  31. #define MSG_CONN_REQ 0x08000100
  32. #define MSG_CONN_CONF 0x00000101
  33. #define MSG_CONN_IND 0x00000102
  34. #define MSG_CONN_RESP 0x08000103
  35. #define MSG_CONN_ACTV_REQ 0x08000300
  36. #define MSG_CONN_ACTV_CONF 0x00000301
  37. #define MSG_CONN_ACTV_IND 0x00000302
  38. #define MSG_CONN_ACTV_RESP 0x08000303
  39. #define MSG_DISC_REQ 0x08000400
  40. #define MSG_DISC_CONF 0x00000401
  41. #define MSG_DISC_IND 0x00000402
  42. #define MSG_DISC_RESP 0x08000403
  43. #define MSG_TDATA_REQ 0x0908E200
  44. #define MSG_TDATA_CONF 0x0000E201
  45. #define MSG_TDATA_IND 0x0000E202
  46. #define MSG_TDATA_RESP 0x0908E203
  47. #define MSG_SELP_REQ 0x09004000
  48. #define MSG_SELP_CONF 0x00004001
  49. #define MSG_ACT_TRANSP_REQ 0x0908E000
  50. #define MSG_ACT_TRANSP_CONF 0x0000E001
  51. #define MSG_STPROT_REQ 0x09004100
  52. #define MSG_STPROT_CONF 0x00004101
  53. #define MSG_PING188_REQ 0x09030500
  54. #define MSG_PING188_CONF 0x000005bc
  55. #define MSG_WATCH188 0x09030400
  56. #define MSG_API_ON 0x08020102
  57. #define MSG_POOL_PCBIT 0x08020400
  58. #define MSG_POOL_PCBIT_CONF 0x00000401
  59. #define MSG_INFO_IND 0x00002602
  60. #define MSG_INFO_RESP 0x08002603
  61. #define MSG_DEBUG_188 0x0000ff00
  62. /*
  63. long 4 3 2 1
  64. Intel 1 2 3 4
  65. */
  66. #ifdef __LITTLE_ENDIAN
  67. #define SET_MSG_SCMD(msg, ch) (msg = (msg & 0xffffff00) | (((ch) & 0xff)))
  68. #define SET_MSG_CMD(msg, ch) (msg = (msg & 0xffff00ff) | (((ch) & 0xff) << 8))
  69. #define SET_MSG_PROC(msg, ch) (msg = (msg & 0xff00ffff) | (((ch) & 0xff) << 16))
  70. #define SET_MSG_CPU(msg, ch) (msg = (msg & 0x00ffffff) | (((ch) & 0xff) << 24))
  71. #define GET_MSG_SCMD(msg) ((msg) & 0xFF)
  72. #define GET_MSG_CMD(msg) ((msg) >> 8 & 0xFF)
  73. #define GET_MSG_PROC(msg) ((msg) >> 16 & 0xFF)
  74. #define GET_MSG_CPU(msg) ((msg) >> 24)
  75. #else
  76. #error "Non-Intel CPU"
  77. #endif
  78. #define MAX_QUEUED 7
  79. #define SCHED_READ 0x01
  80. #define SCHED_WRITE 0x02
  81. #define SET_RUN_TIMEOUT 2 * HZ /* 2 seconds */
  82. struct frame_buf {
  83. ulong msg;
  84. unsigned int refnum;
  85. unsigned int dt_len;
  86. unsigned int hdr_len;
  87. struct sk_buff *skb;
  88. unsigned int copied;
  89. struct frame_buf *next;
  90. };
  91. extern int pcbit_l2_write(struct pcbit_dev *dev, ulong msg, ushort refnum,
  92. struct sk_buff *skb, unsigned short hdr_len);
  93. extern irqreturn_t pcbit_irq_handler(int interrupt, void *);
  94. extern struct pcbit_dev *dev_pcbit[MAX_PCBIT_CARDS];
  95. #ifdef DEBUG
  96. static __inline__ void log_state(struct pcbit_dev *dev) {
  97. printk(KERN_DEBUG "writeptr = %ld\n",
  98. (ulong) (dev->writeptr - dev->sh_mem));
  99. printk(KERN_DEBUG "readptr = %ld\n",
  100. (ulong) (dev->readptr - (dev->sh_mem + BANK2)));
  101. printk(KERN_DEBUG "{rcv_seq=%01x, send_seq=%01x, unack_seq=%01x}\n",
  102. dev->rcv_seq, dev->send_seq, dev->unack_seq);
  103. }
  104. #endif
  105. static __inline__ struct pcbit_dev *chan2dev(struct pcbit_chan *chan)
  106. {
  107. struct pcbit_dev *dev;
  108. int i;
  109. for (i = 0; i < MAX_PCBIT_CARDS; i++)
  110. if ((dev = dev_pcbit[i]))
  111. if (dev->b1 == chan || dev->b2 == chan)
  112. return dev;
  113. return NULL;
  114. }
  115. static __inline__ struct pcbit_dev *finddev(int id)
  116. {
  117. struct pcbit_dev *dev;
  118. int i;
  119. for (i = 0; i < MAX_PCBIT_CARDS; i++)
  120. if ((dev = dev_pcbit[i]))
  121. if (dev->id == id)
  122. return dev;
  123. return NULL;
  124. }
  125. /*
  126. * Support routines for reading and writing in the board
  127. */
  128. static __inline__ void pcbit_writeb(struct pcbit_dev *dev, unsigned char dt)
  129. {
  130. writeb(dt, dev->writeptr++);
  131. if (dev->writeptr == dev->sh_mem + BANKLEN)
  132. dev->writeptr = dev->sh_mem;
  133. }
  134. static __inline__ void pcbit_writew(struct pcbit_dev *dev, unsigned short dt)
  135. {
  136. int dist;
  137. dist = BANKLEN - (dev->writeptr - dev->sh_mem);
  138. switch (dist) {
  139. case 2:
  140. writew(dt, dev->writeptr);
  141. dev->writeptr = dev->sh_mem;
  142. break;
  143. case 1:
  144. writeb((u_char) (dt & 0x00ffU), dev->writeptr);
  145. dev->writeptr = dev->sh_mem;
  146. writeb((u_char) (dt >> 8), dev->writeptr++);
  147. break;
  148. default:
  149. writew(dt, dev->writeptr);
  150. dev->writeptr += 2;
  151. break;
  152. };
  153. }
  154. static __inline__ void memcpy_topcbit(struct pcbit_dev *dev, u_char *data,
  155. int len)
  156. {
  157. int diff;
  158. diff = len - (BANKLEN - (dev->writeptr - dev->sh_mem));
  159. if (diff > 0)
  160. {
  161. memcpy_toio(dev->writeptr, data, len - diff);
  162. memcpy_toio(dev->sh_mem, data + (len - diff), diff);
  163. dev->writeptr = dev->sh_mem + diff;
  164. }
  165. else
  166. {
  167. memcpy_toio(dev->writeptr, data, len);
  168. dev->writeptr += len;
  169. if (diff == 0)
  170. dev->writeptr = dev->sh_mem;
  171. }
  172. }
  173. static __inline__ unsigned char pcbit_readb(struct pcbit_dev *dev)
  174. {
  175. unsigned char val;
  176. val = readb(dev->readptr++);
  177. if (dev->readptr == dev->sh_mem + BANK2 + BANKLEN)
  178. dev->readptr = dev->sh_mem + BANK2;
  179. return val;
  180. }
  181. static __inline__ unsigned short pcbit_readw(struct pcbit_dev *dev)
  182. {
  183. int dist;
  184. unsigned short val;
  185. dist = BANKLEN - (dev->readptr - (dev->sh_mem + BANK2));
  186. switch (dist) {
  187. case 2:
  188. val = readw(dev->readptr);
  189. dev->readptr = dev->sh_mem + BANK2;
  190. break;
  191. case 1:
  192. val = readb(dev->readptr);
  193. dev->readptr = dev->sh_mem + BANK2;
  194. val = (readb(dev->readptr++) << 8) | val;
  195. break;
  196. default:
  197. val = readw(dev->readptr);
  198. dev->readptr += 2;
  199. break;
  200. };
  201. return val;
  202. }
  203. static __inline__ void memcpy_frompcbit(struct pcbit_dev *dev, u_char *data, int len)
  204. {
  205. int diff;
  206. diff = len - (BANKLEN - (dev->readptr - (dev->sh_mem + BANK2)));
  207. if (diff > 0)
  208. {
  209. memcpy_fromio(data, dev->readptr, len - diff);
  210. memcpy_fromio(data + (len - diff), dev->sh_mem + BANK2 , diff);
  211. dev->readptr = dev->sh_mem + BANK2 + diff;
  212. }
  213. else
  214. {
  215. memcpy_fromio(data, dev->readptr, len);
  216. dev->readptr += len;
  217. if (diff == 0)
  218. dev->readptr = dev->sh_mem + BANK2;
  219. }
  220. }
  221. #endif