smu.c 30 KB

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  1. /*
  2. * PowerMac G5 SMU driver
  3. *
  4. * Copyright 2004 J. Mayer <l_indien@magic.fr>
  5. * Copyright 2005 Benjamin Herrenschmidt, IBM Corp.
  6. *
  7. * Released under the term of the GNU GPL v2.
  8. */
  9. /*
  10. * TODO:
  11. * - maybe add timeout to commands ?
  12. * - blocking version of time functions
  13. * - polling version of i2c commands (including timer that works with
  14. * interrupts off)
  15. * - maybe avoid some data copies with i2c by directly using the smu cmd
  16. * buffer and a lower level internal interface
  17. * - understand SMU -> CPU events and implement reception of them via
  18. * the userland interface
  19. */
  20. #include <linux/types.h>
  21. #include <linux/kernel.h>
  22. #include <linux/device.h>
  23. #include <linux/dmapool.h>
  24. #include <linux/bootmem.h>
  25. #include <linux/vmalloc.h>
  26. #include <linux/highmem.h>
  27. #include <linux/jiffies.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/rtc.h>
  30. #include <linux/completion.h>
  31. #include <linux/miscdevice.h>
  32. #include <linux/delay.h>
  33. #include <linux/poll.h>
  34. #include <linux/mutex.h>
  35. #include <linux/of_device.h>
  36. #include <linux/of_irq.h>
  37. #include <linux/of_platform.h>
  38. #include <linux/slab.h>
  39. #include <asm/byteorder.h>
  40. #include <asm/io.h>
  41. #include <asm/prom.h>
  42. #include <asm/machdep.h>
  43. #include <asm/pmac_feature.h>
  44. #include <asm/smu.h>
  45. #include <asm/sections.h>
  46. #include <asm/uaccess.h>
  47. #define VERSION "0.7"
  48. #define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp."
  49. #undef DEBUG_SMU
  50. #ifdef DEBUG_SMU
  51. #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0)
  52. #else
  53. #define DPRINTK(fmt, args...) do { } while (0)
  54. #endif
  55. /*
  56. * This is the command buffer passed to the SMU hardware
  57. */
  58. #define SMU_MAX_DATA 254
  59. struct smu_cmd_buf {
  60. u8 cmd;
  61. u8 length;
  62. u8 data[SMU_MAX_DATA];
  63. };
  64. struct smu_device {
  65. spinlock_t lock;
  66. struct device_node *of_node;
  67. struct platform_device *of_dev;
  68. int doorbell; /* doorbell gpio */
  69. u32 __iomem *db_buf; /* doorbell buffer */
  70. struct device_node *db_node;
  71. unsigned int db_irq;
  72. int msg;
  73. struct device_node *msg_node;
  74. unsigned int msg_irq;
  75. struct smu_cmd_buf *cmd_buf; /* command buffer virtual */
  76. u32 cmd_buf_abs; /* command buffer absolute */
  77. struct list_head cmd_list;
  78. struct smu_cmd *cmd_cur; /* pending command */
  79. int broken_nap;
  80. struct list_head cmd_i2c_list;
  81. struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */
  82. struct timer_list i2c_timer;
  83. };
  84. /*
  85. * I don't think there will ever be more than one SMU, so
  86. * for now, just hard code that
  87. */
  88. static DEFINE_MUTEX(smu_mutex);
  89. static struct smu_device *smu;
  90. static DEFINE_MUTEX(smu_part_access);
  91. static int smu_irq_inited;
  92. static void smu_i2c_retry(unsigned long data);
  93. /*
  94. * SMU driver low level stuff
  95. */
  96. static void smu_start_cmd(void)
  97. {
  98. unsigned long faddr, fend;
  99. struct smu_cmd *cmd;
  100. if (list_empty(&smu->cmd_list))
  101. return;
  102. /* Fetch first command in queue */
  103. cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link);
  104. smu->cmd_cur = cmd;
  105. list_del(&cmd->link);
  106. DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd,
  107. cmd->data_len);
  108. DPRINTK("SMU: data buffer: %8ph\n", cmd->data_buf);
  109. /* Fill the SMU command buffer */
  110. smu->cmd_buf->cmd = cmd->cmd;
  111. smu->cmd_buf->length = cmd->data_len;
  112. memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len);
  113. /* Flush command and data to RAM */
  114. faddr = (unsigned long)smu->cmd_buf;
  115. fend = faddr + smu->cmd_buf->length + 2;
  116. flush_inval_dcache_range(faddr, fend);
  117. /* We also disable NAP mode for the duration of the command
  118. * on U3 based machines.
  119. * This is slightly racy as it can be written back to 1 by a sysctl
  120. * but that never happens in practice. There seem to be an issue with
  121. * U3 based machines such as the iMac G5 where napping for the
  122. * whole duration of the command prevents the SMU from fetching it
  123. * from memory. This might be related to the strange i2c based
  124. * mechanism the SMU uses to access memory.
  125. */
  126. if (smu->broken_nap)
  127. powersave_nap = 0;
  128. /* This isn't exactly a DMA mapping here, I suspect
  129. * the SMU is actually communicating with us via i2c to the
  130. * northbridge or the CPU to access RAM.
  131. */
  132. writel(smu->cmd_buf_abs, smu->db_buf);
  133. /* Ring the SMU doorbell */
  134. pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4);
  135. }
  136. static irqreturn_t smu_db_intr(int irq, void *arg)
  137. {
  138. unsigned long flags;
  139. struct smu_cmd *cmd;
  140. void (*done)(struct smu_cmd *cmd, void *misc) = NULL;
  141. void *misc = NULL;
  142. u8 gpio;
  143. int rc = 0;
  144. /* SMU completed the command, well, we hope, let's make sure
  145. * of it
  146. */
  147. spin_lock_irqsave(&smu->lock, flags);
  148. gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
  149. if ((gpio & 7) != 7) {
  150. spin_unlock_irqrestore(&smu->lock, flags);
  151. return IRQ_HANDLED;
  152. }
  153. cmd = smu->cmd_cur;
  154. smu->cmd_cur = NULL;
  155. if (cmd == NULL)
  156. goto bail;
  157. if (rc == 0) {
  158. unsigned long faddr;
  159. int reply_len;
  160. u8 ack;
  161. /* CPU might have brought back the cache line, so we need
  162. * to flush again before peeking at the SMU response. We
  163. * flush the entire buffer for now as we haven't read the
  164. * reply length (it's only 2 cache lines anyway)
  165. */
  166. faddr = (unsigned long)smu->cmd_buf;
  167. flush_inval_dcache_range(faddr, faddr + 256);
  168. /* Now check ack */
  169. ack = (~cmd->cmd) & 0xff;
  170. if (ack != smu->cmd_buf->cmd) {
  171. DPRINTK("SMU: incorrect ack, want %x got %x\n",
  172. ack, smu->cmd_buf->cmd);
  173. rc = -EIO;
  174. }
  175. reply_len = rc == 0 ? smu->cmd_buf->length : 0;
  176. DPRINTK("SMU: reply len: %d\n", reply_len);
  177. if (reply_len > cmd->reply_len) {
  178. printk(KERN_WARNING "SMU: reply buffer too small,"
  179. "got %d bytes for a %d bytes buffer\n",
  180. reply_len, cmd->reply_len);
  181. reply_len = cmd->reply_len;
  182. }
  183. cmd->reply_len = reply_len;
  184. if (cmd->reply_buf && reply_len)
  185. memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len);
  186. }
  187. /* Now complete the command. Write status last in order as we lost
  188. * ownership of the command structure as soon as it's no longer -1
  189. */
  190. done = cmd->done;
  191. misc = cmd->misc;
  192. mb();
  193. cmd->status = rc;
  194. /* Re-enable NAP mode */
  195. if (smu->broken_nap)
  196. powersave_nap = 1;
  197. bail:
  198. /* Start next command if any */
  199. smu_start_cmd();
  200. spin_unlock_irqrestore(&smu->lock, flags);
  201. /* Call command completion handler if any */
  202. if (done)
  203. done(cmd, misc);
  204. /* It's an edge interrupt, nothing to do */
  205. return IRQ_HANDLED;
  206. }
  207. static irqreturn_t smu_msg_intr(int irq, void *arg)
  208. {
  209. /* I don't quite know what to do with this one, we seem to never
  210. * receive it, so I suspect we have to arm it someway in the SMU
  211. * to start getting events that way.
  212. */
  213. printk(KERN_INFO "SMU: message interrupt !\n");
  214. /* It's an edge interrupt, nothing to do */
  215. return IRQ_HANDLED;
  216. }
  217. /*
  218. * Queued command management.
  219. *
  220. */
  221. int smu_queue_cmd(struct smu_cmd *cmd)
  222. {
  223. unsigned long flags;
  224. if (smu == NULL)
  225. return -ENODEV;
  226. if (cmd->data_len > SMU_MAX_DATA ||
  227. cmd->reply_len > SMU_MAX_DATA)
  228. return -EINVAL;
  229. cmd->status = 1;
  230. spin_lock_irqsave(&smu->lock, flags);
  231. list_add_tail(&cmd->link, &smu->cmd_list);
  232. if (smu->cmd_cur == NULL)
  233. smu_start_cmd();
  234. spin_unlock_irqrestore(&smu->lock, flags);
  235. /* Workaround for early calls when irq isn't available */
  236. if (!smu_irq_inited || smu->db_irq == NO_IRQ)
  237. smu_spinwait_cmd(cmd);
  238. return 0;
  239. }
  240. EXPORT_SYMBOL(smu_queue_cmd);
  241. int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command,
  242. unsigned int data_len,
  243. void (*done)(struct smu_cmd *cmd, void *misc),
  244. void *misc, ...)
  245. {
  246. struct smu_cmd *cmd = &scmd->cmd;
  247. va_list list;
  248. int i;
  249. if (data_len > sizeof(scmd->buffer))
  250. return -EINVAL;
  251. memset(scmd, 0, sizeof(*scmd));
  252. cmd->cmd = command;
  253. cmd->data_len = data_len;
  254. cmd->data_buf = scmd->buffer;
  255. cmd->reply_len = sizeof(scmd->buffer);
  256. cmd->reply_buf = scmd->buffer;
  257. cmd->done = done;
  258. cmd->misc = misc;
  259. va_start(list, misc);
  260. for (i = 0; i < data_len; ++i)
  261. scmd->buffer[i] = (u8)va_arg(list, int);
  262. va_end(list);
  263. return smu_queue_cmd(cmd);
  264. }
  265. EXPORT_SYMBOL(smu_queue_simple);
  266. void smu_poll(void)
  267. {
  268. u8 gpio;
  269. if (smu == NULL)
  270. return;
  271. gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
  272. if ((gpio & 7) == 7)
  273. smu_db_intr(smu->db_irq, smu);
  274. }
  275. EXPORT_SYMBOL(smu_poll);
  276. void smu_done_complete(struct smu_cmd *cmd, void *misc)
  277. {
  278. struct completion *comp = misc;
  279. complete(comp);
  280. }
  281. EXPORT_SYMBOL(smu_done_complete);
  282. void smu_spinwait_cmd(struct smu_cmd *cmd)
  283. {
  284. while(cmd->status == 1)
  285. smu_poll();
  286. }
  287. EXPORT_SYMBOL(smu_spinwait_cmd);
  288. /* RTC low level commands */
  289. static inline int bcd2hex (int n)
  290. {
  291. return (((n & 0xf0) >> 4) * 10) + (n & 0xf);
  292. }
  293. static inline int hex2bcd (int n)
  294. {
  295. return ((n / 10) << 4) + (n % 10);
  296. }
  297. static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf,
  298. struct rtc_time *time)
  299. {
  300. cmd_buf->cmd = 0x8e;
  301. cmd_buf->length = 8;
  302. cmd_buf->data[0] = 0x80;
  303. cmd_buf->data[1] = hex2bcd(time->tm_sec);
  304. cmd_buf->data[2] = hex2bcd(time->tm_min);
  305. cmd_buf->data[3] = hex2bcd(time->tm_hour);
  306. cmd_buf->data[4] = time->tm_wday;
  307. cmd_buf->data[5] = hex2bcd(time->tm_mday);
  308. cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1;
  309. cmd_buf->data[7] = hex2bcd(time->tm_year - 100);
  310. }
  311. int smu_get_rtc_time(struct rtc_time *time, int spinwait)
  312. {
  313. struct smu_simple_cmd cmd;
  314. int rc;
  315. if (smu == NULL)
  316. return -ENODEV;
  317. memset(time, 0, sizeof(struct rtc_time));
  318. rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL,
  319. SMU_CMD_RTC_GET_DATETIME);
  320. if (rc)
  321. return rc;
  322. smu_spinwait_simple(&cmd);
  323. time->tm_sec = bcd2hex(cmd.buffer[0]);
  324. time->tm_min = bcd2hex(cmd.buffer[1]);
  325. time->tm_hour = bcd2hex(cmd.buffer[2]);
  326. time->tm_wday = bcd2hex(cmd.buffer[3]);
  327. time->tm_mday = bcd2hex(cmd.buffer[4]);
  328. time->tm_mon = bcd2hex(cmd.buffer[5]) - 1;
  329. time->tm_year = bcd2hex(cmd.buffer[6]) + 100;
  330. return 0;
  331. }
  332. int smu_set_rtc_time(struct rtc_time *time, int spinwait)
  333. {
  334. struct smu_simple_cmd cmd;
  335. int rc;
  336. if (smu == NULL)
  337. return -ENODEV;
  338. rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL,
  339. SMU_CMD_RTC_SET_DATETIME,
  340. hex2bcd(time->tm_sec),
  341. hex2bcd(time->tm_min),
  342. hex2bcd(time->tm_hour),
  343. time->tm_wday,
  344. hex2bcd(time->tm_mday),
  345. hex2bcd(time->tm_mon) + 1,
  346. hex2bcd(time->tm_year - 100));
  347. if (rc)
  348. return rc;
  349. smu_spinwait_simple(&cmd);
  350. return 0;
  351. }
  352. void smu_shutdown(void)
  353. {
  354. struct smu_simple_cmd cmd;
  355. if (smu == NULL)
  356. return;
  357. if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL,
  358. 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0))
  359. return;
  360. smu_spinwait_simple(&cmd);
  361. for (;;)
  362. ;
  363. }
  364. void smu_restart(void)
  365. {
  366. struct smu_simple_cmd cmd;
  367. if (smu == NULL)
  368. return;
  369. if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL,
  370. 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0))
  371. return;
  372. smu_spinwait_simple(&cmd);
  373. for (;;)
  374. ;
  375. }
  376. int smu_present(void)
  377. {
  378. return smu != NULL;
  379. }
  380. EXPORT_SYMBOL(smu_present);
  381. int __init smu_init (void)
  382. {
  383. struct device_node *np;
  384. const u32 *data;
  385. int ret = 0;
  386. np = of_find_node_by_type(NULL, "smu");
  387. if (np == NULL)
  388. return -ENODEV;
  389. printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR);
  390. if (smu_cmdbuf_abs == 0) {
  391. printk(KERN_ERR "SMU: Command buffer not allocated !\n");
  392. ret = -EINVAL;
  393. goto fail_np;
  394. }
  395. smu = alloc_bootmem(sizeof(struct smu_device));
  396. spin_lock_init(&smu->lock);
  397. INIT_LIST_HEAD(&smu->cmd_list);
  398. INIT_LIST_HEAD(&smu->cmd_i2c_list);
  399. smu->of_node = np;
  400. smu->db_irq = NO_IRQ;
  401. smu->msg_irq = NO_IRQ;
  402. /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a
  403. * 32 bits value safely
  404. */
  405. smu->cmd_buf_abs = (u32)smu_cmdbuf_abs;
  406. smu->cmd_buf = __va(smu_cmdbuf_abs);
  407. smu->db_node = of_find_node_by_name(NULL, "smu-doorbell");
  408. if (smu->db_node == NULL) {
  409. printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n");
  410. ret = -ENXIO;
  411. goto fail_bootmem;
  412. }
  413. data = of_get_property(smu->db_node, "reg", NULL);
  414. if (data == NULL) {
  415. printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n");
  416. ret = -ENXIO;
  417. goto fail_db_node;
  418. }
  419. /* Current setup has one doorbell GPIO that does both doorbell
  420. * and ack. GPIOs are at 0x50, best would be to find that out
  421. * in the device-tree though.
  422. */
  423. smu->doorbell = *data;
  424. if (smu->doorbell < 0x50)
  425. smu->doorbell += 0x50;
  426. /* Now look for the smu-interrupt GPIO */
  427. do {
  428. smu->msg_node = of_find_node_by_name(NULL, "smu-interrupt");
  429. if (smu->msg_node == NULL)
  430. break;
  431. data = of_get_property(smu->msg_node, "reg", NULL);
  432. if (data == NULL) {
  433. of_node_put(smu->msg_node);
  434. smu->msg_node = NULL;
  435. break;
  436. }
  437. smu->msg = *data;
  438. if (smu->msg < 0x50)
  439. smu->msg += 0x50;
  440. } while(0);
  441. /* Doorbell buffer is currently hard-coded, I didn't find a proper
  442. * device-tree entry giving the address. Best would probably to use
  443. * an offset for K2 base though, but let's do it that way for now.
  444. */
  445. smu->db_buf = ioremap(0x8000860c, 0x1000);
  446. if (smu->db_buf == NULL) {
  447. printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n");
  448. ret = -ENXIO;
  449. goto fail_msg_node;
  450. }
  451. /* U3 has an issue with NAP mode when issuing SMU commands */
  452. smu->broken_nap = pmac_get_uninorth_variant() < 4;
  453. if (smu->broken_nap)
  454. printk(KERN_INFO "SMU: using NAP mode workaround\n");
  455. sys_ctrler = SYS_CTRLER_SMU;
  456. return 0;
  457. fail_msg_node:
  458. of_node_put(smu->msg_node);
  459. fail_db_node:
  460. of_node_put(smu->db_node);
  461. fail_bootmem:
  462. free_bootmem(__pa(smu), sizeof(struct smu_device));
  463. smu = NULL;
  464. fail_np:
  465. of_node_put(np);
  466. return ret;
  467. }
  468. static int smu_late_init(void)
  469. {
  470. if (!smu)
  471. return 0;
  472. init_timer(&smu->i2c_timer);
  473. smu->i2c_timer.function = smu_i2c_retry;
  474. smu->i2c_timer.data = (unsigned long)smu;
  475. if (smu->db_node) {
  476. smu->db_irq = irq_of_parse_and_map(smu->db_node, 0);
  477. if (smu->db_irq == NO_IRQ)
  478. printk(KERN_ERR "smu: failed to map irq for node %s\n",
  479. smu->db_node->full_name);
  480. }
  481. if (smu->msg_node) {
  482. smu->msg_irq = irq_of_parse_and_map(smu->msg_node, 0);
  483. if (smu->msg_irq == NO_IRQ)
  484. printk(KERN_ERR "smu: failed to map irq for node %s\n",
  485. smu->msg_node->full_name);
  486. }
  487. /*
  488. * Try to request the interrupts
  489. */
  490. if (smu->db_irq != NO_IRQ) {
  491. if (request_irq(smu->db_irq, smu_db_intr,
  492. IRQF_SHARED, "SMU doorbell", smu) < 0) {
  493. printk(KERN_WARNING "SMU: can't "
  494. "request interrupt %d\n",
  495. smu->db_irq);
  496. smu->db_irq = NO_IRQ;
  497. }
  498. }
  499. if (smu->msg_irq != NO_IRQ) {
  500. if (request_irq(smu->msg_irq, smu_msg_intr,
  501. IRQF_SHARED, "SMU message", smu) < 0) {
  502. printk(KERN_WARNING "SMU: can't "
  503. "request interrupt %d\n",
  504. smu->msg_irq);
  505. smu->msg_irq = NO_IRQ;
  506. }
  507. }
  508. smu_irq_inited = 1;
  509. return 0;
  510. }
  511. /* This has to be before arch_initcall as the low i2c stuff relies on the
  512. * above having been done before we reach arch_initcalls
  513. */
  514. core_initcall(smu_late_init);
  515. /*
  516. * sysfs visibility
  517. */
  518. static void smu_expose_childs(struct work_struct *unused)
  519. {
  520. struct device_node *np;
  521. for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;)
  522. if (of_device_is_compatible(np, "smu-sensors"))
  523. of_platform_device_create(np, "smu-sensors",
  524. &smu->of_dev->dev);
  525. }
  526. static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs);
  527. static int smu_platform_probe(struct platform_device* dev)
  528. {
  529. if (!smu)
  530. return -ENODEV;
  531. smu->of_dev = dev;
  532. /*
  533. * Ok, we are matched, now expose all i2c busses. We have to defer
  534. * that unfortunately or it would deadlock inside the device model
  535. */
  536. schedule_work(&smu_expose_childs_work);
  537. return 0;
  538. }
  539. static const struct of_device_id smu_platform_match[] =
  540. {
  541. {
  542. .type = "smu",
  543. },
  544. {},
  545. };
  546. static struct platform_driver smu_of_platform_driver =
  547. {
  548. .driver = {
  549. .name = "smu",
  550. .of_match_table = smu_platform_match,
  551. },
  552. .probe = smu_platform_probe,
  553. };
  554. static int __init smu_init_sysfs(void)
  555. {
  556. /*
  557. * For now, we don't power manage machines with an SMU chip,
  558. * I'm a bit too far from figuring out how that works with those
  559. * new chipsets, but that will come back and bite us
  560. */
  561. platform_driver_register(&smu_of_platform_driver);
  562. return 0;
  563. }
  564. device_initcall(smu_init_sysfs);
  565. struct platform_device *smu_get_ofdev(void)
  566. {
  567. if (!smu)
  568. return NULL;
  569. return smu->of_dev;
  570. }
  571. EXPORT_SYMBOL_GPL(smu_get_ofdev);
  572. /*
  573. * i2c interface
  574. */
  575. static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail)
  576. {
  577. void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done;
  578. void *misc = cmd->misc;
  579. unsigned long flags;
  580. /* Check for read case */
  581. if (!fail && cmd->read) {
  582. if (cmd->pdata[0] < 1)
  583. fail = 1;
  584. else
  585. memcpy(cmd->info.data, &cmd->pdata[1],
  586. cmd->info.datalen);
  587. }
  588. DPRINTK("SMU: completing, success: %d\n", !fail);
  589. /* Update status and mark no pending i2c command with lock
  590. * held so nobody comes in while we dequeue an eventual
  591. * pending next i2c command
  592. */
  593. spin_lock_irqsave(&smu->lock, flags);
  594. smu->cmd_i2c_cur = NULL;
  595. wmb();
  596. cmd->status = fail ? -EIO : 0;
  597. /* Is there another i2c command waiting ? */
  598. if (!list_empty(&smu->cmd_i2c_list)) {
  599. struct smu_i2c_cmd *newcmd;
  600. /* Fetch it, new current, remove from list */
  601. newcmd = list_entry(smu->cmd_i2c_list.next,
  602. struct smu_i2c_cmd, link);
  603. smu->cmd_i2c_cur = newcmd;
  604. list_del(&cmd->link);
  605. /* Queue with low level smu */
  606. list_add_tail(&cmd->scmd.link, &smu->cmd_list);
  607. if (smu->cmd_cur == NULL)
  608. smu_start_cmd();
  609. }
  610. spin_unlock_irqrestore(&smu->lock, flags);
  611. /* Call command completion handler if any */
  612. if (done)
  613. done(cmd, misc);
  614. }
  615. static void smu_i2c_retry(unsigned long data)
  616. {
  617. struct smu_i2c_cmd *cmd = smu->cmd_i2c_cur;
  618. DPRINTK("SMU: i2c failure, requeuing...\n");
  619. /* requeue command simply by resetting reply_len */
  620. cmd->pdata[0] = 0xff;
  621. cmd->scmd.reply_len = sizeof(cmd->pdata);
  622. smu_queue_cmd(&cmd->scmd);
  623. }
  624. static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc)
  625. {
  626. struct smu_i2c_cmd *cmd = misc;
  627. int fail = 0;
  628. DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n",
  629. cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len);
  630. /* Check for possible status */
  631. if (scmd->status < 0)
  632. fail = 1;
  633. else if (cmd->read) {
  634. if (cmd->stage == 0)
  635. fail = cmd->pdata[0] != 0;
  636. else
  637. fail = cmd->pdata[0] >= 0x80;
  638. } else {
  639. fail = cmd->pdata[0] != 0;
  640. }
  641. /* Handle failures by requeuing command, after 5ms interval
  642. */
  643. if (fail && --cmd->retries > 0) {
  644. DPRINTK("SMU: i2c failure, starting timer...\n");
  645. BUG_ON(cmd != smu->cmd_i2c_cur);
  646. if (!smu_irq_inited) {
  647. mdelay(5);
  648. smu_i2c_retry(0);
  649. return;
  650. }
  651. mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5));
  652. return;
  653. }
  654. /* If failure or stage 1, command is complete */
  655. if (fail || cmd->stage != 0) {
  656. smu_i2c_complete_command(cmd, fail);
  657. return;
  658. }
  659. DPRINTK("SMU: going to stage 1\n");
  660. /* Ok, initial command complete, now poll status */
  661. scmd->reply_buf = cmd->pdata;
  662. scmd->reply_len = sizeof(cmd->pdata);
  663. scmd->data_buf = cmd->pdata;
  664. scmd->data_len = 1;
  665. cmd->pdata[0] = 0;
  666. cmd->stage = 1;
  667. cmd->retries = 20;
  668. smu_queue_cmd(scmd);
  669. }
  670. int smu_queue_i2c(struct smu_i2c_cmd *cmd)
  671. {
  672. unsigned long flags;
  673. if (smu == NULL)
  674. return -ENODEV;
  675. /* Fill most fields of scmd */
  676. cmd->scmd.cmd = SMU_CMD_I2C_COMMAND;
  677. cmd->scmd.done = smu_i2c_low_completion;
  678. cmd->scmd.misc = cmd;
  679. cmd->scmd.reply_buf = cmd->pdata;
  680. cmd->scmd.reply_len = sizeof(cmd->pdata);
  681. cmd->scmd.data_buf = (u8 *)(char *)&cmd->info;
  682. cmd->scmd.status = 1;
  683. cmd->stage = 0;
  684. cmd->pdata[0] = 0xff;
  685. cmd->retries = 20;
  686. cmd->status = 1;
  687. /* Check transfer type, sanitize some "info" fields
  688. * based on transfer type and do more checking
  689. */
  690. cmd->info.caddr = cmd->info.devaddr;
  691. cmd->read = cmd->info.devaddr & 0x01;
  692. switch(cmd->info.type) {
  693. case SMU_I2C_TRANSFER_SIMPLE:
  694. memset(&cmd->info.sublen, 0, 4);
  695. break;
  696. case SMU_I2C_TRANSFER_COMBINED:
  697. cmd->info.devaddr &= 0xfe;
  698. case SMU_I2C_TRANSFER_STDSUB:
  699. if (cmd->info.sublen > 3)
  700. return -EINVAL;
  701. break;
  702. default:
  703. return -EINVAL;
  704. }
  705. /* Finish setting up command based on transfer direction
  706. */
  707. if (cmd->read) {
  708. if (cmd->info.datalen > SMU_I2C_READ_MAX)
  709. return -EINVAL;
  710. memset(cmd->info.data, 0xff, cmd->info.datalen);
  711. cmd->scmd.data_len = 9;
  712. } else {
  713. if (cmd->info.datalen > SMU_I2C_WRITE_MAX)
  714. return -EINVAL;
  715. cmd->scmd.data_len = 9 + cmd->info.datalen;
  716. }
  717. DPRINTK("SMU: i2c enqueuing command\n");
  718. DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n",
  719. cmd->read ? "read" : "write", cmd->info.datalen,
  720. cmd->info.bus, cmd->info.caddr,
  721. cmd->info.subaddr[0], cmd->info.type);
  722. /* Enqueue command in i2c list, and if empty, enqueue also in
  723. * main command list
  724. */
  725. spin_lock_irqsave(&smu->lock, flags);
  726. if (smu->cmd_i2c_cur == NULL) {
  727. smu->cmd_i2c_cur = cmd;
  728. list_add_tail(&cmd->scmd.link, &smu->cmd_list);
  729. if (smu->cmd_cur == NULL)
  730. smu_start_cmd();
  731. } else
  732. list_add_tail(&cmd->link, &smu->cmd_i2c_list);
  733. spin_unlock_irqrestore(&smu->lock, flags);
  734. return 0;
  735. }
  736. /*
  737. * Handling of "partitions"
  738. */
  739. static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len)
  740. {
  741. DECLARE_COMPLETION_ONSTACK(comp);
  742. unsigned int chunk;
  743. struct smu_cmd cmd;
  744. int rc;
  745. u8 params[8];
  746. /* We currently use a chunk size of 0xe. We could check the
  747. * SMU firmware version and use bigger sizes though
  748. */
  749. chunk = 0xe;
  750. while (len) {
  751. unsigned int clen = min(len, chunk);
  752. cmd.cmd = SMU_CMD_MISC_ee_COMMAND;
  753. cmd.data_len = 7;
  754. cmd.data_buf = params;
  755. cmd.reply_len = chunk;
  756. cmd.reply_buf = dest;
  757. cmd.done = smu_done_complete;
  758. cmd.misc = &comp;
  759. params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC;
  760. params[1] = 0x4;
  761. *((u32 *)&params[2]) = addr;
  762. params[6] = clen;
  763. rc = smu_queue_cmd(&cmd);
  764. if (rc)
  765. return rc;
  766. wait_for_completion(&comp);
  767. if (cmd.status != 0)
  768. return rc;
  769. if (cmd.reply_len != clen) {
  770. printk(KERN_DEBUG "SMU: short read in "
  771. "smu_read_datablock, got: %d, want: %d\n",
  772. cmd.reply_len, clen);
  773. return -EIO;
  774. }
  775. len -= clen;
  776. addr += clen;
  777. dest += clen;
  778. }
  779. return 0;
  780. }
  781. static struct smu_sdbp_header *smu_create_sdb_partition(int id)
  782. {
  783. DECLARE_COMPLETION_ONSTACK(comp);
  784. struct smu_simple_cmd cmd;
  785. unsigned int addr, len, tlen;
  786. struct smu_sdbp_header *hdr;
  787. struct property *prop;
  788. /* First query the partition info */
  789. DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq);
  790. smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2,
  791. smu_done_complete, &comp,
  792. SMU_CMD_PARTITION_LATEST, id);
  793. wait_for_completion(&comp);
  794. DPRINTK("SMU: done, status: %d, reply_len: %d\n",
  795. cmd.cmd.status, cmd.cmd.reply_len);
  796. /* Partition doesn't exist (or other error) */
  797. if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6)
  798. return NULL;
  799. /* Fetch address and length from reply */
  800. addr = *((u16 *)cmd.buffer);
  801. len = cmd.buffer[3] << 2;
  802. /* Calucluate total length to allocate, including the 17 bytes
  803. * for "sdb-partition-XX" that we append at the end of the buffer
  804. */
  805. tlen = sizeof(struct property) + len + 18;
  806. prop = kzalloc(tlen, GFP_KERNEL);
  807. if (prop == NULL)
  808. return NULL;
  809. hdr = (struct smu_sdbp_header *)(prop + 1);
  810. prop->name = ((char *)prop) + tlen - 18;
  811. sprintf(prop->name, "sdb-partition-%02x", id);
  812. prop->length = len;
  813. prop->value = hdr;
  814. prop->next = NULL;
  815. /* Read the datablock */
  816. if (smu_read_datablock((u8 *)hdr, addr, len)) {
  817. printk(KERN_DEBUG "SMU: datablock read failed while reading "
  818. "partition %02x !\n", id);
  819. goto failure;
  820. }
  821. /* Got it, check a few things and create the property */
  822. if (hdr->id != id) {
  823. printk(KERN_DEBUG "SMU: Reading partition %02x and got "
  824. "%02x !\n", id, hdr->id);
  825. goto failure;
  826. }
  827. if (of_add_property(smu->of_node, prop)) {
  828. printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x "
  829. "property !\n", id);
  830. goto failure;
  831. }
  832. return hdr;
  833. failure:
  834. kfree(prop);
  835. return NULL;
  836. }
  837. /* Note: Only allowed to return error code in pointers (using ERR_PTR)
  838. * when interruptible is 1
  839. */
  840. const struct smu_sdbp_header *__smu_get_sdb_partition(int id,
  841. unsigned int *size, int interruptible)
  842. {
  843. char pname[32];
  844. const struct smu_sdbp_header *part;
  845. if (!smu)
  846. return NULL;
  847. sprintf(pname, "sdb-partition-%02x", id);
  848. DPRINTK("smu_get_sdb_partition(%02x)\n", id);
  849. if (interruptible) {
  850. int rc;
  851. rc = mutex_lock_interruptible(&smu_part_access);
  852. if (rc)
  853. return ERR_PTR(rc);
  854. } else
  855. mutex_lock(&smu_part_access);
  856. part = of_get_property(smu->of_node, pname, size);
  857. if (part == NULL) {
  858. DPRINTK("trying to extract from SMU ...\n");
  859. part = smu_create_sdb_partition(id);
  860. if (part != NULL && size)
  861. *size = part->len << 2;
  862. }
  863. mutex_unlock(&smu_part_access);
  864. return part;
  865. }
  866. const struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size)
  867. {
  868. return __smu_get_sdb_partition(id, size, 0);
  869. }
  870. EXPORT_SYMBOL(smu_get_sdb_partition);
  871. /*
  872. * Userland driver interface
  873. */
  874. static LIST_HEAD(smu_clist);
  875. static DEFINE_SPINLOCK(smu_clist_lock);
  876. enum smu_file_mode {
  877. smu_file_commands,
  878. smu_file_events,
  879. smu_file_closing
  880. };
  881. struct smu_private
  882. {
  883. struct list_head list;
  884. enum smu_file_mode mode;
  885. int busy;
  886. struct smu_cmd cmd;
  887. spinlock_t lock;
  888. wait_queue_head_t wait;
  889. u8 buffer[SMU_MAX_DATA];
  890. };
  891. static int smu_open(struct inode *inode, struct file *file)
  892. {
  893. struct smu_private *pp;
  894. unsigned long flags;
  895. pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL);
  896. if (pp == 0)
  897. return -ENOMEM;
  898. spin_lock_init(&pp->lock);
  899. pp->mode = smu_file_commands;
  900. init_waitqueue_head(&pp->wait);
  901. mutex_lock(&smu_mutex);
  902. spin_lock_irqsave(&smu_clist_lock, flags);
  903. list_add(&pp->list, &smu_clist);
  904. spin_unlock_irqrestore(&smu_clist_lock, flags);
  905. file->private_data = pp;
  906. mutex_unlock(&smu_mutex);
  907. return 0;
  908. }
  909. static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc)
  910. {
  911. struct smu_private *pp = misc;
  912. wake_up_all(&pp->wait);
  913. }
  914. static ssize_t smu_write(struct file *file, const char __user *buf,
  915. size_t count, loff_t *ppos)
  916. {
  917. struct smu_private *pp = file->private_data;
  918. unsigned long flags;
  919. struct smu_user_cmd_hdr hdr;
  920. int rc = 0;
  921. if (pp->busy)
  922. return -EBUSY;
  923. else if (copy_from_user(&hdr, buf, sizeof(hdr)))
  924. return -EFAULT;
  925. else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) {
  926. pp->mode = smu_file_events;
  927. return 0;
  928. } else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) {
  929. const struct smu_sdbp_header *part;
  930. part = __smu_get_sdb_partition(hdr.cmd, NULL, 1);
  931. if (part == NULL)
  932. return -EINVAL;
  933. else if (IS_ERR(part))
  934. return PTR_ERR(part);
  935. return 0;
  936. } else if (hdr.cmdtype != SMU_CMDTYPE_SMU)
  937. return -EINVAL;
  938. else if (pp->mode != smu_file_commands)
  939. return -EBADFD;
  940. else if (hdr.data_len > SMU_MAX_DATA)
  941. return -EINVAL;
  942. spin_lock_irqsave(&pp->lock, flags);
  943. if (pp->busy) {
  944. spin_unlock_irqrestore(&pp->lock, flags);
  945. return -EBUSY;
  946. }
  947. pp->busy = 1;
  948. pp->cmd.status = 1;
  949. spin_unlock_irqrestore(&pp->lock, flags);
  950. if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) {
  951. pp->busy = 0;
  952. return -EFAULT;
  953. }
  954. pp->cmd.cmd = hdr.cmd;
  955. pp->cmd.data_len = hdr.data_len;
  956. pp->cmd.reply_len = SMU_MAX_DATA;
  957. pp->cmd.data_buf = pp->buffer;
  958. pp->cmd.reply_buf = pp->buffer;
  959. pp->cmd.done = smu_user_cmd_done;
  960. pp->cmd.misc = pp;
  961. rc = smu_queue_cmd(&pp->cmd);
  962. if (rc < 0)
  963. return rc;
  964. return count;
  965. }
  966. static ssize_t smu_read_command(struct file *file, struct smu_private *pp,
  967. char __user *buf, size_t count)
  968. {
  969. DECLARE_WAITQUEUE(wait, current);
  970. struct smu_user_reply_hdr hdr;
  971. unsigned long flags;
  972. int size, rc = 0;
  973. if (!pp->busy)
  974. return 0;
  975. if (count < sizeof(struct smu_user_reply_hdr))
  976. return -EOVERFLOW;
  977. spin_lock_irqsave(&pp->lock, flags);
  978. if (pp->cmd.status == 1) {
  979. if (file->f_flags & O_NONBLOCK) {
  980. spin_unlock_irqrestore(&pp->lock, flags);
  981. return -EAGAIN;
  982. }
  983. add_wait_queue(&pp->wait, &wait);
  984. for (;;) {
  985. set_current_state(TASK_INTERRUPTIBLE);
  986. rc = 0;
  987. if (pp->cmd.status != 1)
  988. break;
  989. rc = -ERESTARTSYS;
  990. if (signal_pending(current))
  991. break;
  992. spin_unlock_irqrestore(&pp->lock, flags);
  993. schedule();
  994. spin_lock_irqsave(&pp->lock, flags);
  995. }
  996. set_current_state(TASK_RUNNING);
  997. remove_wait_queue(&pp->wait, &wait);
  998. }
  999. spin_unlock_irqrestore(&pp->lock, flags);
  1000. if (rc)
  1001. return rc;
  1002. if (pp->cmd.status != 0)
  1003. pp->cmd.reply_len = 0;
  1004. size = sizeof(hdr) + pp->cmd.reply_len;
  1005. if (count < size)
  1006. size = count;
  1007. rc = size;
  1008. hdr.status = pp->cmd.status;
  1009. hdr.reply_len = pp->cmd.reply_len;
  1010. if (copy_to_user(buf, &hdr, sizeof(hdr)))
  1011. return -EFAULT;
  1012. size -= sizeof(hdr);
  1013. if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size))
  1014. return -EFAULT;
  1015. pp->busy = 0;
  1016. return rc;
  1017. }
  1018. static ssize_t smu_read_events(struct file *file, struct smu_private *pp,
  1019. char __user *buf, size_t count)
  1020. {
  1021. /* Not implemented */
  1022. msleep_interruptible(1000);
  1023. return 0;
  1024. }
  1025. static ssize_t smu_read(struct file *file, char __user *buf,
  1026. size_t count, loff_t *ppos)
  1027. {
  1028. struct smu_private *pp = file->private_data;
  1029. if (pp->mode == smu_file_commands)
  1030. return smu_read_command(file, pp, buf, count);
  1031. if (pp->mode == smu_file_events)
  1032. return smu_read_events(file, pp, buf, count);
  1033. return -EBADFD;
  1034. }
  1035. static unsigned int smu_fpoll(struct file *file, poll_table *wait)
  1036. {
  1037. struct smu_private *pp = file->private_data;
  1038. unsigned int mask = 0;
  1039. unsigned long flags;
  1040. if (pp == 0)
  1041. return 0;
  1042. if (pp->mode == smu_file_commands) {
  1043. poll_wait(file, &pp->wait, wait);
  1044. spin_lock_irqsave(&pp->lock, flags);
  1045. if (pp->busy && pp->cmd.status != 1)
  1046. mask |= POLLIN;
  1047. spin_unlock_irqrestore(&pp->lock, flags);
  1048. }
  1049. if (pp->mode == smu_file_events) {
  1050. /* Not yet implemented */
  1051. }
  1052. return mask;
  1053. }
  1054. static int smu_release(struct inode *inode, struct file *file)
  1055. {
  1056. struct smu_private *pp = file->private_data;
  1057. unsigned long flags;
  1058. unsigned int busy;
  1059. if (pp == 0)
  1060. return 0;
  1061. file->private_data = NULL;
  1062. /* Mark file as closing to avoid races with new request */
  1063. spin_lock_irqsave(&pp->lock, flags);
  1064. pp->mode = smu_file_closing;
  1065. busy = pp->busy;
  1066. /* Wait for any pending request to complete */
  1067. if (busy && pp->cmd.status == 1) {
  1068. DECLARE_WAITQUEUE(wait, current);
  1069. add_wait_queue(&pp->wait, &wait);
  1070. for (;;) {
  1071. set_current_state(TASK_UNINTERRUPTIBLE);
  1072. if (pp->cmd.status != 1)
  1073. break;
  1074. spin_unlock_irqrestore(&pp->lock, flags);
  1075. schedule();
  1076. spin_lock_irqsave(&pp->lock, flags);
  1077. }
  1078. set_current_state(TASK_RUNNING);
  1079. remove_wait_queue(&pp->wait, &wait);
  1080. }
  1081. spin_unlock_irqrestore(&pp->lock, flags);
  1082. spin_lock_irqsave(&smu_clist_lock, flags);
  1083. list_del(&pp->list);
  1084. spin_unlock_irqrestore(&smu_clist_lock, flags);
  1085. kfree(pp);
  1086. return 0;
  1087. }
  1088. static const struct file_operations smu_device_fops = {
  1089. .llseek = no_llseek,
  1090. .read = smu_read,
  1091. .write = smu_write,
  1092. .poll = smu_fpoll,
  1093. .open = smu_open,
  1094. .release = smu_release,
  1095. };
  1096. static struct miscdevice pmu_device = {
  1097. MISC_DYNAMIC_MINOR, "smu", &smu_device_fops
  1098. };
  1099. static int smu_device_init(void)
  1100. {
  1101. if (!smu)
  1102. return -ENODEV;
  1103. if (misc_register(&pmu_device) < 0)
  1104. printk(KERN_ERR "via-pmu: cannot register misc device.\n");
  1105. return 0;
  1106. }
  1107. device_initcall(smu_device_init);