bcm3510.c 22 KB

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  1. /*
  2. * Support for the Broadcom BCM3510 ATSC demodulator (1st generation Air2PC)
  3. *
  4. * Copyright (C) 2001-5, B2C2 inc.
  5. *
  6. * GPL/Linux driver written by Patrick Boettcher <patrick.boettcher@desy.de>
  7. *
  8. * This driver is "hard-coded" to be used with the 1st generation of
  9. * Technisat/B2C2's Air2PC ATSC PCI/USB cards/boxes. The pll-programming
  10. * (Panasonic CT10S) is located here, which is actually wrong. Unless there is
  11. * another device with a BCM3510, this is no problem.
  12. *
  13. * The driver works also with QAM64 DVB-C, but had an unreasonable high
  14. * UNC. (Tested with the Air2PC ATSC 1st generation)
  15. *
  16. * You'll need a firmware for this driver in order to get it running. It is
  17. * called "dvb-fe-bcm3510-01.fw".
  18. *
  19. * This program is free software; you can redistribute it and/or modify it
  20. * under the terms of the GNU General Public License as published by the Free
  21. * Software Foundation; either version 2 of the License, or (at your option)
  22. * any later version.
  23. *
  24. * This program is distributed in the hope that it will be useful, but WITHOUT
  25. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  26. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  27. * more details.
  28. *
  29. * You should have received a copy of the GNU General Public License along with
  30. * this program; if not, write to the Free Software Foundation, Inc., 675 Mass
  31. * Ave, Cambridge, MA 02139, USA.
  32. */
  33. #include <linux/init.h>
  34. #include <linux/module.h>
  35. #include <linux/device.h>
  36. #include <linux/firmware.h>
  37. #include <linux/jiffies.h>
  38. #include <linux/string.h>
  39. #include <linux/slab.h>
  40. #include <linux/mutex.h>
  41. #include "dvb_frontend.h"
  42. #include "bcm3510.h"
  43. #include "bcm3510_priv.h"
  44. /* Max transfer size done by bcm3510_do_hab_cmd() function */
  45. #define MAX_XFER_SIZE 128
  46. struct bcm3510_state {
  47. struct i2c_adapter* i2c;
  48. const struct bcm3510_config* config;
  49. struct dvb_frontend frontend;
  50. /* demodulator private data */
  51. struct mutex hab_mutex;
  52. u8 firmware_loaded:1;
  53. unsigned long next_status_check;
  54. unsigned long status_check_interval;
  55. struct bcm3510_hab_cmd_status1 status1;
  56. struct bcm3510_hab_cmd_status2 status2;
  57. };
  58. static int debug;
  59. module_param(debug, int, 0644);
  60. MODULE_PARM_DESC(debug, "set debugging level (1=info,2=i2c (|-able)).");
  61. #define dprintk(level,x...) if (level & debug) printk(x)
  62. #define dbufout(b,l,m) {\
  63. int i; \
  64. for (i = 0; i < l; i++) \
  65. m("%02x ",b[i]); \
  66. }
  67. #define deb_info(args...) dprintk(0x01,args)
  68. #define deb_i2c(args...) dprintk(0x02,args)
  69. #define deb_hab(args...) dprintk(0x04,args)
  70. /* transfer functions */
  71. static int bcm3510_writebytes (struct bcm3510_state *state, u8 reg, u8 *buf, u8 len)
  72. {
  73. u8 b[256];
  74. int err;
  75. struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = b, .len = len + 1 };
  76. b[0] = reg;
  77. memcpy(&b[1],buf,len);
  78. deb_i2c("i2c wr %02x: ",reg);
  79. dbufout(buf,len,deb_i2c);
  80. deb_i2c("\n");
  81. if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  82. deb_info("%s: i2c write error (addr %02x, reg %02x, err == %i)\n",
  83. __func__, state->config->demod_address, reg, err);
  84. return -EREMOTEIO;
  85. }
  86. return 0;
  87. }
  88. static int bcm3510_readbytes (struct bcm3510_state *state, u8 reg, u8 *buf, u8 len)
  89. {
  90. struct i2c_msg msg[] = {
  91. { .addr = state->config->demod_address, .flags = 0, .buf = &reg, .len = 1 },
  92. { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len }
  93. };
  94. int err;
  95. memset(buf,0,len);
  96. if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
  97. deb_info("%s: i2c read error (addr %02x, reg %02x, err == %i)\n",
  98. __func__, state->config->demod_address, reg, err);
  99. return -EREMOTEIO;
  100. }
  101. deb_i2c("i2c rd %02x: ",reg);
  102. dbufout(buf,len,deb_i2c);
  103. deb_i2c("\n");
  104. return 0;
  105. }
  106. static int bcm3510_writeB(struct bcm3510_state *state, u8 reg, bcm3510_register_value v)
  107. {
  108. return bcm3510_writebytes(state,reg,&v.raw,1);
  109. }
  110. static int bcm3510_readB(struct bcm3510_state *state, u8 reg, bcm3510_register_value *v)
  111. {
  112. return bcm3510_readbytes(state,reg,&v->raw,1);
  113. }
  114. /* Host Access Buffer transfers */
  115. static int bcm3510_hab_get_response(struct bcm3510_state *st, u8 *buf, int len)
  116. {
  117. bcm3510_register_value v;
  118. int ret,i;
  119. v.HABADR_a6.HABADR = 0;
  120. if ((ret = bcm3510_writeB(st,0xa6,v)) < 0)
  121. return ret;
  122. for (i = 0; i < len; i++) {
  123. if ((ret = bcm3510_readB(st,0xa7,&v)) < 0)
  124. return ret;
  125. buf[i] = v.HABDATA_a7;
  126. }
  127. return 0;
  128. }
  129. static int bcm3510_hab_send_request(struct bcm3510_state *st, u8 *buf, int len)
  130. {
  131. bcm3510_register_value v,hab;
  132. int ret,i;
  133. unsigned long t;
  134. /* Check if any previous HAB request still needs to be serviced by the
  135. * Acquisition Processor before sending new request */
  136. if ((ret = bcm3510_readB(st,0xa8,&v)) < 0)
  137. return ret;
  138. if (v.HABSTAT_a8.HABR) {
  139. deb_info("HAB is running already - clearing it.\n");
  140. v.HABSTAT_a8.HABR = 0;
  141. bcm3510_writeB(st,0xa8,v);
  142. // return -EBUSY;
  143. }
  144. /* Send the start HAB Address (automatically incremented after write of
  145. * HABDATA) and write the HAB Data */
  146. hab.HABADR_a6.HABADR = 0;
  147. if ((ret = bcm3510_writeB(st,0xa6,hab)) < 0)
  148. return ret;
  149. for (i = 0; i < len; i++) {
  150. hab.HABDATA_a7 = buf[i];
  151. if ((ret = bcm3510_writeB(st,0xa7,hab)) < 0)
  152. return ret;
  153. }
  154. /* Set the HABR bit to indicate AP request in progress (LBHABR allows HABR to
  155. * be written) */
  156. v.raw = 0; v.HABSTAT_a8.HABR = 1; v.HABSTAT_a8.LDHABR = 1;
  157. if ((ret = bcm3510_writeB(st,0xa8,v)) < 0)
  158. return ret;
  159. /* Polling method: Wait until the AP finishes processing the HAB request */
  160. t = jiffies + 1*HZ;
  161. while (time_before(jiffies, t)) {
  162. deb_info("waiting for HAB to complete\n");
  163. msleep(10);
  164. if ((ret = bcm3510_readB(st,0xa8,&v)) < 0)
  165. return ret;
  166. if (!v.HABSTAT_a8.HABR)
  167. return 0;
  168. }
  169. deb_info("send_request execution timed out.\n");
  170. return -ETIMEDOUT;
  171. }
  172. static int bcm3510_do_hab_cmd(struct bcm3510_state *st, u8 cmd, u8 msgid, u8 *obuf, u8 olen, u8 *ibuf, u8 ilen)
  173. {
  174. u8 ob[MAX_XFER_SIZE], ib[MAX_XFER_SIZE];
  175. int ret = 0;
  176. if (ilen + 2 > sizeof(ib)) {
  177. deb_hab("do_hab_cmd: ilen=%d is too big!\n", ilen);
  178. return -EINVAL;
  179. }
  180. if (olen + 2 > sizeof(ob)) {
  181. deb_hab("do_hab_cmd: olen=%d is too big!\n", olen);
  182. return -EINVAL;
  183. }
  184. ob[0] = cmd;
  185. ob[1] = msgid;
  186. memcpy(&ob[2],obuf,olen);
  187. deb_hab("hab snd: ");
  188. dbufout(ob,olen+2,deb_hab);
  189. deb_hab("\n");
  190. if (mutex_lock_interruptible(&st->hab_mutex) < 0)
  191. return -EAGAIN;
  192. if ((ret = bcm3510_hab_send_request(st, ob, olen+2)) < 0 ||
  193. (ret = bcm3510_hab_get_response(st, ib, ilen+2)) < 0)
  194. goto error;
  195. deb_hab("hab get: ");
  196. dbufout(ib,ilen+2,deb_hab);
  197. deb_hab("\n");
  198. memcpy(ibuf,&ib[2],ilen);
  199. error:
  200. mutex_unlock(&st->hab_mutex);
  201. return ret;
  202. }
  203. #if 0
  204. /* not needed, we use a semaphore to prevent HAB races */
  205. static int bcm3510_is_ap_ready(struct bcm3510_state *st)
  206. {
  207. bcm3510_register_value ap,hab;
  208. int ret;
  209. if ((ret = bcm3510_readB(st,0xa8,&hab)) < 0 ||
  210. (ret = bcm3510_readB(st,0xa2,&ap) < 0))
  211. return ret;
  212. if (ap.APSTAT1_a2.RESET || ap.APSTAT1_a2.IDLE || ap.APSTAT1_a2.STOP || hab.HABSTAT_a8.HABR) {
  213. deb_info("AP is busy\n");
  214. return -EBUSY;
  215. }
  216. return 0;
  217. }
  218. #endif
  219. static int bcm3510_bert_reset(struct bcm3510_state *st)
  220. {
  221. bcm3510_register_value b;
  222. int ret;
  223. if ((ret = bcm3510_readB(st,0xfa,&b)) < 0)
  224. return ret;
  225. b.BERCTL_fa.RESYNC = 0; bcm3510_writeB(st,0xfa,b);
  226. b.BERCTL_fa.RESYNC = 1; bcm3510_writeB(st,0xfa,b);
  227. b.BERCTL_fa.RESYNC = 0; bcm3510_writeB(st,0xfa,b);
  228. b.BERCTL_fa.CNTCTL = 1; b.BERCTL_fa.BITCNT = 1; bcm3510_writeB(st,0xfa,b);
  229. /* clear residual bit counter TODO */
  230. return 0;
  231. }
  232. static int bcm3510_refresh_state(struct bcm3510_state *st)
  233. {
  234. if (time_after(jiffies,st->next_status_check)) {
  235. bcm3510_do_hab_cmd(st, CMD_STATUS, MSGID_STATUS1, NULL,0, (u8 *)&st->status1, sizeof(st->status1));
  236. bcm3510_do_hab_cmd(st, CMD_STATUS, MSGID_STATUS2, NULL,0, (u8 *)&st->status2, sizeof(st->status2));
  237. st->next_status_check = jiffies + (st->status_check_interval*HZ)/1000;
  238. }
  239. return 0;
  240. }
  241. static int bcm3510_read_status(struct dvb_frontend *fe, enum fe_status *status)
  242. {
  243. struct bcm3510_state* st = fe->demodulator_priv;
  244. bcm3510_refresh_state(st);
  245. *status = 0;
  246. if (st->status1.STATUS1.RECEIVER_LOCK)
  247. *status |= FE_HAS_LOCK | FE_HAS_SYNC;
  248. if (st->status1.STATUS1.FEC_LOCK)
  249. *status |= FE_HAS_VITERBI;
  250. if (st->status1.STATUS1.OUT_PLL_LOCK)
  251. *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
  252. if (*status & FE_HAS_LOCK)
  253. st->status_check_interval = 1500;
  254. else /* more frequently checks if no lock has been achieved yet */
  255. st->status_check_interval = 500;
  256. deb_info("real_status: %02x\n",*status);
  257. return 0;
  258. }
  259. static int bcm3510_read_ber(struct dvb_frontend* fe, u32* ber)
  260. {
  261. struct bcm3510_state* st = fe->demodulator_priv;
  262. bcm3510_refresh_state(st);
  263. *ber = (st->status2.LDBER0 << 16) | (st->status2.LDBER1 << 8) | st->status2.LDBER2;
  264. return 0;
  265. }
  266. static int bcm3510_read_unc(struct dvb_frontend* fe, u32* unc)
  267. {
  268. struct bcm3510_state* st = fe->demodulator_priv;
  269. bcm3510_refresh_state(st);
  270. *unc = (st->status2.LDUERC0 << 8) | st->status2.LDUERC1;
  271. return 0;
  272. }
  273. static int bcm3510_read_signal_strength(struct dvb_frontend* fe, u16* strength)
  274. {
  275. struct bcm3510_state* st = fe->demodulator_priv;
  276. s32 t;
  277. bcm3510_refresh_state(st);
  278. t = st->status2.SIGNAL;
  279. if (t > 190)
  280. t = 190;
  281. if (t < 90)
  282. t = 90;
  283. t -= 90;
  284. t = t * 0xff / 100;
  285. /* normalize if necessary */
  286. *strength = (t << 8) | t;
  287. return 0;
  288. }
  289. static int bcm3510_read_snr(struct dvb_frontend* fe, u16* snr)
  290. {
  291. struct bcm3510_state* st = fe->demodulator_priv;
  292. bcm3510_refresh_state(st);
  293. *snr = st->status1.SNR_EST0*1000 + ((st->status1.SNR_EST1*1000) >> 8);
  294. return 0;
  295. }
  296. /* tuner frontend programming */
  297. static int bcm3510_tuner_cmd(struct bcm3510_state* st,u8 bc, u16 n, u8 a)
  298. {
  299. struct bcm3510_hab_cmd_tune c;
  300. memset(&c,0,sizeof(struct bcm3510_hab_cmd_tune));
  301. /* I2C Mode disabled, set 16 control / Data pairs */
  302. c.length = 0x10;
  303. c.clock_width = 0;
  304. /* CS1, CS0, DATA, CLK bits control the tuner RF_AGC_SEL pin is set to
  305. * logic high (as Configuration) */
  306. c.misc = 0x10;
  307. /* Set duration of the initial state of TUNCTL = 3.34 micro Sec */
  308. c.TUNCTL_state = 0x40;
  309. /* PRESCALER DIVIDE RATIO | BC1_2_3_4; (band switch), 1stosc REFERENCE COUNTER REF_S12 and REF_S11 */
  310. c.ctl_dat[0].ctrl.size = BITS_8;
  311. c.ctl_dat[0].data = 0x80 | bc;
  312. /* Control DATA pin, 1stosc REFERENCE COUNTER REF_S10 to REF_S3 */
  313. c.ctl_dat[1].ctrl.size = BITS_8;
  314. c.ctl_dat[1].data = 4;
  315. /* set CONTROL BIT 1 to 1, 1stosc REFERENCE COUNTER REF_S2 to REF_S1 */
  316. c.ctl_dat[2].ctrl.size = BITS_3;
  317. c.ctl_dat[2].data = 0x20;
  318. /* control CS0 pin, pulse byte ? */
  319. c.ctl_dat[3].ctrl.size = BITS_3;
  320. c.ctl_dat[3].ctrl.clk_off = 1;
  321. c.ctl_dat[3].ctrl.cs0 = 1;
  322. c.ctl_dat[3].data = 0x40;
  323. /* PGM_S18 to PGM_S11 */
  324. c.ctl_dat[4].ctrl.size = BITS_8;
  325. c.ctl_dat[4].data = n >> 3;
  326. /* PGM_S10 to PGM_S8, SWL_S7 to SWL_S3 */
  327. c.ctl_dat[5].ctrl.size = BITS_8;
  328. c.ctl_dat[5].data = ((n & 0x7) << 5) | (a >> 2);
  329. /* SWL_S2 and SWL_S1, set CONTROL BIT 2 to 0 */
  330. c.ctl_dat[6].ctrl.size = BITS_3;
  331. c.ctl_dat[6].data = (a << 6) & 0xdf;
  332. /* control CS0 pin, pulse byte ? */
  333. c.ctl_dat[7].ctrl.size = BITS_3;
  334. c.ctl_dat[7].ctrl.clk_off = 1;
  335. c.ctl_dat[7].ctrl.cs0 = 1;
  336. c.ctl_dat[7].data = 0x40;
  337. /* PRESCALER DIVIDE RATIO, 2ndosc REFERENCE COUNTER REF_S12 and REF_S11 */
  338. c.ctl_dat[8].ctrl.size = BITS_8;
  339. c.ctl_dat[8].data = 0x80;
  340. /* 2ndosc REFERENCE COUNTER REF_S10 to REF_S3 */
  341. c.ctl_dat[9].ctrl.size = BITS_8;
  342. c.ctl_dat[9].data = 0x10;
  343. /* set CONTROL BIT 1 to 1, 2ndosc REFERENCE COUNTER REF_S2 to REF_S1 */
  344. c.ctl_dat[10].ctrl.size = BITS_3;
  345. c.ctl_dat[10].data = 0x20;
  346. /* pulse byte */
  347. c.ctl_dat[11].ctrl.size = BITS_3;
  348. c.ctl_dat[11].ctrl.clk_off = 1;
  349. c.ctl_dat[11].ctrl.cs1 = 1;
  350. c.ctl_dat[11].data = 0x40;
  351. /* PGM_S18 to PGM_S11 */
  352. c.ctl_dat[12].ctrl.size = BITS_8;
  353. c.ctl_dat[12].data = 0x2a;
  354. /* PGM_S10 to PGM_S8 and SWL_S7 to SWL_S3 */
  355. c.ctl_dat[13].ctrl.size = BITS_8;
  356. c.ctl_dat[13].data = 0x8e;
  357. /* SWL_S2 and SWL_S1 and set CONTROL BIT 2 to 0 */
  358. c.ctl_dat[14].ctrl.size = BITS_3;
  359. c.ctl_dat[14].data = 0;
  360. /* Pulse Byte */
  361. c.ctl_dat[15].ctrl.size = BITS_3;
  362. c.ctl_dat[15].ctrl.clk_off = 1;
  363. c.ctl_dat[15].ctrl.cs1 = 1;
  364. c.ctl_dat[15].data = 0x40;
  365. return bcm3510_do_hab_cmd(st,CMD_TUNE, MSGID_TUNE,(u8 *) &c,sizeof(c), NULL, 0);
  366. }
  367. static int bcm3510_set_freq(struct bcm3510_state* st,u32 freq)
  368. {
  369. u8 bc,a;
  370. u16 n;
  371. s32 YIntercept,Tfvco1;
  372. freq /= 1000;
  373. deb_info("%dkHz:",freq);
  374. /* set Band Switch */
  375. if (freq <= 168000)
  376. bc = 0x1c;
  377. else if (freq <= 378000)
  378. bc = 0x2c;
  379. else
  380. bc = 0x30;
  381. if (freq >= 470000) {
  382. freq -= 470001;
  383. YIntercept = 18805;
  384. } else if (freq >= 90000) {
  385. freq -= 90001;
  386. YIntercept = 15005;
  387. } else if (freq >= 76000){
  388. freq -= 76001;
  389. YIntercept = 14865;
  390. } else {
  391. freq -= 54001;
  392. YIntercept = 14645;
  393. }
  394. Tfvco1 = (((freq/6000)*60 + YIntercept)*4)/10;
  395. n = Tfvco1 >> 6;
  396. a = Tfvco1 & 0x3f;
  397. deb_info(" BC1_2_3_4: %x, N: %x A: %x\n", bc, n, a);
  398. if (n >= 16 && n <= 2047)
  399. return bcm3510_tuner_cmd(st,bc,n,a);
  400. return -EINVAL;
  401. }
  402. static int bcm3510_set_frontend(struct dvb_frontend *fe)
  403. {
  404. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  405. struct bcm3510_state* st = fe->demodulator_priv;
  406. struct bcm3510_hab_cmd_ext_acquire cmd;
  407. struct bcm3510_hab_cmd_bert_control bert;
  408. int ret;
  409. memset(&cmd,0,sizeof(cmd));
  410. switch (c->modulation) {
  411. case QAM_256:
  412. cmd.ACQUIRE0.MODE = 0x1;
  413. cmd.ACQUIRE1.SYM_RATE = 0x1;
  414. cmd.ACQUIRE1.IF_FREQ = 0x1;
  415. break;
  416. case QAM_64:
  417. cmd.ACQUIRE0.MODE = 0x2;
  418. cmd.ACQUIRE1.SYM_RATE = 0x2;
  419. cmd.ACQUIRE1.IF_FREQ = 0x1;
  420. break;
  421. #if 0
  422. case QAM_256:
  423. cmd.ACQUIRE0.MODE = 0x3;
  424. break;
  425. case QAM_128:
  426. cmd.ACQUIRE0.MODE = 0x4;
  427. break;
  428. case QAM_64:
  429. cmd.ACQUIRE0.MODE = 0x5;
  430. break;
  431. case QAM_32:
  432. cmd.ACQUIRE0.MODE = 0x6;
  433. break;
  434. case QAM_16:
  435. cmd.ACQUIRE0.MODE = 0x7;
  436. break;
  437. #endif
  438. case VSB_8:
  439. cmd.ACQUIRE0.MODE = 0x8;
  440. cmd.ACQUIRE1.SYM_RATE = 0x0;
  441. cmd.ACQUIRE1.IF_FREQ = 0x0;
  442. break;
  443. case VSB_16:
  444. cmd.ACQUIRE0.MODE = 0x9;
  445. cmd.ACQUIRE1.SYM_RATE = 0x0;
  446. cmd.ACQUIRE1.IF_FREQ = 0x0;
  447. default:
  448. return -EINVAL;
  449. }
  450. cmd.ACQUIRE0.OFFSET = 0;
  451. cmd.ACQUIRE0.NTSCSWEEP = 1;
  452. cmd.ACQUIRE0.FA = 1;
  453. cmd.ACQUIRE0.BW = 0;
  454. /* if (enableOffset) {
  455. cmd.IF_OFFSET0 = xx;
  456. cmd.IF_OFFSET1 = xx;
  457. cmd.SYM_OFFSET0 = xx;
  458. cmd.SYM_OFFSET1 = xx;
  459. if (enableNtscSweep) {
  460. cmd.NTSC_OFFSET0;
  461. cmd.NTSC_OFFSET1;
  462. }
  463. } */
  464. bcm3510_do_hab_cmd(st, CMD_ACQUIRE, MSGID_EXT_TUNER_ACQUIRE, (u8 *) &cmd, sizeof(cmd), NULL, 0);
  465. /* doing it with different MSGIDs, data book and source differs */
  466. bert.BE = 0;
  467. bert.unused = 0;
  468. bcm3510_do_hab_cmd(st, CMD_STATE_CONTROL, MSGID_BERT_CONTROL, (u8 *) &bert, sizeof(bert), NULL, 0);
  469. bcm3510_do_hab_cmd(st, CMD_STATE_CONTROL, MSGID_BERT_SET, (u8 *) &bert, sizeof(bert), NULL, 0);
  470. bcm3510_bert_reset(st);
  471. ret = bcm3510_set_freq(st, c->frequency);
  472. if (ret < 0)
  473. return ret;
  474. memset(&st->status1,0,sizeof(st->status1));
  475. memset(&st->status2,0,sizeof(st->status2));
  476. st->status_check_interval = 500;
  477. /* Give the AP some time */
  478. msleep(200);
  479. return 0;
  480. }
  481. static int bcm3510_sleep(struct dvb_frontend* fe)
  482. {
  483. return 0;
  484. }
  485. static int bcm3510_get_tune_settings(struct dvb_frontend *fe, struct dvb_frontend_tune_settings *s)
  486. {
  487. s->min_delay_ms = 1000;
  488. s->step_size = 0;
  489. s->max_drift = 0;
  490. return 0;
  491. }
  492. static void bcm3510_release(struct dvb_frontend* fe)
  493. {
  494. struct bcm3510_state* state = fe->demodulator_priv;
  495. kfree(state);
  496. }
  497. /* firmware download:
  498. * firmware file is build up like this:
  499. * 16bit addr, 16bit length, 8byte of length
  500. */
  501. #define BCM3510_DEFAULT_FIRMWARE "dvb-fe-bcm3510-01.fw"
  502. static int bcm3510_write_ram(struct bcm3510_state *st, u16 addr, const u8 *b,
  503. u16 len)
  504. {
  505. int ret = 0,i;
  506. bcm3510_register_value vH, vL,vD;
  507. vH.MADRH_a9 = addr >> 8;
  508. vL.MADRL_aa = addr;
  509. if ((ret = bcm3510_writeB(st,0xa9,vH)) < 0) return ret;
  510. if ((ret = bcm3510_writeB(st,0xaa,vL)) < 0) return ret;
  511. for (i = 0; i < len; i++) {
  512. vD.MDATA_ab = b[i];
  513. if ((ret = bcm3510_writeB(st,0xab,vD)) < 0)
  514. return ret;
  515. }
  516. return 0;
  517. }
  518. static int bcm3510_download_firmware(struct dvb_frontend* fe)
  519. {
  520. struct bcm3510_state* st = fe->demodulator_priv;
  521. const struct firmware *fw;
  522. u16 addr,len;
  523. const u8 *b;
  524. int ret,i;
  525. deb_info("requesting firmware\n");
  526. if ((ret = st->config->request_firmware(fe, &fw, BCM3510_DEFAULT_FIRMWARE)) < 0) {
  527. err("could not load firmware (%s): %d",BCM3510_DEFAULT_FIRMWARE,ret);
  528. return ret;
  529. }
  530. deb_info("got firmware: %zu\n", fw->size);
  531. b = fw->data;
  532. for (i = 0; i < fw->size;) {
  533. addr = le16_to_cpu(*((__le16 *)&b[i]));
  534. len = le16_to_cpu(*((__le16 *)&b[i+2]));
  535. deb_info("firmware chunk, addr: 0x%04x, len: 0x%04x, total length: 0x%04zx\n",addr,len,fw->size);
  536. if ((ret = bcm3510_write_ram(st,addr,&b[i+4],len)) < 0) {
  537. err("firmware download failed: %d\n",ret);
  538. return ret;
  539. }
  540. i += 4 + len;
  541. }
  542. release_firmware(fw);
  543. deb_info("firmware download successfully completed\n");
  544. return 0;
  545. }
  546. static int bcm3510_check_firmware_version(struct bcm3510_state *st)
  547. {
  548. struct bcm3510_hab_cmd_get_version_info ver;
  549. bcm3510_do_hab_cmd(st,CMD_GET_VERSION_INFO,MSGID_GET_VERSION_INFO,NULL,0,(u8*)&ver,sizeof(ver));
  550. deb_info("Version information: 0x%02x 0x%02x 0x%02x 0x%02x\n",
  551. ver.microcode_version, ver.script_version, ver.config_version, ver.demod_version);
  552. if (ver.script_version == BCM3510_DEF_SCRIPT_VERSION &&
  553. ver.config_version == BCM3510_DEF_CONFIG_VERSION &&
  554. ver.demod_version == BCM3510_DEF_DEMOD_VERSION)
  555. return 0;
  556. deb_info("version check failed\n");
  557. return -ENODEV;
  558. }
  559. /* (un)resetting the AP */
  560. static int bcm3510_reset(struct bcm3510_state *st)
  561. {
  562. int ret;
  563. unsigned long t;
  564. bcm3510_register_value v;
  565. bcm3510_readB(st,0xa0,&v); v.HCTL1_a0.RESET = 1;
  566. if ((ret = bcm3510_writeB(st,0xa0,v)) < 0)
  567. return ret;
  568. t = jiffies + 3*HZ;
  569. while (time_before(jiffies, t)) {
  570. msleep(10);
  571. if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
  572. return ret;
  573. if (v.APSTAT1_a2.RESET)
  574. return 0;
  575. }
  576. deb_info("reset timed out\n");
  577. return -ETIMEDOUT;
  578. }
  579. static int bcm3510_clear_reset(struct bcm3510_state *st)
  580. {
  581. bcm3510_register_value v;
  582. int ret;
  583. unsigned long t;
  584. v.raw = 0;
  585. if ((ret = bcm3510_writeB(st,0xa0,v)) < 0)
  586. return ret;
  587. t = jiffies + 3*HZ;
  588. while (time_before(jiffies, t)) {
  589. msleep(10);
  590. if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
  591. return ret;
  592. /* verify that reset is cleared */
  593. if (!v.APSTAT1_a2.RESET)
  594. return 0;
  595. }
  596. deb_info("reset clear timed out\n");
  597. return -ETIMEDOUT;
  598. }
  599. static int bcm3510_init_cold(struct bcm3510_state *st)
  600. {
  601. int ret;
  602. bcm3510_register_value v;
  603. /* read Acquisation Processor status register and check it is not in RUN mode */
  604. if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
  605. return ret;
  606. if (v.APSTAT1_a2.RUN) {
  607. deb_info("AP is already running - firmware already loaded.\n");
  608. return 0;
  609. }
  610. deb_info("reset?\n");
  611. if ((ret = bcm3510_reset(st)) < 0)
  612. return ret;
  613. deb_info("tristate?\n");
  614. /* tri-state */
  615. v.TSTCTL_2e.CTL = 0;
  616. if ((ret = bcm3510_writeB(st,0x2e,v)) < 0)
  617. return ret;
  618. deb_info("firmware?\n");
  619. if ((ret = bcm3510_download_firmware(&st->frontend)) < 0 ||
  620. (ret = bcm3510_clear_reset(st)) < 0)
  621. return ret;
  622. /* anything left here to Let the acquisition processor begin execution at program counter 0000 ??? */
  623. return 0;
  624. }
  625. static int bcm3510_init(struct dvb_frontend* fe)
  626. {
  627. struct bcm3510_state* st = fe->demodulator_priv;
  628. bcm3510_register_value j;
  629. struct bcm3510_hab_cmd_set_agc c;
  630. int ret;
  631. if ((ret = bcm3510_readB(st,0xca,&j)) < 0)
  632. return ret;
  633. deb_info("JDEC: %02x\n",j.raw);
  634. switch (j.JDEC_ca.JDEC) {
  635. case JDEC_WAIT_AT_RAM:
  636. deb_info("attempting to download firmware\n");
  637. if ((ret = bcm3510_init_cold(st)) < 0)
  638. return ret;
  639. case JDEC_EEPROM_LOAD_WAIT: /* fall-through is wanted */
  640. deb_info("firmware is loaded\n");
  641. bcm3510_check_firmware_version(st);
  642. break;
  643. default:
  644. return -ENODEV;
  645. }
  646. memset(&c,0,1);
  647. c.SEL = 1;
  648. bcm3510_do_hab_cmd(st,CMD_AUTO_PARAM,MSGID_SET_RF_AGC_SEL,(u8 *)&c,sizeof(c),NULL,0);
  649. return 0;
  650. }
  651. static struct dvb_frontend_ops bcm3510_ops;
  652. struct dvb_frontend* bcm3510_attach(const struct bcm3510_config *config,
  653. struct i2c_adapter *i2c)
  654. {
  655. struct bcm3510_state* state = NULL;
  656. int ret;
  657. bcm3510_register_value v;
  658. /* allocate memory for the internal state */
  659. state = kzalloc(sizeof(struct bcm3510_state), GFP_KERNEL);
  660. if (state == NULL)
  661. goto error;
  662. /* setup the state */
  663. state->config = config;
  664. state->i2c = i2c;
  665. /* create dvb_frontend */
  666. memcpy(&state->frontend.ops, &bcm3510_ops, sizeof(struct dvb_frontend_ops));
  667. state->frontend.demodulator_priv = state;
  668. mutex_init(&state->hab_mutex);
  669. if ((ret = bcm3510_readB(state,0xe0,&v)) < 0)
  670. goto error;
  671. deb_info("Revision: 0x%1x, Layer: 0x%1x.\n",v.REVID_e0.REV,v.REVID_e0.LAYER);
  672. if ((v.REVID_e0.REV != 0x1 && v.REVID_e0.LAYER != 0xb) && /* cold */
  673. (v.REVID_e0.REV != 0x8 && v.REVID_e0.LAYER != 0x0)) /* warm */
  674. goto error;
  675. info("Revision: 0x%1x, Layer: 0x%1x.",v.REVID_e0.REV,v.REVID_e0.LAYER);
  676. bcm3510_reset(state);
  677. return &state->frontend;
  678. error:
  679. kfree(state);
  680. return NULL;
  681. }
  682. EXPORT_SYMBOL(bcm3510_attach);
  683. static struct dvb_frontend_ops bcm3510_ops = {
  684. .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
  685. .info = {
  686. .name = "Broadcom BCM3510 VSB/QAM frontend",
  687. .frequency_min = 54000000,
  688. .frequency_max = 803000000,
  689. /* stepsize is just a guess */
  690. .frequency_stepsize = 0,
  691. .caps =
  692. FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
  693. FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
  694. FE_CAN_8VSB | FE_CAN_16VSB |
  695. FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_128 | FE_CAN_QAM_256
  696. },
  697. .release = bcm3510_release,
  698. .init = bcm3510_init,
  699. .sleep = bcm3510_sleep,
  700. .set_frontend = bcm3510_set_frontend,
  701. .get_tune_settings = bcm3510_get_tune_settings,
  702. .read_status = bcm3510_read_status,
  703. .read_ber = bcm3510_read_ber,
  704. .read_signal_strength = bcm3510_read_signal_strength,
  705. .read_snr = bcm3510_read_snr,
  706. .read_ucblocks = bcm3510_read_unc,
  707. };
  708. MODULE_DESCRIPTION("Broadcom BCM3510 ATSC (8VSB/16VSB & ITU J83 AnnexB FEC QAM64/256) demodulator driver");
  709. MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@desy.de>");
  710. MODULE_LICENSE("GPL");