cx22702.c 14 KB

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  1. /*
  2. Conexant 22702 DVB OFDM demodulator driver
  3. based on:
  4. Alps TDMB7 DVB OFDM demodulator driver
  5. Copyright (C) 2001-2002 Convergence Integrated Media GmbH
  6. Holger Waechtler <holger@convergence.de>
  7. Copyright (C) 2004 Steven Toth <stoth@linuxtv.org>
  8. This program is free software; you can redistribute it and/or modify
  9. it under the terms of the GNU General Public License as published by
  10. the Free Software Foundation; either version 2 of the License, or
  11. (at your option) any later version.
  12. This program is distributed in the hope that it will be useful,
  13. but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. GNU General Public License for more details.
  16. You should have received a copy of the GNU General Public License
  17. along with this program; if not, write to the Free Software
  18. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/init.h>
  22. #include <linux/module.h>
  23. #include <linux/string.h>
  24. #include <linux/slab.h>
  25. #include <linux/delay.h>
  26. #include "dvb_frontend.h"
  27. #include "cx22702.h"
  28. struct cx22702_state {
  29. struct i2c_adapter *i2c;
  30. /* configuration settings */
  31. const struct cx22702_config *config;
  32. struct dvb_frontend frontend;
  33. /* previous uncorrected block counter */
  34. u8 prevUCBlocks;
  35. };
  36. static int debug;
  37. module_param(debug, int, 0644);
  38. MODULE_PARM_DESC(debug, "Enable verbose debug messages");
  39. #define dprintk if (debug) printk
  40. /* Register values to initialise the demod */
  41. static const u8 init_tab[] = {
  42. 0x00, 0x00, /* Stop acquisition */
  43. 0x0B, 0x06,
  44. 0x09, 0x01,
  45. 0x0D, 0x41,
  46. 0x16, 0x32,
  47. 0x20, 0x0A,
  48. 0x21, 0x17,
  49. 0x24, 0x3e,
  50. 0x26, 0xff,
  51. 0x27, 0x10,
  52. 0x28, 0x00,
  53. 0x29, 0x00,
  54. 0x2a, 0x10,
  55. 0x2b, 0x00,
  56. 0x2c, 0x10,
  57. 0x2d, 0x00,
  58. 0x48, 0xd4,
  59. 0x49, 0x56,
  60. 0x6b, 0x1e,
  61. 0xc8, 0x02,
  62. 0xf9, 0x00,
  63. 0xfa, 0x00,
  64. 0xfb, 0x00,
  65. 0xfc, 0x00,
  66. 0xfd, 0x00,
  67. };
  68. static int cx22702_writereg(struct cx22702_state *state, u8 reg, u8 data)
  69. {
  70. int ret;
  71. u8 buf[] = { reg, data };
  72. struct i2c_msg msg = {
  73. .addr = state->config->demod_address, .flags = 0,
  74. .buf = buf, .len = 2 };
  75. ret = i2c_transfer(state->i2c, &msg, 1);
  76. if (unlikely(ret != 1)) {
  77. printk(KERN_ERR
  78. "%s: error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
  79. __func__, reg, data, ret);
  80. return -1;
  81. }
  82. return 0;
  83. }
  84. static u8 cx22702_readreg(struct cx22702_state *state, u8 reg)
  85. {
  86. int ret;
  87. u8 data;
  88. struct i2c_msg msg[] = {
  89. { .addr = state->config->demod_address, .flags = 0,
  90. .buf = &reg, .len = 1 },
  91. { .addr = state->config->demod_address, .flags = I2C_M_RD,
  92. .buf = &data, .len = 1 } };
  93. ret = i2c_transfer(state->i2c, msg, 2);
  94. if (unlikely(ret != 2)) {
  95. printk(KERN_ERR "%s: error (reg == 0x%02x, ret == %i)\n",
  96. __func__, reg, ret);
  97. return 0;
  98. }
  99. return data;
  100. }
  101. static int cx22702_set_inversion(struct cx22702_state *state, int inversion)
  102. {
  103. u8 val;
  104. val = cx22702_readreg(state, 0x0C);
  105. switch (inversion) {
  106. case INVERSION_AUTO:
  107. return -EOPNOTSUPP;
  108. case INVERSION_ON:
  109. val |= 0x01;
  110. break;
  111. case INVERSION_OFF:
  112. val &= 0xfe;
  113. break;
  114. default:
  115. return -EINVAL;
  116. }
  117. return cx22702_writereg(state, 0x0C, val);
  118. }
  119. /* Retrieve the demod settings */
  120. static int cx22702_get_tps(struct cx22702_state *state,
  121. struct dtv_frontend_properties *p)
  122. {
  123. u8 val;
  124. /* Make sure the TPS regs are valid */
  125. if (!(cx22702_readreg(state, 0x0A) & 0x20))
  126. return -EAGAIN;
  127. val = cx22702_readreg(state, 0x01);
  128. switch ((val & 0x18) >> 3) {
  129. case 0:
  130. p->modulation = QPSK;
  131. break;
  132. case 1:
  133. p->modulation = QAM_16;
  134. break;
  135. case 2:
  136. p->modulation = QAM_64;
  137. break;
  138. }
  139. switch (val & 0x07) {
  140. case 0:
  141. p->hierarchy = HIERARCHY_NONE;
  142. break;
  143. case 1:
  144. p->hierarchy = HIERARCHY_1;
  145. break;
  146. case 2:
  147. p->hierarchy = HIERARCHY_2;
  148. break;
  149. case 3:
  150. p->hierarchy = HIERARCHY_4;
  151. break;
  152. }
  153. val = cx22702_readreg(state, 0x02);
  154. switch ((val & 0x38) >> 3) {
  155. case 0:
  156. p->code_rate_HP = FEC_1_2;
  157. break;
  158. case 1:
  159. p->code_rate_HP = FEC_2_3;
  160. break;
  161. case 2:
  162. p->code_rate_HP = FEC_3_4;
  163. break;
  164. case 3:
  165. p->code_rate_HP = FEC_5_6;
  166. break;
  167. case 4:
  168. p->code_rate_HP = FEC_7_8;
  169. break;
  170. }
  171. switch (val & 0x07) {
  172. case 0:
  173. p->code_rate_LP = FEC_1_2;
  174. break;
  175. case 1:
  176. p->code_rate_LP = FEC_2_3;
  177. break;
  178. case 2:
  179. p->code_rate_LP = FEC_3_4;
  180. break;
  181. case 3:
  182. p->code_rate_LP = FEC_5_6;
  183. break;
  184. case 4:
  185. p->code_rate_LP = FEC_7_8;
  186. break;
  187. }
  188. val = cx22702_readreg(state, 0x03);
  189. switch ((val & 0x0c) >> 2) {
  190. case 0:
  191. p->guard_interval = GUARD_INTERVAL_1_32;
  192. break;
  193. case 1:
  194. p->guard_interval = GUARD_INTERVAL_1_16;
  195. break;
  196. case 2:
  197. p->guard_interval = GUARD_INTERVAL_1_8;
  198. break;
  199. case 3:
  200. p->guard_interval = GUARD_INTERVAL_1_4;
  201. break;
  202. }
  203. switch (val & 0x03) {
  204. case 0:
  205. p->transmission_mode = TRANSMISSION_MODE_2K;
  206. break;
  207. case 1:
  208. p->transmission_mode = TRANSMISSION_MODE_8K;
  209. break;
  210. }
  211. return 0;
  212. }
  213. static int cx22702_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
  214. {
  215. struct cx22702_state *state = fe->demodulator_priv;
  216. u8 val;
  217. dprintk("%s(%d)\n", __func__, enable);
  218. val = cx22702_readreg(state, 0x0D);
  219. if (enable)
  220. val &= 0xfe;
  221. else
  222. val |= 0x01;
  223. return cx22702_writereg(state, 0x0D, val);
  224. }
  225. /* Talk to the demod, set the FEC, GUARD, QAM settings etc */
  226. static int cx22702_set_tps(struct dvb_frontend *fe)
  227. {
  228. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  229. u8 val;
  230. struct cx22702_state *state = fe->demodulator_priv;
  231. if (fe->ops.tuner_ops.set_params) {
  232. fe->ops.tuner_ops.set_params(fe);
  233. if (fe->ops.i2c_gate_ctrl)
  234. fe->ops.i2c_gate_ctrl(fe, 0);
  235. }
  236. /* set inversion */
  237. cx22702_set_inversion(state, p->inversion);
  238. /* set bandwidth */
  239. val = cx22702_readreg(state, 0x0C) & 0xcf;
  240. switch (p->bandwidth_hz) {
  241. case 6000000:
  242. val |= 0x20;
  243. break;
  244. case 7000000:
  245. val |= 0x10;
  246. break;
  247. case 8000000:
  248. break;
  249. default:
  250. dprintk("%s: invalid bandwidth\n", __func__);
  251. return -EINVAL;
  252. }
  253. cx22702_writereg(state, 0x0C, val);
  254. p->code_rate_LP = FEC_AUTO; /* temp hack as manual not working */
  255. /* use auto configuration? */
  256. if ((p->hierarchy == HIERARCHY_AUTO) ||
  257. (p->modulation == QAM_AUTO) ||
  258. (p->code_rate_HP == FEC_AUTO) ||
  259. (p->code_rate_LP == FEC_AUTO) ||
  260. (p->guard_interval == GUARD_INTERVAL_AUTO) ||
  261. (p->transmission_mode == TRANSMISSION_MODE_AUTO)) {
  262. /* TPS Source - use hardware driven values */
  263. cx22702_writereg(state, 0x06, 0x10);
  264. cx22702_writereg(state, 0x07, 0x9);
  265. cx22702_writereg(state, 0x08, 0xC1);
  266. cx22702_writereg(state, 0x0B, cx22702_readreg(state, 0x0B)
  267. & 0xfc);
  268. cx22702_writereg(state, 0x0C,
  269. (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40);
  270. cx22702_writereg(state, 0x00, 0x01); /* Begin acquisition */
  271. dprintk("%s: Autodetecting\n", __func__);
  272. return 0;
  273. }
  274. /* manually programmed values */
  275. switch (p->modulation) { /* mask 0x18 */
  276. case QPSK:
  277. val = 0x00;
  278. break;
  279. case QAM_16:
  280. val = 0x08;
  281. break;
  282. case QAM_64:
  283. val = 0x10;
  284. break;
  285. default:
  286. dprintk("%s: invalid modulation\n", __func__);
  287. return -EINVAL;
  288. }
  289. switch (p->hierarchy) { /* mask 0x07 */
  290. case HIERARCHY_NONE:
  291. break;
  292. case HIERARCHY_1:
  293. val |= 0x01;
  294. break;
  295. case HIERARCHY_2:
  296. val |= 0x02;
  297. break;
  298. case HIERARCHY_4:
  299. val |= 0x03;
  300. break;
  301. default:
  302. dprintk("%s: invalid hierarchy\n", __func__);
  303. return -EINVAL;
  304. }
  305. cx22702_writereg(state, 0x06, val);
  306. switch (p->code_rate_HP) { /* mask 0x38 */
  307. case FEC_NONE:
  308. case FEC_1_2:
  309. val = 0x00;
  310. break;
  311. case FEC_2_3:
  312. val = 0x08;
  313. break;
  314. case FEC_3_4:
  315. val = 0x10;
  316. break;
  317. case FEC_5_6:
  318. val = 0x18;
  319. break;
  320. case FEC_7_8:
  321. val = 0x20;
  322. break;
  323. default:
  324. dprintk("%s: invalid code_rate_HP\n", __func__);
  325. return -EINVAL;
  326. }
  327. switch (p->code_rate_LP) { /* mask 0x07 */
  328. case FEC_NONE:
  329. case FEC_1_2:
  330. break;
  331. case FEC_2_3:
  332. val |= 0x01;
  333. break;
  334. case FEC_3_4:
  335. val |= 0x02;
  336. break;
  337. case FEC_5_6:
  338. val |= 0x03;
  339. break;
  340. case FEC_7_8:
  341. val |= 0x04;
  342. break;
  343. default:
  344. dprintk("%s: invalid code_rate_LP\n", __func__);
  345. return -EINVAL;
  346. }
  347. cx22702_writereg(state, 0x07, val);
  348. switch (p->guard_interval) { /* mask 0x0c */
  349. case GUARD_INTERVAL_1_32:
  350. val = 0x00;
  351. break;
  352. case GUARD_INTERVAL_1_16:
  353. val = 0x04;
  354. break;
  355. case GUARD_INTERVAL_1_8:
  356. val = 0x08;
  357. break;
  358. case GUARD_INTERVAL_1_4:
  359. val = 0x0c;
  360. break;
  361. default:
  362. dprintk("%s: invalid guard_interval\n", __func__);
  363. return -EINVAL;
  364. }
  365. switch (p->transmission_mode) { /* mask 0x03 */
  366. case TRANSMISSION_MODE_2K:
  367. break;
  368. case TRANSMISSION_MODE_8K:
  369. val |= 0x1;
  370. break;
  371. default:
  372. dprintk("%s: invalid transmission_mode\n", __func__);
  373. return -EINVAL;
  374. }
  375. cx22702_writereg(state, 0x08, val);
  376. cx22702_writereg(state, 0x0B,
  377. (cx22702_readreg(state, 0x0B) & 0xfc) | 0x02);
  378. cx22702_writereg(state, 0x0C,
  379. (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40);
  380. /* Begin channel acquisition */
  381. cx22702_writereg(state, 0x00, 0x01);
  382. return 0;
  383. }
  384. /* Reset the demod hardware and reset all of the configuration registers
  385. to a default state. */
  386. static int cx22702_init(struct dvb_frontend *fe)
  387. {
  388. int i;
  389. struct cx22702_state *state = fe->demodulator_priv;
  390. cx22702_writereg(state, 0x00, 0x02);
  391. msleep(10);
  392. for (i = 0; i < ARRAY_SIZE(init_tab); i += 2)
  393. cx22702_writereg(state, init_tab[i], init_tab[i + 1]);
  394. cx22702_writereg(state, 0xf8, (state->config->output_mode << 1)
  395. & 0x02);
  396. cx22702_i2c_gate_ctrl(fe, 0);
  397. return 0;
  398. }
  399. static int cx22702_read_status(struct dvb_frontend *fe, enum fe_status *status)
  400. {
  401. struct cx22702_state *state = fe->demodulator_priv;
  402. u8 reg0A;
  403. u8 reg23;
  404. *status = 0;
  405. reg0A = cx22702_readreg(state, 0x0A);
  406. reg23 = cx22702_readreg(state, 0x23);
  407. dprintk("%s: status demod=0x%02x agc=0x%02x\n"
  408. , __func__, reg0A, reg23);
  409. if (reg0A & 0x10) {
  410. *status |= FE_HAS_LOCK;
  411. *status |= FE_HAS_VITERBI;
  412. *status |= FE_HAS_SYNC;
  413. }
  414. if (reg0A & 0x20)
  415. *status |= FE_HAS_CARRIER;
  416. if (reg23 < 0xf0)
  417. *status |= FE_HAS_SIGNAL;
  418. return 0;
  419. }
  420. static int cx22702_read_ber(struct dvb_frontend *fe, u32 *ber)
  421. {
  422. struct cx22702_state *state = fe->demodulator_priv;
  423. if (cx22702_readreg(state, 0xE4) & 0x02) {
  424. /* Realtime statistics */
  425. *ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 7
  426. | (cx22702_readreg(state, 0xDF) & 0x7F);
  427. } else {
  428. /* Averagtine statistics */
  429. *ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 7
  430. | cx22702_readreg(state, 0xDF);
  431. }
  432. return 0;
  433. }
  434. static int cx22702_read_signal_strength(struct dvb_frontend *fe,
  435. u16 *signal_strength)
  436. {
  437. struct cx22702_state *state = fe->demodulator_priv;
  438. u8 reg23;
  439. /*
  440. * Experience suggests that the strength signal register works as
  441. * follows:
  442. * - In the absence of signal, value is 0xff.
  443. * - In the presence of a weak signal, bit 7 is set, not sure what
  444. * the lower 7 bits mean.
  445. * - In the presence of a strong signal, the register holds a 7-bit
  446. * value (bit 7 is cleared), with greater values standing for
  447. * weaker signals.
  448. */
  449. reg23 = cx22702_readreg(state, 0x23);
  450. if (reg23 & 0x80) {
  451. *signal_strength = 0;
  452. } else {
  453. reg23 = ~reg23 & 0x7f;
  454. /* Scale to 16 bit */
  455. *signal_strength = (reg23 << 9) | (reg23 << 2) | (reg23 >> 5);
  456. }
  457. return 0;
  458. }
  459. static int cx22702_read_snr(struct dvb_frontend *fe, u16 *snr)
  460. {
  461. struct cx22702_state *state = fe->demodulator_priv;
  462. u16 rs_ber;
  463. if (cx22702_readreg(state, 0xE4) & 0x02) {
  464. /* Realtime statistics */
  465. rs_ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 7
  466. | (cx22702_readreg(state, 0xDF) & 0x7F);
  467. } else {
  468. /* Averagine statistics */
  469. rs_ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 8
  470. | cx22702_readreg(state, 0xDF);
  471. }
  472. *snr = ~rs_ber;
  473. return 0;
  474. }
  475. static int cx22702_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
  476. {
  477. struct cx22702_state *state = fe->demodulator_priv;
  478. u8 _ucblocks;
  479. /* RS Uncorrectable Packet Count then reset */
  480. _ucblocks = cx22702_readreg(state, 0xE3);
  481. if (state->prevUCBlocks < _ucblocks)
  482. *ucblocks = (_ucblocks - state->prevUCBlocks);
  483. else
  484. *ucblocks = state->prevUCBlocks - _ucblocks;
  485. state->prevUCBlocks = _ucblocks;
  486. return 0;
  487. }
  488. static int cx22702_get_frontend(struct dvb_frontend *fe)
  489. {
  490. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  491. struct cx22702_state *state = fe->demodulator_priv;
  492. u8 reg0C = cx22702_readreg(state, 0x0C);
  493. c->inversion = reg0C & 0x1 ? INVERSION_ON : INVERSION_OFF;
  494. return cx22702_get_tps(state, c);
  495. }
  496. static int cx22702_get_tune_settings(struct dvb_frontend *fe,
  497. struct dvb_frontend_tune_settings *tune)
  498. {
  499. tune->min_delay_ms = 1000;
  500. return 0;
  501. }
  502. static void cx22702_release(struct dvb_frontend *fe)
  503. {
  504. struct cx22702_state *state = fe->demodulator_priv;
  505. kfree(state);
  506. }
  507. static const struct dvb_frontend_ops cx22702_ops;
  508. struct dvb_frontend *cx22702_attach(const struct cx22702_config *config,
  509. struct i2c_adapter *i2c)
  510. {
  511. struct cx22702_state *state = NULL;
  512. /* allocate memory for the internal state */
  513. state = kzalloc(sizeof(struct cx22702_state), GFP_KERNEL);
  514. if (state == NULL)
  515. goto error;
  516. /* setup the state */
  517. state->config = config;
  518. state->i2c = i2c;
  519. /* check if the demod is there */
  520. if (cx22702_readreg(state, 0x1f) != 0x3)
  521. goto error;
  522. /* create dvb_frontend */
  523. memcpy(&state->frontend.ops, &cx22702_ops,
  524. sizeof(struct dvb_frontend_ops));
  525. state->frontend.demodulator_priv = state;
  526. return &state->frontend;
  527. error:
  528. kfree(state);
  529. return NULL;
  530. }
  531. EXPORT_SYMBOL(cx22702_attach);
  532. static const struct dvb_frontend_ops cx22702_ops = {
  533. .delsys = { SYS_DVBT },
  534. .info = {
  535. .name = "Conexant CX22702 DVB-T",
  536. .frequency_min = 177000000,
  537. .frequency_max = 858000000,
  538. .frequency_stepsize = 166666,
  539. .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
  540. FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
  541. FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
  542. FE_CAN_HIERARCHY_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
  543. FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER
  544. },
  545. .release = cx22702_release,
  546. .init = cx22702_init,
  547. .i2c_gate_ctrl = cx22702_i2c_gate_ctrl,
  548. .set_frontend = cx22702_set_tps,
  549. .get_frontend = cx22702_get_frontend,
  550. .get_tune_settings = cx22702_get_tune_settings,
  551. .read_status = cx22702_read_status,
  552. .read_ber = cx22702_read_ber,
  553. .read_signal_strength = cx22702_read_signal_strength,
  554. .read_snr = cx22702_read_snr,
  555. .read_ucblocks = cx22702_read_ucblocks,
  556. };
  557. MODULE_DESCRIPTION("Conexant CX22702 DVB-T Demodulator driver");
  558. MODULE_AUTHOR("Steven Toth");
  559. MODULE_LICENSE("GPL");