cx24117.c 42 KB

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  1. /*
  2. Conexant cx24117/cx24132 - Dual DVBS/S2 Satellite demod/tuner driver
  3. Copyright (C) 2013 Luis Alves <ljalvs@gmail.com>
  4. July, 6th 2013
  5. First release based on cx24116 driver by:
  6. Steven Toth and Georg Acher, Darron Broad, Igor Liplianin
  7. Cards currently supported:
  8. TBS6980 - Dual DVBS/S2 PCIe card
  9. TBS6981 - Dual DVBS/S2 PCIe card
  10. This program is free software; you can redistribute it and/or modify
  11. it under the terms of the GNU General Public License as published by
  12. the Free Software Foundation; either version 2 of the License, or
  13. (at your option) any later version.
  14. This program is distributed in the hope that it will be useful,
  15. but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. GNU General Public License for more details.
  18. You should have received a copy of the GNU General Public License
  19. along with this program; if not, write to the Free Software
  20. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/slab.h>
  23. #include <linux/kernel.h>
  24. #include <linux/module.h>
  25. #include <linux/moduleparam.h>
  26. #include <linux/init.h>
  27. #include <linux/firmware.h>
  28. #include "tuner-i2c.h"
  29. #include "dvb_frontend.h"
  30. #include "cx24117.h"
  31. #define CX24117_DEFAULT_FIRMWARE "dvb-fe-cx24117.fw"
  32. #define CX24117_SEARCH_RANGE_KHZ 5000
  33. /* known registers */
  34. #define CX24117_REG_COMMAND (0x00) /* command buffer */
  35. #define CX24117_REG_EXECUTE (0x1f) /* execute command */
  36. #define CX24117_REG_FREQ3_0 (0x34) /* frequency */
  37. #define CX24117_REG_FREQ2_0 (0x35)
  38. #define CX24117_REG_FREQ1_0 (0x36)
  39. #define CX24117_REG_STATE0 (0x39)
  40. #define CX24117_REG_SSTATUS0 (0x3a) /* demod0 signal high / status */
  41. #define CX24117_REG_SIGNAL0 (0x3b)
  42. #define CX24117_REG_FREQ5_0 (0x3c) /* +-freq */
  43. #define CX24117_REG_FREQ6_0 (0x3d)
  44. #define CX24117_REG_SRATE2_0 (0x3e) /* +- 1000 * srate */
  45. #define CX24117_REG_SRATE1_0 (0x3f)
  46. #define CX24117_REG_QUALITY2_0 (0x40)
  47. #define CX24117_REG_QUALITY1_0 (0x41)
  48. #define CX24117_REG_BER4_0 (0x47)
  49. #define CX24117_REG_BER3_0 (0x48)
  50. #define CX24117_REG_BER2_0 (0x49)
  51. #define CX24117_REG_BER1_0 (0x4a)
  52. #define CX24117_REG_DVBS_UCB2_0 (0x4b)
  53. #define CX24117_REG_DVBS_UCB1_0 (0x4c)
  54. #define CX24117_REG_DVBS2_UCB2_0 (0x50)
  55. #define CX24117_REG_DVBS2_UCB1_0 (0x51)
  56. #define CX24117_REG_QSTATUS0 (0x93)
  57. #define CX24117_REG_CLKDIV0 (0xe6)
  58. #define CX24117_REG_RATEDIV0 (0xf0)
  59. #define CX24117_REG_FREQ3_1 (0x55) /* frequency */
  60. #define CX24117_REG_FREQ2_1 (0x56)
  61. #define CX24117_REG_FREQ1_1 (0x57)
  62. #define CX24117_REG_STATE1 (0x5a)
  63. #define CX24117_REG_SSTATUS1 (0x5b) /* demod1 signal high / status */
  64. #define CX24117_REG_SIGNAL1 (0x5c)
  65. #define CX24117_REG_FREQ5_1 (0x5d) /* +- freq */
  66. #define CX24117_REG_FREQ4_1 (0x5e)
  67. #define CX24117_REG_SRATE2_1 (0x5f)
  68. #define CX24117_REG_SRATE1_1 (0x60)
  69. #define CX24117_REG_QUALITY2_1 (0x61)
  70. #define CX24117_REG_QUALITY1_1 (0x62)
  71. #define CX24117_REG_BER4_1 (0x68)
  72. #define CX24117_REG_BER3_1 (0x69)
  73. #define CX24117_REG_BER2_1 (0x6a)
  74. #define CX24117_REG_BER1_1 (0x6b)
  75. #define CX24117_REG_DVBS_UCB2_1 (0x6c)
  76. #define CX24117_REG_DVBS_UCB1_1 (0x6d)
  77. #define CX24117_REG_DVBS2_UCB2_1 (0x71)
  78. #define CX24117_REG_DVBS2_UCB1_1 (0x72)
  79. #define CX24117_REG_QSTATUS1 (0x9f)
  80. #define CX24117_REG_CLKDIV1 (0xe7)
  81. #define CX24117_REG_RATEDIV1 (0xf1)
  82. /* arg buffer size */
  83. #define CX24117_ARGLEN (0x1e)
  84. /* rolloff */
  85. #define CX24117_ROLLOFF_020 (0x00)
  86. #define CX24117_ROLLOFF_025 (0x01)
  87. #define CX24117_ROLLOFF_035 (0x02)
  88. /* pilot bit */
  89. #define CX24117_PILOT_OFF (0x00)
  90. #define CX24117_PILOT_ON (0x40)
  91. #define CX24117_PILOT_AUTO (0x80)
  92. /* signal status */
  93. #define CX24117_HAS_SIGNAL (0x01)
  94. #define CX24117_HAS_CARRIER (0x02)
  95. #define CX24117_HAS_VITERBI (0x04)
  96. #define CX24117_HAS_SYNCLOCK (0x08)
  97. #define CX24117_STATUS_MASK (0x0f)
  98. #define CX24117_SIGNAL_MASK (0xc0)
  99. /* arg offset for DiSEqC */
  100. #define CX24117_DISEQC_DEMOD (1)
  101. #define CX24117_DISEQC_BURST (2)
  102. #define CX24117_DISEQC_ARG3_2 (3) /* unknown value=2 */
  103. #define CX24117_DISEQC_ARG4_0 (4) /* unknown value=0 */
  104. #define CX24117_DISEQC_ARG5_0 (5) /* unknown value=0 */
  105. #define CX24117_DISEQC_MSGLEN (6)
  106. #define CX24117_DISEQC_MSGOFS (7)
  107. /* DiSEqC burst */
  108. #define CX24117_DISEQC_MINI_A (0)
  109. #define CX24117_DISEQC_MINI_B (1)
  110. #define CX24117_PNE (0) /* 0 disabled / 2 enabled */
  111. #define CX24117_OCC (1) /* 0 disabled / 1 enabled */
  112. enum cmds {
  113. CMD_SET_VCOFREQ = 0x10,
  114. CMD_TUNEREQUEST = 0x11,
  115. CMD_GLOBAL_MPEGCFG = 0x13,
  116. CMD_MPEGCFG = 0x14,
  117. CMD_TUNERINIT = 0x15,
  118. CMD_GET_SRATE = 0x18,
  119. CMD_SET_GOLDCODE = 0x19,
  120. CMD_GET_AGCACC = 0x1a,
  121. CMD_DEMODINIT = 0x1b,
  122. CMD_GETCTLACC = 0x1c,
  123. CMD_LNBCONFIG = 0x20,
  124. CMD_LNBSEND = 0x21,
  125. CMD_LNBDCLEVEL = 0x22,
  126. CMD_LNBPCBCONFIG = 0x23,
  127. CMD_LNBSENDTONEBST = 0x24,
  128. CMD_LNBUPDREPLY = 0x25,
  129. CMD_SET_GPIOMODE = 0x30,
  130. CMD_SET_GPIOEN = 0x31,
  131. CMD_SET_GPIODIR = 0x32,
  132. CMD_SET_GPIOOUT = 0x33,
  133. CMD_ENABLERSCORR = 0x34,
  134. CMD_FWVERSION = 0x35,
  135. CMD_SET_SLEEPMODE = 0x36,
  136. CMD_BERCTRL = 0x3c,
  137. CMD_EVENTCTRL = 0x3d,
  138. };
  139. static LIST_HEAD(hybrid_tuner_instance_list);
  140. static DEFINE_MUTEX(cx24117_list_mutex);
  141. /* The Demod/Tuner can't easily provide these, we cache them */
  142. struct cx24117_tuning {
  143. u32 frequency;
  144. u32 symbol_rate;
  145. enum fe_spectral_inversion inversion;
  146. enum fe_code_rate fec;
  147. enum fe_delivery_system delsys;
  148. enum fe_modulation modulation;
  149. enum fe_pilot pilot;
  150. enum fe_rolloff rolloff;
  151. /* Demod values */
  152. u8 fec_val;
  153. u8 fec_mask;
  154. u8 inversion_val;
  155. u8 pilot_val;
  156. u8 rolloff_val;
  157. };
  158. /* Basic commands that are sent to the firmware */
  159. struct cx24117_cmd {
  160. u8 len;
  161. u8 args[CX24117_ARGLEN];
  162. };
  163. /* common to both fe's */
  164. struct cx24117_priv {
  165. u8 demod_address;
  166. struct i2c_adapter *i2c;
  167. u8 skip_fw_load;
  168. struct mutex fe_lock;
  169. /* Used for sharing this struct between demods */
  170. struct tuner_i2c_props i2c_props;
  171. struct list_head hybrid_tuner_instance_list;
  172. };
  173. /* one per each fe */
  174. struct cx24117_state {
  175. struct cx24117_priv *priv;
  176. struct dvb_frontend frontend;
  177. struct cx24117_tuning dcur;
  178. struct cx24117_tuning dnxt;
  179. struct cx24117_cmd dsec_cmd;
  180. int demod;
  181. };
  182. /* modfec (modulation and FEC) lookup table */
  183. /* Check cx24116.c for a detailed description of each field */
  184. static struct cx24117_modfec {
  185. enum fe_delivery_system delivery_system;
  186. enum fe_modulation modulation;
  187. enum fe_code_rate fec;
  188. u8 mask; /* In DVBS mode this is used to autodetect */
  189. u8 val; /* Passed to the firmware to indicate mode selection */
  190. } cx24117_modfec_modes[] = {
  191. /* QPSK. For unknown rates we set hardware to auto detect 0xfe 0x30 */
  192. /*mod fec mask val */
  193. { SYS_DVBS, QPSK, FEC_NONE, 0xfe, 0x30 },
  194. { SYS_DVBS, QPSK, FEC_1_2, 0x02, 0x2e }, /* 00000010 00101110 */
  195. { SYS_DVBS, QPSK, FEC_2_3, 0x04, 0x2f }, /* 00000100 00101111 */
  196. { SYS_DVBS, QPSK, FEC_3_4, 0x08, 0x30 }, /* 00001000 00110000 */
  197. { SYS_DVBS, QPSK, FEC_4_5, 0xfe, 0x30 }, /* 000?0000 ? */
  198. { SYS_DVBS, QPSK, FEC_5_6, 0x20, 0x31 }, /* 00100000 00110001 */
  199. { SYS_DVBS, QPSK, FEC_6_7, 0xfe, 0x30 }, /* 0?000000 ? */
  200. { SYS_DVBS, QPSK, FEC_7_8, 0x80, 0x32 }, /* 10000000 00110010 */
  201. { SYS_DVBS, QPSK, FEC_8_9, 0xfe, 0x30 }, /* 0000000? ? */
  202. { SYS_DVBS, QPSK, FEC_AUTO, 0xfe, 0x30 },
  203. /* NBC-QPSK */
  204. { SYS_DVBS2, QPSK, FEC_NONE, 0x00, 0x00 },
  205. { SYS_DVBS2, QPSK, FEC_1_2, 0x00, 0x04 },
  206. { SYS_DVBS2, QPSK, FEC_3_5, 0x00, 0x05 },
  207. { SYS_DVBS2, QPSK, FEC_2_3, 0x00, 0x06 },
  208. { SYS_DVBS2, QPSK, FEC_3_4, 0x00, 0x07 },
  209. { SYS_DVBS2, QPSK, FEC_4_5, 0x00, 0x08 },
  210. { SYS_DVBS2, QPSK, FEC_5_6, 0x00, 0x09 },
  211. { SYS_DVBS2, QPSK, FEC_8_9, 0x00, 0x0a },
  212. { SYS_DVBS2, QPSK, FEC_9_10, 0x00, 0x0b },
  213. { SYS_DVBS2, QPSK, FEC_AUTO, 0x00, 0x00 },
  214. /* 8PSK */
  215. { SYS_DVBS2, PSK_8, FEC_NONE, 0x00, 0x00 },
  216. { SYS_DVBS2, PSK_8, FEC_3_5, 0x00, 0x0c },
  217. { SYS_DVBS2, PSK_8, FEC_2_3, 0x00, 0x0d },
  218. { SYS_DVBS2, PSK_8, FEC_3_4, 0x00, 0x0e },
  219. { SYS_DVBS2, PSK_8, FEC_5_6, 0x00, 0x0f },
  220. { SYS_DVBS2, PSK_8, FEC_8_9, 0x00, 0x10 },
  221. { SYS_DVBS2, PSK_8, FEC_9_10, 0x00, 0x11 },
  222. { SYS_DVBS2, PSK_8, FEC_AUTO, 0x00, 0x00 },
  223. /*
  224. * 'val' can be found in the FECSTATUS register when tuning.
  225. * FECSTATUS will give the actual FEC in use if tuning was successful.
  226. */
  227. };
  228. static int cx24117_writereg(struct cx24117_state *state, u8 reg, u8 data)
  229. {
  230. u8 buf[] = { reg, data };
  231. struct i2c_msg msg = { .addr = state->priv->demod_address,
  232. .flags = 0, .buf = buf, .len = 2 };
  233. int ret;
  234. dev_dbg(&state->priv->i2c->dev,
  235. "%s() demod%d i2c wr @0x%02x=0x%02x\n",
  236. __func__, state->demod, reg, data);
  237. ret = i2c_transfer(state->priv->i2c, &msg, 1);
  238. if (ret < 0) {
  239. dev_warn(&state->priv->i2c->dev,
  240. "%s: demod%d i2c wr err(%i) @0x%02x=0x%02x\n",
  241. KBUILD_MODNAME, state->demod, ret, reg, data);
  242. return ret;
  243. }
  244. return 0;
  245. }
  246. static int cx24117_writecmd(struct cx24117_state *state,
  247. struct cx24117_cmd *cmd)
  248. {
  249. struct i2c_msg msg;
  250. u8 buf[CX24117_ARGLEN+1];
  251. int ret;
  252. dev_dbg(&state->priv->i2c->dev,
  253. "%s() demod%d i2c wr cmd len=%d\n",
  254. __func__, state->demod, cmd->len);
  255. buf[0] = CX24117_REG_COMMAND;
  256. memcpy(&buf[1], cmd->args, cmd->len);
  257. msg.addr = state->priv->demod_address;
  258. msg.flags = 0;
  259. msg.len = cmd->len+1;
  260. msg.buf = buf;
  261. ret = i2c_transfer(state->priv->i2c, &msg, 1);
  262. if (ret < 0) {
  263. dev_warn(&state->priv->i2c->dev,
  264. "%s: demod%d i2c wr cmd err(%i) len=%d\n",
  265. KBUILD_MODNAME, state->demod, ret, cmd->len);
  266. return ret;
  267. }
  268. return 0;
  269. }
  270. static int cx24117_readreg(struct cx24117_state *state, u8 reg)
  271. {
  272. int ret;
  273. u8 recv = 0;
  274. struct i2c_msg msg[] = {
  275. { .addr = state->priv->demod_address, .flags = 0,
  276. .buf = &reg, .len = 1 },
  277. { .addr = state->priv->demod_address, .flags = I2C_M_RD,
  278. .buf = &recv, .len = 1 }
  279. };
  280. ret = i2c_transfer(state->priv->i2c, msg, 2);
  281. if (ret < 0) {
  282. dev_warn(&state->priv->i2c->dev,
  283. "%s: demod%d i2c rd err(%d) @0x%x\n",
  284. KBUILD_MODNAME, state->demod, ret, reg);
  285. return ret;
  286. }
  287. dev_dbg(&state->priv->i2c->dev, "%s() demod%d i2c rd @0x%02x=0x%02x\n",
  288. __func__, state->demod, reg, recv);
  289. return recv;
  290. }
  291. static int cx24117_readregN(struct cx24117_state *state,
  292. u8 reg, u8 *buf, int len)
  293. {
  294. int ret;
  295. struct i2c_msg msg[] = {
  296. { .addr = state->priv->demod_address, .flags = 0,
  297. .buf = &reg, .len = 1 },
  298. { .addr = state->priv->demod_address, .flags = I2C_M_RD,
  299. .buf = buf, .len = len }
  300. };
  301. ret = i2c_transfer(state->priv->i2c, msg, 2);
  302. if (ret < 0) {
  303. dev_warn(&state->priv->i2c->dev,
  304. "%s: demod%d i2c rd err(%d) @0x%x\n",
  305. KBUILD_MODNAME, state->demod, ret, reg);
  306. return ret;
  307. }
  308. return 0;
  309. }
  310. static int cx24117_set_inversion(struct cx24117_state *state,
  311. enum fe_spectral_inversion inversion)
  312. {
  313. dev_dbg(&state->priv->i2c->dev, "%s(%d) demod%d\n",
  314. __func__, inversion, state->demod);
  315. switch (inversion) {
  316. case INVERSION_OFF:
  317. state->dnxt.inversion_val = 0x00;
  318. break;
  319. case INVERSION_ON:
  320. state->dnxt.inversion_val = 0x04;
  321. break;
  322. case INVERSION_AUTO:
  323. state->dnxt.inversion_val = 0x0C;
  324. break;
  325. default:
  326. return -EINVAL;
  327. }
  328. state->dnxt.inversion = inversion;
  329. return 0;
  330. }
  331. static int cx24117_lookup_fecmod(struct cx24117_state *state,
  332. enum fe_delivery_system d, enum fe_modulation m, enum fe_code_rate f)
  333. {
  334. int i, ret = -EINVAL;
  335. dev_dbg(&state->priv->i2c->dev,
  336. "%s(demod(0x%02x,0x%02x) demod%d\n",
  337. __func__, m, f, state->demod);
  338. for (i = 0; i < ARRAY_SIZE(cx24117_modfec_modes); i++) {
  339. if ((d == cx24117_modfec_modes[i].delivery_system) &&
  340. (m == cx24117_modfec_modes[i].modulation) &&
  341. (f == cx24117_modfec_modes[i].fec)) {
  342. ret = i;
  343. break;
  344. }
  345. }
  346. return ret;
  347. }
  348. static int cx24117_set_fec(struct cx24117_state *state,
  349. enum fe_delivery_system delsys,
  350. enum fe_modulation mod,
  351. enum fe_code_rate fec)
  352. {
  353. int ret;
  354. dev_dbg(&state->priv->i2c->dev,
  355. "%s(0x%02x,0x%02x) demod%d\n",
  356. __func__, mod, fec, state->demod);
  357. ret = cx24117_lookup_fecmod(state, delsys, mod, fec);
  358. if (ret < 0)
  359. return ret;
  360. state->dnxt.fec = fec;
  361. state->dnxt.fec_val = cx24117_modfec_modes[ret].val;
  362. state->dnxt.fec_mask = cx24117_modfec_modes[ret].mask;
  363. dev_dbg(&state->priv->i2c->dev,
  364. "%s() demod%d mask/val = 0x%02x/0x%02x\n", __func__,
  365. state->demod, state->dnxt.fec_mask, state->dnxt.fec_val);
  366. return 0;
  367. }
  368. static int cx24117_set_symbolrate(struct cx24117_state *state, u32 rate)
  369. {
  370. dev_dbg(&state->priv->i2c->dev, "%s(%d) demod%d\n",
  371. __func__, rate, state->demod);
  372. state->dnxt.symbol_rate = rate;
  373. dev_dbg(&state->priv->i2c->dev,
  374. "%s() demod%d symbol_rate = %d\n",
  375. __func__, state->demod, rate);
  376. return 0;
  377. }
  378. static int cx24117_load_firmware(struct dvb_frontend *fe,
  379. const struct firmware *fw);
  380. static int cx24117_firmware_ondemand(struct dvb_frontend *fe)
  381. {
  382. struct cx24117_state *state = fe->demodulator_priv;
  383. const struct firmware *fw;
  384. int ret = 0;
  385. dev_dbg(&state->priv->i2c->dev, "%s() demod%d skip_fw_load=%d\n",
  386. __func__, state->demod, state->priv->skip_fw_load);
  387. if (state->priv->skip_fw_load)
  388. return 0;
  389. /* check if firmware is already running */
  390. if (cx24117_readreg(state, 0xeb) != 0xa) {
  391. /* Load firmware */
  392. /* request the firmware, this will block until loaded */
  393. dev_dbg(&state->priv->i2c->dev,
  394. "%s: Waiting for firmware upload (%s)...\n",
  395. __func__, CX24117_DEFAULT_FIRMWARE);
  396. ret = request_firmware(&fw, CX24117_DEFAULT_FIRMWARE,
  397. state->priv->i2c->dev.parent);
  398. dev_dbg(&state->priv->i2c->dev,
  399. "%s: Waiting for firmware upload(2)...\n", __func__);
  400. if (ret) {
  401. dev_err(&state->priv->i2c->dev,
  402. "%s: No firmware uploaded "
  403. "(timeout or file not found?)\n", __func__);
  404. return ret;
  405. }
  406. /* Make sure we don't recurse back through here
  407. * during loading */
  408. state->priv->skip_fw_load = 1;
  409. ret = cx24117_load_firmware(fe, fw);
  410. if (ret)
  411. dev_err(&state->priv->i2c->dev,
  412. "%s: Writing firmware failed\n", __func__);
  413. release_firmware(fw);
  414. dev_info(&state->priv->i2c->dev,
  415. "%s: Firmware upload %s\n", __func__,
  416. ret == 0 ? "complete" : "failed");
  417. /* Ensure firmware is always loaded if required */
  418. state->priv->skip_fw_load = 0;
  419. }
  420. return ret;
  421. }
  422. /* Take a basic firmware command structure, format it
  423. * and forward it for processing
  424. */
  425. static int cx24117_cmd_execute_nolock(struct dvb_frontend *fe,
  426. struct cx24117_cmd *cmd)
  427. {
  428. struct cx24117_state *state = fe->demodulator_priv;
  429. int i, ret;
  430. dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n",
  431. __func__, state->demod);
  432. /* Load the firmware if required */
  433. ret = cx24117_firmware_ondemand(fe);
  434. if (ret != 0)
  435. return ret;
  436. /* Write the command */
  437. cx24117_writecmd(state, cmd);
  438. /* Start execution and wait for cmd to terminate */
  439. cx24117_writereg(state, CX24117_REG_EXECUTE, 0x01);
  440. i = 0;
  441. while (cx24117_readreg(state, CX24117_REG_EXECUTE)) {
  442. msleep(20);
  443. if (i++ > 40) {
  444. /* Avoid looping forever if the firmware does
  445. not respond */
  446. dev_warn(&state->priv->i2c->dev,
  447. "%s() Firmware not responding\n", __func__);
  448. return -EIO;
  449. }
  450. }
  451. return 0;
  452. }
  453. static int cx24117_cmd_execute(struct dvb_frontend *fe, struct cx24117_cmd *cmd)
  454. {
  455. struct cx24117_state *state = fe->demodulator_priv;
  456. int ret;
  457. mutex_lock(&state->priv->fe_lock);
  458. ret = cx24117_cmd_execute_nolock(fe, cmd);
  459. mutex_unlock(&state->priv->fe_lock);
  460. return ret;
  461. }
  462. static int cx24117_load_firmware(struct dvb_frontend *fe,
  463. const struct firmware *fw)
  464. {
  465. struct cx24117_state *state = fe->demodulator_priv;
  466. struct cx24117_cmd cmd;
  467. int i, ret;
  468. unsigned char vers[4];
  469. struct i2c_msg msg;
  470. u8 *buf;
  471. dev_dbg(&state->priv->i2c->dev,
  472. "%s() demod%d FW is %zu bytes (%02x %02x .. %02x %02x)\n",
  473. __func__, state->demod, fw->size, fw->data[0], fw->data[1],
  474. fw->data[fw->size - 2], fw->data[fw->size - 1]);
  475. cx24117_writereg(state, 0xea, 0x00);
  476. cx24117_writereg(state, 0xea, 0x01);
  477. cx24117_writereg(state, 0xea, 0x00);
  478. cx24117_writereg(state, 0xce, 0x92);
  479. cx24117_writereg(state, 0xfb, 0x00);
  480. cx24117_writereg(state, 0xfc, 0x00);
  481. cx24117_writereg(state, 0xc3, 0x04);
  482. cx24117_writereg(state, 0xc4, 0x04);
  483. cx24117_writereg(state, 0xce, 0x00);
  484. cx24117_writereg(state, 0xcf, 0x00);
  485. cx24117_writereg(state, 0xea, 0x00);
  486. cx24117_writereg(state, 0xeb, 0x0c);
  487. cx24117_writereg(state, 0xec, 0x06);
  488. cx24117_writereg(state, 0xed, 0x05);
  489. cx24117_writereg(state, 0xee, 0x03);
  490. cx24117_writereg(state, 0xef, 0x05);
  491. cx24117_writereg(state, 0xf3, 0x03);
  492. cx24117_writereg(state, 0xf4, 0x44);
  493. cx24117_writereg(state, CX24117_REG_RATEDIV0, 0x04);
  494. cx24117_writereg(state, CX24117_REG_CLKDIV0, 0x02);
  495. cx24117_writereg(state, CX24117_REG_RATEDIV1, 0x04);
  496. cx24117_writereg(state, CX24117_REG_CLKDIV1, 0x02);
  497. cx24117_writereg(state, 0xf2, 0x04);
  498. cx24117_writereg(state, 0xe8, 0x02);
  499. cx24117_writereg(state, 0xea, 0x01);
  500. cx24117_writereg(state, 0xc8, 0x00);
  501. cx24117_writereg(state, 0xc9, 0x00);
  502. cx24117_writereg(state, 0xca, 0x00);
  503. cx24117_writereg(state, 0xcb, 0x00);
  504. cx24117_writereg(state, 0xcc, 0x00);
  505. cx24117_writereg(state, 0xcd, 0x00);
  506. cx24117_writereg(state, 0xe4, 0x03);
  507. cx24117_writereg(state, 0xeb, 0x0a);
  508. cx24117_writereg(state, 0xfb, 0x00);
  509. cx24117_writereg(state, 0xe0, 0x76);
  510. cx24117_writereg(state, 0xf7, 0x81);
  511. cx24117_writereg(state, 0xf8, 0x00);
  512. cx24117_writereg(state, 0xf9, 0x00);
  513. buf = kmalloc(fw->size + 1, GFP_KERNEL);
  514. if (buf == NULL) {
  515. state->priv->skip_fw_load = 0;
  516. return -ENOMEM;
  517. }
  518. /* fw upload reg */
  519. buf[0] = 0xfa;
  520. memcpy(&buf[1], fw->data, fw->size);
  521. /* prepare i2c message to send */
  522. msg.addr = state->priv->demod_address;
  523. msg.flags = 0;
  524. msg.len = fw->size + 1;
  525. msg.buf = buf;
  526. /* send fw */
  527. ret = i2c_transfer(state->priv->i2c, &msg, 1);
  528. if (ret < 0)
  529. return ret;
  530. kfree(buf);
  531. cx24117_writereg(state, 0xf7, 0x0c);
  532. cx24117_writereg(state, 0xe0, 0x00);
  533. /* Init demodulator */
  534. cmd.args[0] = CMD_DEMODINIT;
  535. cmd.args[1] = 0x00;
  536. cmd.args[2] = 0x01;
  537. cmd.args[3] = 0x00;
  538. cmd.len = 4;
  539. ret = cx24117_cmd_execute_nolock(fe, &cmd);
  540. if (ret != 0)
  541. goto error;
  542. /* Set VCO frequency */
  543. cmd.args[0] = CMD_SET_VCOFREQ;
  544. cmd.args[1] = 0x06;
  545. cmd.args[2] = 0x2b;
  546. cmd.args[3] = 0xd8;
  547. cmd.args[4] = 0xa5;
  548. cmd.args[5] = 0xee;
  549. cmd.args[6] = 0x03;
  550. cmd.args[7] = 0x9d;
  551. cmd.args[8] = 0xfc;
  552. cmd.args[9] = 0x06;
  553. cmd.args[10] = 0x02;
  554. cmd.args[11] = 0x9d;
  555. cmd.args[12] = 0xfc;
  556. cmd.len = 13;
  557. ret = cx24117_cmd_execute_nolock(fe, &cmd);
  558. if (ret != 0)
  559. goto error;
  560. /* Tuner init */
  561. cmd.args[0] = CMD_TUNERINIT;
  562. cmd.args[1] = 0x00;
  563. cmd.args[2] = 0x01;
  564. cmd.args[3] = 0x00;
  565. cmd.args[4] = 0x00;
  566. cmd.args[5] = 0x01;
  567. cmd.args[6] = 0x01;
  568. cmd.args[7] = 0x01;
  569. cmd.args[8] = 0x00;
  570. cmd.args[9] = 0x05;
  571. cmd.args[10] = 0x02;
  572. cmd.args[11] = 0x02;
  573. cmd.args[12] = 0x00;
  574. cmd.len = 13;
  575. ret = cx24117_cmd_execute_nolock(fe, &cmd);
  576. if (ret != 0)
  577. goto error;
  578. /* Global MPEG config */
  579. cmd.args[0] = CMD_GLOBAL_MPEGCFG;
  580. cmd.args[1] = 0x00;
  581. cmd.args[2] = 0x00;
  582. cmd.args[3] = 0x00;
  583. cmd.args[4] = 0x01;
  584. cmd.args[5] = 0x00;
  585. cmd.len = 6;
  586. ret = cx24117_cmd_execute_nolock(fe, &cmd);
  587. if (ret != 0)
  588. goto error;
  589. /* MPEG config for each demod */
  590. for (i = 0; i < 2; i++) {
  591. cmd.args[0] = CMD_MPEGCFG;
  592. cmd.args[1] = (u8) i;
  593. cmd.args[2] = 0x00;
  594. cmd.args[3] = 0x05;
  595. cmd.args[4] = 0x00;
  596. cmd.args[5] = 0x00;
  597. cmd.args[6] = 0x55;
  598. cmd.args[7] = 0x00;
  599. cmd.len = 8;
  600. ret = cx24117_cmd_execute_nolock(fe, &cmd);
  601. if (ret != 0)
  602. goto error;
  603. }
  604. cx24117_writereg(state, 0xce, 0xc0);
  605. cx24117_writereg(state, 0xcf, 0x00);
  606. cx24117_writereg(state, 0xe5, 0x04);
  607. /* Get firmware version */
  608. cmd.args[0] = CMD_FWVERSION;
  609. cmd.len = 2;
  610. for (i = 0; i < 4; i++) {
  611. cmd.args[1] = i;
  612. ret = cx24117_cmd_execute_nolock(fe, &cmd);
  613. if (ret != 0)
  614. goto error;
  615. vers[i] = cx24117_readreg(state, 0x33);
  616. }
  617. dev_info(&state->priv->i2c->dev,
  618. "%s: FW version %i.%i.%i.%i\n", __func__,
  619. vers[0], vers[1], vers[2], vers[3]);
  620. return 0;
  621. error:
  622. state->priv->skip_fw_load = 0;
  623. dev_err(&state->priv->i2c->dev, "%s() Error running FW.\n", __func__);
  624. return ret;
  625. }
  626. static int cx24117_read_status(struct dvb_frontend *fe, enum fe_status *status)
  627. {
  628. struct cx24117_state *state = fe->demodulator_priv;
  629. int lock;
  630. lock = cx24117_readreg(state,
  631. (state->demod == 0) ? CX24117_REG_SSTATUS0 :
  632. CX24117_REG_SSTATUS1) &
  633. CX24117_STATUS_MASK;
  634. dev_dbg(&state->priv->i2c->dev, "%s() demod%d status = 0x%02x\n",
  635. __func__, state->demod, lock);
  636. *status = 0;
  637. if (lock & CX24117_HAS_SIGNAL)
  638. *status |= FE_HAS_SIGNAL;
  639. if (lock & CX24117_HAS_CARRIER)
  640. *status |= FE_HAS_CARRIER;
  641. if (lock & CX24117_HAS_VITERBI)
  642. *status |= FE_HAS_VITERBI;
  643. if (lock & CX24117_HAS_SYNCLOCK)
  644. *status |= FE_HAS_SYNC | FE_HAS_LOCK;
  645. return 0;
  646. }
  647. static int cx24117_read_ber(struct dvb_frontend *fe, u32 *ber)
  648. {
  649. struct cx24117_state *state = fe->demodulator_priv;
  650. int ret;
  651. u8 buf[4];
  652. u8 base_reg = (state->demod == 0) ?
  653. CX24117_REG_BER4_0 :
  654. CX24117_REG_BER4_1;
  655. ret = cx24117_readregN(state, base_reg, buf, 4);
  656. if (ret != 0)
  657. return ret;
  658. *ber = (buf[0] << 24) | (buf[1] << 16) |
  659. (buf[1] << 8) | buf[0];
  660. dev_dbg(&state->priv->i2c->dev, "%s() demod%d ber=0x%04x\n",
  661. __func__, state->demod, *ber);
  662. return 0;
  663. }
  664. static int cx24117_read_signal_strength(struct dvb_frontend *fe,
  665. u16 *signal_strength)
  666. {
  667. struct cx24117_state *state = fe->demodulator_priv;
  668. struct cx24117_cmd cmd;
  669. int ret;
  670. u16 sig_reading;
  671. u8 buf[2];
  672. u8 reg = (state->demod == 0) ?
  673. CX24117_REG_SSTATUS0 : CX24117_REG_SSTATUS1;
  674. /* Read AGC accumulator register */
  675. cmd.args[0] = CMD_GET_AGCACC;
  676. cmd.args[1] = (u8) state->demod;
  677. cmd.len = 2;
  678. ret = cx24117_cmd_execute(fe, &cmd);
  679. if (ret != 0)
  680. return ret;
  681. ret = cx24117_readregN(state, reg, buf, 2);
  682. if (ret != 0)
  683. return ret;
  684. sig_reading = ((buf[0] & CX24117_SIGNAL_MASK) << 2) | buf[1];
  685. *signal_strength = -100 * sig_reading + 94324;
  686. dev_dbg(&state->priv->i2c->dev,
  687. "%s() demod%d raw / cooked = 0x%04x / 0x%04x\n",
  688. __func__, state->demod, sig_reading, *signal_strength);
  689. return 0;
  690. }
  691. static int cx24117_read_snr(struct dvb_frontend *fe, u16 *snr)
  692. {
  693. struct cx24117_state *state = fe->demodulator_priv;
  694. int ret;
  695. u8 buf[2];
  696. u8 reg = (state->demod == 0) ?
  697. CX24117_REG_QUALITY2_0 : CX24117_REG_QUALITY2_1;
  698. ret = cx24117_readregN(state, reg, buf, 2);
  699. if (ret != 0)
  700. return ret;
  701. *snr = (buf[0] << 8) | buf[1];
  702. dev_dbg(&state->priv->i2c->dev,
  703. "%s() demod%d snr = 0x%04x\n",
  704. __func__, state->demod, *snr);
  705. return ret;
  706. }
  707. static int cx24117_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
  708. {
  709. struct cx24117_state *state = fe->demodulator_priv;
  710. enum fe_delivery_system delsys = fe->dtv_property_cache.delivery_system;
  711. int ret;
  712. u8 buf[2];
  713. u8 reg = (state->demod == 0) ?
  714. CX24117_REG_DVBS_UCB2_0 :
  715. CX24117_REG_DVBS_UCB2_1;
  716. switch (delsys) {
  717. case SYS_DVBS:
  718. break;
  719. case SYS_DVBS2:
  720. reg += (CX24117_REG_DVBS2_UCB2_0 - CX24117_REG_DVBS_UCB2_0);
  721. break;
  722. default:
  723. return -EINVAL;
  724. }
  725. ret = cx24117_readregN(state, reg, buf, 2);
  726. if (ret != 0)
  727. return ret;
  728. *ucblocks = (buf[0] << 8) | buf[1];
  729. dev_dbg(&state->priv->i2c->dev, "%s() demod%d ucb=0x%04x\n",
  730. __func__, state->demod, *ucblocks);
  731. return 0;
  732. }
  733. /* Overwrite the current tuning params, we are about to tune */
  734. static void cx24117_clone_params(struct dvb_frontend *fe)
  735. {
  736. struct cx24117_state *state = fe->demodulator_priv;
  737. state->dcur = state->dnxt;
  738. }
  739. /* Wait for LNB */
  740. static int cx24117_wait_for_lnb(struct dvb_frontend *fe)
  741. {
  742. struct cx24117_state *state = fe->demodulator_priv;
  743. int i;
  744. u8 val, reg = (state->demod == 0) ? CX24117_REG_QSTATUS0 :
  745. CX24117_REG_QSTATUS1;
  746. dev_dbg(&state->priv->i2c->dev, "%s() demod%d qstatus = 0x%02x\n",
  747. __func__, state->demod, cx24117_readreg(state, reg));
  748. /* Wait for up to 300 ms */
  749. for (i = 0; i < 10; i++) {
  750. val = cx24117_readreg(state, reg) & 0x01;
  751. if (val != 0)
  752. return 0;
  753. msleep(30);
  754. }
  755. dev_warn(&state->priv->i2c->dev, "%s: demod%d LNB not ready\n",
  756. KBUILD_MODNAME, state->demod);
  757. return -ETIMEDOUT; /* -EBUSY ? */
  758. }
  759. static int cx24117_set_voltage(struct dvb_frontend *fe,
  760. enum fe_sec_voltage voltage)
  761. {
  762. struct cx24117_state *state = fe->demodulator_priv;
  763. struct cx24117_cmd cmd;
  764. int ret;
  765. u8 reg = (state->demod == 0) ? 0x10 : 0x20;
  766. dev_dbg(&state->priv->i2c->dev, "%s() demod%d %s\n",
  767. __func__, state->demod,
  768. voltage == SEC_VOLTAGE_13 ? "SEC_VOLTAGE_13" :
  769. voltage == SEC_VOLTAGE_18 ? "SEC_VOLTAGE_18" :
  770. "SEC_VOLTAGE_OFF");
  771. /* Prepare a set GPIO logic level CMD */
  772. cmd.args[0] = CMD_SET_GPIOOUT;
  773. cmd.args[2] = reg; /* mask */
  774. cmd.len = 3;
  775. if ((voltage == SEC_VOLTAGE_13) ||
  776. (voltage == SEC_VOLTAGE_18)) {
  777. /* power on LNB */
  778. cmd.args[1] = reg;
  779. ret = cx24117_cmd_execute(fe, &cmd);
  780. if (ret != 0)
  781. return ret;
  782. ret = cx24117_wait_for_lnb(fe);
  783. if (ret != 0)
  784. return ret;
  785. /* Wait for voltage/min repeat delay */
  786. msleep(100);
  787. /* Set 13V/18V select pin */
  788. cmd.args[0] = CMD_LNBDCLEVEL;
  789. cmd.args[1] = state->demod ? 0 : 1;
  790. cmd.args[2] = (voltage == SEC_VOLTAGE_18 ? 0x01 : 0x00);
  791. cmd.len = 3;
  792. ret = cx24117_cmd_execute(fe, &cmd);
  793. /* Min delay time before DiSEqC send */
  794. msleep(20);
  795. } else {
  796. /* power off LNB */
  797. cmd.args[1] = 0x00;
  798. ret = cx24117_cmd_execute(fe, &cmd);
  799. }
  800. return ret;
  801. }
  802. static int cx24117_set_tone(struct dvb_frontend *fe,
  803. enum fe_sec_tone_mode tone)
  804. {
  805. struct cx24117_state *state = fe->demodulator_priv;
  806. struct cx24117_cmd cmd;
  807. int ret;
  808. dev_dbg(&state->priv->i2c->dev, "%s(%d) demod%d\n",
  809. __func__, state->demod, tone);
  810. if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) {
  811. dev_warn(&state->priv->i2c->dev, "%s: demod%d invalid tone=%d\n",
  812. KBUILD_MODNAME, state->demod, tone);
  813. return -EINVAL;
  814. }
  815. /* Wait for LNB ready */
  816. ret = cx24117_wait_for_lnb(fe);
  817. if (ret != 0)
  818. return ret;
  819. /* Min delay time after DiSEqC send */
  820. msleep(20);
  821. /* Set the tone */
  822. cmd.args[0] = CMD_LNBPCBCONFIG;
  823. cmd.args[1] = (state->demod ? 0 : 1);
  824. cmd.args[2] = 0x00;
  825. cmd.args[3] = 0x00;
  826. cmd.len = 5;
  827. switch (tone) {
  828. case SEC_TONE_ON:
  829. cmd.args[4] = 0x01;
  830. break;
  831. case SEC_TONE_OFF:
  832. cmd.args[4] = 0x00;
  833. break;
  834. }
  835. msleep(20);
  836. return cx24117_cmd_execute(fe, &cmd);
  837. }
  838. /* Initialise DiSEqC */
  839. static int cx24117_diseqc_init(struct dvb_frontend *fe)
  840. {
  841. struct cx24117_state *state = fe->demodulator_priv;
  842. /* Prepare a DiSEqC command */
  843. state->dsec_cmd.args[0] = CMD_LNBSEND;
  844. /* demod */
  845. state->dsec_cmd.args[CX24117_DISEQC_DEMOD] = state->demod ? 0 : 1;
  846. /* DiSEqC burst */
  847. state->dsec_cmd.args[CX24117_DISEQC_BURST] = CX24117_DISEQC_MINI_A;
  848. /* Unknown */
  849. state->dsec_cmd.args[CX24117_DISEQC_ARG3_2] = 0x02;
  850. state->dsec_cmd.args[CX24117_DISEQC_ARG4_0] = 0x00;
  851. /* Continuation flag? */
  852. state->dsec_cmd.args[CX24117_DISEQC_ARG5_0] = 0x00;
  853. /* DiSEqC message length */
  854. state->dsec_cmd.args[CX24117_DISEQC_MSGLEN] = 0x00;
  855. /* Command length */
  856. state->dsec_cmd.len = 7;
  857. return 0;
  858. }
  859. /* Send DiSEqC message */
  860. static int cx24117_send_diseqc_msg(struct dvb_frontend *fe,
  861. struct dvb_diseqc_master_cmd *d)
  862. {
  863. struct cx24117_state *state = fe->demodulator_priv;
  864. int i, ret;
  865. /* Dump DiSEqC message */
  866. dev_dbg(&state->priv->i2c->dev, "%s: demod %d (",
  867. __func__, state->demod);
  868. for (i = 0; i < d->msg_len; i++)
  869. dev_dbg(&state->priv->i2c->dev, "0x%02x ", d->msg[i]);
  870. dev_dbg(&state->priv->i2c->dev, ")\n");
  871. /* Validate length */
  872. if (d->msg_len > sizeof(d->msg))
  873. return -EINVAL;
  874. /* DiSEqC message */
  875. for (i = 0; i < d->msg_len; i++)
  876. state->dsec_cmd.args[CX24117_DISEQC_MSGOFS + i] = d->msg[i];
  877. /* DiSEqC message length */
  878. state->dsec_cmd.args[CX24117_DISEQC_MSGLEN] = d->msg_len;
  879. /* Command length */
  880. state->dsec_cmd.len = CX24117_DISEQC_MSGOFS +
  881. state->dsec_cmd.args[CX24117_DISEQC_MSGLEN];
  882. /*
  883. * Message is sent with derived else cached burst
  884. *
  885. * WRITE PORT GROUP COMMAND 38
  886. *
  887. * 0/A/A: E0 10 38 F0..F3
  888. * 1/B/B: E0 10 38 F4..F7
  889. * 2/C/A: E0 10 38 F8..FB
  890. * 3/D/B: E0 10 38 FC..FF
  891. *
  892. * databyte[3]= 8421:8421
  893. * ABCD:WXYZ
  894. * CLR :SET
  895. *
  896. * WX= PORT SELECT 0..3 (X=TONEBURST)
  897. * Y = VOLTAGE (0=13V, 1=18V)
  898. * Z = BAND (0=LOW, 1=HIGH(22K))
  899. */
  900. if (d->msg_len >= 4 && d->msg[2] == 0x38)
  901. state->dsec_cmd.args[CX24117_DISEQC_BURST] =
  902. ((d->msg[3] & 4) >> 2);
  903. dev_dbg(&state->priv->i2c->dev, "%s() demod%d burst=%d\n",
  904. __func__, state->demod,
  905. state->dsec_cmd.args[CX24117_DISEQC_BURST]);
  906. /* Wait for LNB ready */
  907. ret = cx24117_wait_for_lnb(fe);
  908. if (ret != 0)
  909. return ret;
  910. /* Wait for voltage/min repeat delay */
  911. msleep(100);
  912. /* Command */
  913. ret = cx24117_cmd_execute(fe, &state->dsec_cmd);
  914. if (ret != 0)
  915. return ret;
  916. /*
  917. * Wait for send
  918. *
  919. * Eutelsat spec:
  920. * >15ms delay + (XXX determine if FW does this, see set_tone)
  921. * 13.5ms per byte +
  922. * >15ms delay +
  923. * 12.5ms burst +
  924. * >15ms delay (XXX determine if FW does this, see set_tone)
  925. */
  926. msleep((state->dsec_cmd.args[CX24117_DISEQC_MSGLEN] << 4) + 60);
  927. return 0;
  928. }
  929. /* Send DiSEqC burst */
  930. static int cx24117_diseqc_send_burst(struct dvb_frontend *fe,
  931. enum fe_sec_mini_cmd burst)
  932. {
  933. struct cx24117_state *state = fe->demodulator_priv;
  934. dev_dbg(&state->priv->i2c->dev, "%s(%d) demod=%d\n",
  935. __func__, burst, state->demod);
  936. /* DiSEqC burst */
  937. if (burst == SEC_MINI_A)
  938. state->dsec_cmd.args[CX24117_DISEQC_BURST] =
  939. CX24117_DISEQC_MINI_A;
  940. else if (burst == SEC_MINI_B)
  941. state->dsec_cmd.args[CX24117_DISEQC_BURST] =
  942. CX24117_DISEQC_MINI_B;
  943. else
  944. return -EINVAL;
  945. return 0;
  946. }
  947. static int cx24117_get_priv(struct cx24117_priv **priv,
  948. struct i2c_adapter *i2c, u8 client_address)
  949. {
  950. int ret;
  951. mutex_lock(&cx24117_list_mutex);
  952. ret = hybrid_tuner_request_state(struct cx24117_priv, (*priv),
  953. hybrid_tuner_instance_list, i2c, client_address, "cx24117");
  954. mutex_unlock(&cx24117_list_mutex);
  955. return ret;
  956. }
  957. static void cx24117_release_priv(struct cx24117_priv *priv)
  958. {
  959. mutex_lock(&cx24117_list_mutex);
  960. if (priv != NULL)
  961. hybrid_tuner_release_state(priv);
  962. mutex_unlock(&cx24117_list_mutex);
  963. }
  964. static void cx24117_release(struct dvb_frontend *fe)
  965. {
  966. struct cx24117_state *state = fe->demodulator_priv;
  967. dev_dbg(&state->priv->i2c->dev, "%s demod%d\n",
  968. __func__, state->demod);
  969. cx24117_release_priv(state->priv);
  970. kfree(state);
  971. }
  972. static struct dvb_frontend_ops cx24117_ops;
  973. struct dvb_frontend *cx24117_attach(const struct cx24117_config *config,
  974. struct i2c_adapter *i2c)
  975. {
  976. struct cx24117_state *state = NULL;
  977. struct cx24117_priv *priv = NULL;
  978. int demod = 0;
  979. /* get the common data struct for both demods */
  980. demod = cx24117_get_priv(&priv, i2c, config->demod_address);
  981. switch (demod) {
  982. case 0:
  983. dev_err(&i2c->dev,
  984. "%s: Error attaching frontend %d\n",
  985. KBUILD_MODNAME, demod);
  986. goto error1;
  987. break;
  988. case 1:
  989. /* new priv instance */
  990. priv->i2c = i2c;
  991. priv->demod_address = config->demod_address;
  992. mutex_init(&priv->fe_lock);
  993. break;
  994. default:
  995. /* existing priv instance */
  996. break;
  997. }
  998. /* allocate memory for the internal state */
  999. state = kzalloc(sizeof(struct cx24117_state), GFP_KERNEL);
  1000. if (state == NULL)
  1001. goto error2;
  1002. state->demod = demod - 1;
  1003. state->priv = priv;
  1004. dev_info(&state->priv->i2c->dev,
  1005. "%s: Attaching frontend %d\n",
  1006. KBUILD_MODNAME, state->demod);
  1007. /* create dvb_frontend */
  1008. memcpy(&state->frontend.ops, &cx24117_ops,
  1009. sizeof(struct dvb_frontend_ops));
  1010. state->frontend.demodulator_priv = state;
  1011. return &state->frontend;
  1012. error2:
  1013. cx24117_release_priv(priv);
  1014. error1:
  1015. return NULL;
  1016. }
  1017. EXPORT_SYMBOL_GPL(cx24117_attach);
  1018. /*
  1019. * Initialise or wake up device
  1020. *
  1021. * Power config will reset and load initial firmware if required
  1022. */
  1023. static int cx24117_initfe(struct dvb_frontend *fe)
  1024. {
  1025. struct cx24117_state *state = fe->demodulator_priv;
  1026. struct cx24117_cmd cmd;
  1027. int ret;
  1028. dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n",
  1029. __func__, state->demod);
  1030. mutex_lock(&state->priv->fe_lock);
  1031. /* Set sleep mode off */
  1032. cmd.args[0] = CMD_SET_SLEEPMODE;
  1033. cmd.args[1] = (state->demod ? 1 : 0);
  1034. cmd.args[2] = 0;
  1035. cmd.len = 3;
  1036. ret = cx24117_cmd_execute_nolock(fe, &cmd);
  1037. if (ret != 0)
  1038. goto exit;
  1039. ret = cx24117_diseqc_init(fe);
  1040. if (ret != 0)
  1041. goto exit;
  1042. /* Set BER control */
  1043. cmd.args[0] = CMD_BERCTRL;
  1044. cmd.args[1] = (state->demod ? 1 : 0);
  1045. cmd.args[2] = 0x10;
  1046. cmd.args[3] = 0x10;
  1047. cmd.len = 4;
  1048. ret = cx24117_cmd_execute_nolock(fe, &cmd);
  1049. if (ret != 0)
  1050. goto exit;
  1051. /* Set RS correction (enable/disable) */
  1052. cmd.args[0] = CMD_ENABLERSCORR;
  1053. cmd.args[1] = (state->demod ? 1 : 0);
  1054. cmd.args[2] = CX24117_OCC;
  1055. cmd.len = 3;
  1056. ret = cx24117_cmd_execute_nolock(fe, &cmd);
  1057. if (ret != 0)
  1058. goto exit;
  1059. /* Set GPIO direction */
  1060. /* Set as output - controls LNB power on/off */
  1061. cmd.args[0] = CMD_SET_GPIODIR;
  1062. cmd.args[1] = 0x30;
  1063. cmd.args[2] = 0x30;
  1064. cmd.len = 3;
  1065. ret = cx24117_cmd_execute_nolock(fe, &cmd);
  1066. exit:
  1067. mutex_unlock(&state->priv->fe_lock);
  1068. return ret;
  1069. }
  1070. /*
  1071. * Put device to sleep
  1072. */
  1073. static int cx24117_sleep(struct dvb_frontend *fe)
  1074. {
  1075. struct cx24117_state *state = fe->demodulator_priv;
  1076. struct cx24117_cmd cmd;
  1077. dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n",
  1078. __func__, state->demod);
  1079. /* Set sleep mode on */
  1080. cmd.args[0] = CMD_SET_SLEEPMODE;
  1081. cmd.args[1] = (state->demod ? 1 : 0);
  1082. cmd.args[2] = 1;
  1083. cmd.len = 3;
  1084. return cx24117_cmd_execute(fe, &cmd);
  1085. }
  1086. /* dvb-core told us to tune, the tv property cache will be complete,
  1087. * it's safe for is to pull values and use them for tuning purposes.
  1088. */
  1089. static int cx24117_set_frontend(struct dvb_frontend *fe)
  1090. {
  1091. struct cx24117_state *state = fe->demodulator_priv;
  1092. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  1093. struct cx24117_cmd cmd;
  1094. enum fe_status tunerstat;
  1095. int i, status, ret, retune = 1;
  1096. u8 reg_clkdiv, reg_ratediv;
  1097. dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n",
  1098. __func__, state->demod);
  1099. switch (c->delivery_system) {
  1100. case SYS_DVBS:
  1101. dev_dbg(&state->priv->i2c->dev, "%s() demod%d DVB-S\n",
  1102. __func__, state->demod);
  1103. /* Only QPSK is supported for DVB-S */
  1104. if (c->modulation != QPSK) {
  1105. dev_dbg(&state->priv->i2c->dev,
  1106. "%s() demod%d unsupported modulation (%d)\n",
  1107. __func__, state->demod, c->modulation);
  1108. return -EINVAL;
  1109. }
  1110. /* Pilot doesn't exist in DVB-S, turn bit off */
  1111. state->dnxt.pilot_val = CX24117_PILOT_OFF;
  1112. /* DVB-S only supports 0.35 */
  1113. state->dnxt.rolloff_val = CX24117_ROLLOFF_035;
  1114. break;
  1115. case SYS_DVBS2:
  1116. dev_dbg(&state->priv->i2c->dev, "%s() demod%d DVB-S2\n",
  1117. __func__, state->demod);
  1118. /*
  1119. * NBC 8PSK/QPSK with DVB-S is supported for DVB-S2,
  1120. * but not hardware auto detection
  1121. */
  1122. if (c->modulation != PSK_8 && c->modulation != QPSK) {
  1123. dev_dbg(&state->priv->i2c->dev,
  1124. "%s() demod%d unsupported modulation (%d)\n",
  1125. __func__, state->demod, c->modulation);
  1126. return -EOPNOTSUPP;
  1127. }
  1128. switch (c->pilot) {
  1129. case PILOT_AUTO:
  1130. state->dnxt.pilot_val = CX24117_PILOT_AUTO;
  1131. break;
  1132. case PILOT_OFF:
  1133. state->dnxt.pilot_val = CX24117_PILOT_OFF;
  1134. break;
  1135. case PILOT_ON:
  1136. state->dnxt.pilot_val = CX24117_PILOT_ON;
  1137. break;
  1138. default:
  1139. dev_dbg(&state->priv->i2c->dev,
  1140. "%s() demod%d unsupported pilot mode (%d)\n",
  1141. __func__, state->demod, c->pilot);
  1142. return -EOPNOTSUPP;
  1143. }
  1144. switch (c->rolloff) {
  1145. case ROLLOFF_20:
  1146. state->dnxt.rolloff_val = CX24117_ROLLOFF_020;
  1147. break;
  1148. case ROLLOFF_25:
  1149. state->dnxt.rolloff_val = CX24117_ROLLOFF_025;
  1150. break;
  1151. case ROLLOFF_35:
  1152. state->dnxt.rolloff_val = CX24117_ROLLOFF_035;
  1153. break;
  1154. case ROLLOFF_AUTO:
  1155. state->dnxt.rolloff_val = CX24117_ROLLOFF_035;
  1156. /* soft-auto rolloff */
  1157. retune = 3;
  1158. break;
  1159. default:
  1160. dev_warn(&state->priv->i2c->dev,
  1161. "%s: demod%d unsupported rolloff (%d)\n",
  1162. KBUILD_MODNAME, state->demod, c->rolloff);
  1163. return -EOPNOTSUPP;
  1164. }
  1165. break;
  1166. default:
  1167. dev_warn(&state->priv->i2c->dev,
  1168. "%s: demod %d unsupported delivery system (%d)\n",
  1169. KBUILD_MODNAME, state->demod, c->delivery_system);
  1170. return -EINVAL;
  1171. }
  1172. state->dnxt.delsys = c->delivery_system;
  1173. state->dnxt.modulation = c->modulation;
  1174. state->dnxt.frequency = c->frequency;
  1175. state->dnxt.pilot = c->pilot;
  1176. state->dnxt.rolloff = c->rolloff;
  1177. ret = cx24117_set_inversion(state, c->inversion);
  1178. if (ret != 0)
  1179. return ret;
  1180. ret = cx24117_set_fec(state,
  1181. c->delivery_system, c->modulation, c->fec_inner);
  1182. if (ret != 0)
  1183. return ret;
  1184. ret = cx24117_set_symbolrate(state, c->symbol_rate);
  1185. if (ret != 0)
  1186. return ret;
  1187. /* discard the 'current' tuning parameters and prepare to tune */
  1188. cx24117_clone_params(fe);
  1189. dev_dbg(&state->priv->i2c->dev,
  1190. "%s: delsys = %d\n", __func__, state->dcur.delsys);
  1191. dev_dbg(&state->priv->i2c->dev,
  1192. "%s: modulation = %d\n", __func__, state->dcur.modulation);
  1193. dev_dbg(&state->priv->i2c->dev,
  1194. "%s: frequency = %d\n", __func__, state->dcur.frequency);
  1195. dev_dbg(&state->priv->i2c->dev,
  1196. "%s: pilot = %d (val = 0x%02x)\n", __func__,
  1197. state->dcur.pilot, state->dcur.pilot_val);
  1198. dev_dbg(&state->priv->i2c->dev,
  1199. "%s: retune = %d\n", __func__, retune);
  1200. dev_dbg(&state->priv->i2c->dev,
  1201. "%s: rolloff = %d (val = 0x%02x)\n", __func__,
  1202. state->dcur.rolloff, state->dcur.rolloff_val);
  1203. dev_dbg(&state->priv->i2c->dev,
  1204. "%s: symbol_rate = %d\n", __func__, state->dcur.symbol_rate);
  1205. dev_dbg(&state->priv->i2c->dev,
  1206. "%s: FEC = %d (mask/val = 0x%02x/0x%02x)\n", __func__,
  1207. state->dcur.fec, state->dcur.fec_mask, state->dcur.fec_val);
  1208. dev_dbg(&state->priv->i2c->dev,
  1209. "%s: Inversion = %d (val = 0x%02x)\n", __func__,
  1210. state->dcur.inversion, state->dcur.inversion_val);
  1211. /* Prepare a tune request */
  1212. cmd.args[0] = CMD_TUNEREQUEST;
  1213. /* demod */
  1214. cmd.args[1] = state->demod;
  1215. /* Frequency */
  1216. cmd.args[2] = (state->dcur.frequency & 0xff0000) >> 16;
  1217. cmd.args[3] = (state->dcur.frequency & 0x00ff00) >> 8;
  1218. cmd.args[4] = (state->dcur.frequency & 0x0000ff);
  1219. /* Symbol Rate */
  1220. cmd.args[5] = ((state->dcur.symbol_rate / 1000) & 0xff00) >> 8;
  1221. cmd.args[6] = ((state->dcur.symbol_rate / 1000) & 0x00ff);
  1222. /* Automatic Inversion */
  1223. cmd.args[7] = state->dcur.inversion_val;
  1224. /* Modulation / FEC / Pilot */
  1225. cmd.args[8] = state->dcur.fec_val | state->dcur.pilot_val;
  1226. cmd.args[9] = CX24117_SEARCH_RANGE_KHZ >> 8;
  1227. cmd.args[10] = CX24117_SEARCH_RANGE_KHZ & 0xff;
  1228. cmd.args[11] = state->dcur.rolloff_val;
  1229. cmd.args[12] = state->dcur.fec_mask;
  1230. if (state->dcur.symbol_rate > 30000000) {
  1231. reg_ratediv = 0x04;
  1232. reg_clkdiv = 0x02;
  1233. } else if (state->dcur.symbol_rate > 10000000) {
  1234. reg_ratediv = 0x06;
  1235. reg_clkdiv = 0x03;
  1236. } else {
  1237. reg_ratediv = 0x0a;
  1238. reg_clkdiv = 0x05;
  1239. }
  1240. cmd.args[13] = reg_ratediv;
  1241. cmd.args[14] = reg_clkdiv;
  1242. cx24117_writereg(state, (state->demod == 0) ?
  1243. CX24117_REG_CLKDIV0 : CX24117_REG_CLKDIV1, reg_clkdiv);
  1244. cx24117_writereg(state, (state->demod == 0) ?
  1245. CX24117_REG_RATEDIV0 : CX24117_REG_RATEDIV1, reg_ratediv);
  1246. cmd.args[15] = CX24117_PNE;
  1247. cmd.len = 16;
  1248. do {
  1249. /* Reset status register */
  1250. status = cx24117_readreg(state, (state->demod == 0) ?
  1251. CX24117_REG_SSTATUS0 : CX24117_REG_SSTATUS1) &
  1252. CX24117_SIGNAL_MASK;
  1253. dev_dbg(&state->priv->i2c->dev,
  1254. "%s() demod%d status_setfe = %02x\n",
  1255. __func__, state->demod, status);
  1256. cx24117_writereg(state, (state->demod == 0) ?
  1257. CX24117_REG_SSTATUS0 : CX24117_REG_SSTATUS1, status);
  1258. /* Tune */
  1259. ret = cx24117_cmd_execute(fe, &cmd);
  1260. if (ret != 0)
  1261. break;
  1262. /*
  1263. * Wait for up to 500 ms before retrying
  1264. *
  1265. * If we are able to tune then generally it occurs within 100ms.
  1266. * If it takes longer, try a different rolloff setting.
  1267. */
  1268. for (i = 0; i < 50; i++) {
  1269. cx24117_read_status(fe, &tunerstat);
  1270. status = tunerstat & (FE_HAS_SIGNAL | FE_HAS_SYNC);
  1271. if (status == (FE_HAS_SIGNAL | FE_HAS_SYNC)) {
  1272. dev_dbg(&state->priv->i2c->dev,
  1273. "%s() demod%d tuned\n",
  1274. __func__, state->demod);
  1275. return 0;
  1276. }
  1277. msleep(20);
  1278. }
  1279. dev_dbg(&state->priv->i2c->dev, "%s() demod%d not tuned\n",
  1280. __func__, state->demod);
  1281. /* try next rolloff value */
  1282. if (state->dcur.rolloff == 3)
  1283. cmd.args[11]--;
  1284. } while (--retune);
  1285. return -EINVAL;
  1286. }
  1287. static int cx24117_tune(struct dvb_frontend *fe, bool re_tune,
  1288. unsigned int mode_flags, unsigned int *delay, enum fe_status *status)
  1289. {
  1290. struct cx24117_state *state = fe->demodulator_priv;
  1291. dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n",
  1292. __func__, state->demod);
  1293. *delay = HZ / 5;
  1294. if (re_tune) {
  1295. int ret = cx24117_set_frontend(fe);
  1296. if (ret)
  1297. return ret;
  1298. }
  1299. return cx24117_read_status(fe, status);
  1300. }
  1301. static int cx24117_get_algo(struct dvb_frontend *fe)
  1302. {
  1303. return DVBFE_ALGO_HW;
  1304. }
  1305. static int cx24117_get_frontend(struct dvb_frontend *fe)
  1306. {
  1307. struct cx24117_state *state = fe->demodulator_priv;
  1308. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  1309. struct cx24117_cmd cmd;
  1310. u8 reg, st, inv;
  1311. int ret, idx;
  1312. unsigned int freq;
  1313. short srate_os, freq_os;
  1314. u8 buf[0x1f-4];
  1315. /* Read current tune parameters */
  1316. cmd.args[0] = CMD_GETCTLACC;
  1317. cmd.args[1] = (u8) state->demod;
  1318. cmd.len = 2;
  1319. ret = cx24117_cmd_execute(fe, &cmd);
  1320. if (ret != 0)
  1321. return ret;
  1322. /* read all required regs at once */
  1323. reg = (state->demod == 0) ? CX24117_REG_FREQ3_0 : CX24117_REG_FREQ3_1;
  1324. ret = cx24117_readregN(state, reg, buf, 0x1f-4);
  1325. if (ret != 0)
  1326. return ret;
  1327. st = buf[5];
  1328. /* get spectral inversion */
  1329. inv = (((state->demod == 0) ? ~st : st) >> 6) & 1;
  1330. if (inv == 0)
  1331. c->inversion = INVERSION_OFF;
  1332. else
  1333. c->inversion = INVERSION_ON;
  1334. /* modulation and fec */
  1335. idx = st & 0x3f;
  1336. if (c->delivery_system == SYS_DVBS2) {
  1337. if (idx > 11)
  1338. idx += 9;
  1339. else
  1340. idx += 7;
  1341. }
  1342. c->modulation = cx24117_modfec_modes[idx].modulation;
  1343. c->fec_inner = cx24117_modfec_modes[idx].fec;
  1344. /* frequency */
  1345. freq = (buf[0] << 16) | (buf[1] << 8) | buf[2];
  1346. freq_os = (buf[8] << 8) | buf[9];
  1347. c->frequency = freq + freq_os;
  1348. /* symbol rate */
  1349. srate_os = (buf[10] << 8) | buf[11];
  1350. c->symbol_rate = -1000 * srate_os + state->dcur.symbol_rate;
  1351. return 0;
  1352. }
  1353. static struct dvb_frontend_ops cx24117_ops = {
  1354. .delsys = { SYS_DVBS, SYS_DVBS2 },
  1355. .info = {
  1356. .name = "Conexant CX24117/CX24132",
  1357. .frequency_min = 950000,
  1358. .frequency_max = 2150000,
  1359. .frequency_stepsize = 1011, /* kHz for QPSK frontends */
  1360. .frequency_tolerance = 5000,
  1361. .symbol_rate_min = 1000000,
  1362. .symbol_rate_max = 45000000,
  1363. .caps = FE_CAN_INVERSION_AUTO |
  1364. FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
  1365. FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
  1366. FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
  1367. FE_CAN_2G_MODULATION |
  1368. FE_CAN_QPSK | FE_CAN_RECOVER
  1369. },
  1370. .release = cx24117_release,
  1371. .init = cx24117_initfe,
  1372. .sleep = cx24117_sleep,
  1373. .read_status = cx24117_read_status,
  1374. .read_ber = cx24117_read_ber,
  1375. .read_signal_strength = cx24117_read_signal_strength,
  1376. .read_snr = cx24117_read_snr,
  1377. .read_ucblocks = cx24117_read_ucblocks,
  1378. .set_tone = cx24117_set_tone,
  1379. .set_voltage = cx24117_set_voltage,
  1380. .diseqc_send_master_cmd = cx24117_send_diseqc_msg,
  1381. .diseqc_send_burst = cx24117_diseqc_send_burst,
  1382. .get_frontend_algo = cx24117_get_algo,
  1383. .tune = cx24117_tune,
  1384. .set_frontend = cx24117_set_frontend,
  1385. .get_frontend = cx24117_get_frontend,
  1386. };
  1387. MODULE_DESCRIPTION("DVB Frontend module for Conexant cx24117/cx24132 hardware");
  1388. MODULE_AUTHOR("Luis Alves (ljalvs@gmail.com)");
  1389. MODULE_LICENSE("GPL");
  1390. MODULE_VERSION("1.1");
  1391. MODULE_FIRMWARE(CX24117_DEFAULT_FIRMWARE);