cxd2820r_core.c 17 KB

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  1. /*
  2. * Sony CXD2820R demodulator driver
  3. *
  4. * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. */
  20. #include "cxd2820r_priv.h"
  21. /* Max transfer size done by I2C transfer functions */
  22. #define MAX_XFER_SIZE 64
  23. /* write multiple registers */
  24. static int cxd2820r_wr_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
  25. u8 *val, int len)
  26. {
  27. int ret;
  28. u8 buf[MAX_XFER_SIZE];
  29. struct i2c_msg msg[1] = {
  30. {
  31. .addr = i2c,
  32. .flags = 0,
  33. .len = len + 1,
  34. .buf = buf,
  35. }
  36. };
  37. if (1 + len > sizeof(buf)) {
  38. dev_warn(&priv->i2c->dev,
  39. "%s: i2c wr reg=%04x: len=%d is too big!\n",
  40. KBUILD_MODNAME, reg, len);
  41. return -EINVAL;
  42. }
  43. buf[0] = reg;
  44. memcpy(&buf[1], val, len);
  45. ret = i2c_transfer(priv->i2c, msg, 1);
  46. if (ret == 1) {
  47. ret = 0;
  48. } else {
  49. dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%02x " \
  50. "len=%d\n", KBUILD_MODNAME, ret, reg, len);
  51. ret = -EREMOTEIO;
  52. }
  53. return ret;
  54. }
  55. /* read multiple registers */
  56. static int cxd2820r_rd_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
  57. u8 *val, int len)
  58. {
  59. int ret;
  60. u8 buf[MAX_XFER_SIZE];
  61. struct i2c_msg msg[2] = {
  62. {
  63. .addr = i2c,
  64. .flags = 0,
  65. .len = 1,
  66. .buf = &reg,
  67. }, {
  68. .addr = i2c,
  69. .flags = I2C_M_RD,
  70. .len = len,
  71. .buf = buf,
  72. }
  73. };
  74. if (len > sizeof(buf)) {
  75. dev_warn(&priv->i2c->dev,
  76. "%s: i2c wr reg=%04x: len=%d is too big!\n",
  77. KBUILD_MODNAME, reg, len);
  78. return -EINVAL;
  79. }
  80. ret = i2c_transfer(priv->i2c, msg, 2);
  81. if (ret == 2) {
  82. memcpy(val, buf, len);
  83. ret = 0;
  84. } else {
  85. dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%02x " \
  86. "len=%d\n", KBUILD_MODNAME, ret, reg, len);
  87. ret = -EREMOTEIO;
  88. }
  89. return ret;
  90. }
  91. /* write multiple registers */
  92. int cxd2820r_wr_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
  93. int len)
  94. {
  95. int ret;
  96. u8 i2c_addr;
  97. u8 reg = (reginfo >> 0) & 0xff;
  98. u8 bank = (reginfo >> 8) & 0xff;
  99. u8 i2c = (reginfo >> 16) & 0x01;
  100. /* select I2C */
  101. if (i2c)
  102. i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
  103. else
  104. i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
  105. /* switch bank if needed */
  106. if (bank != priv->bank[i2c]) {
  107. ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
  108. if (ret)
  109. return ret;
  110. priv->bank[i2c] = bank;
  111. }
  112. return cxd2820r_wr_regs_i2c(priv, i2c_addr, reg, val, len);
  113. }
  114. /* read multiple registers */
  115. int cxd2820r_rd_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
  116. int len)
  117. {
  118. int ret;
  119. u8 i2c_addr;
  120. u8 reg = (reginfo >> 0) & 0xff;
  121. u8 bank = (reginfo >> 8) & 0xff;
  122. u8 i2c = (reginfo >> 16) & 0x01;
  123. /* select I2C */
  124. if (i2c)
  125. i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
  126. else
  127. i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
  128. /* switch bank if needed */
  129. if (bank != priv->bank[i2c]) {
  130. ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
  131. if (ret)
  132. return ret;
  133. priv->bank[i2c] = bank;
  134. }
  135. return cxd2820r_rd_regs_i2c(priv, i2c_addr, reg, val, len);
  136. }
  137. /* write single register */
  138. int cxd2820r_wr_reg(struct cxd2820r_priv *priv, u32 reg, u8 val)
  139. {
  140. return cxd2820r_wr_regs(priv, reg, &val, 1);
  141. }
  142. /* read single register */
  143. int cxd2820r_rd_reg(struct cxd2820r_priv *priv, u32 reg, u8 *val)
  144. {
  145. return cxd2820r_rd_regs(priv, reg, val, 1);
  146. }
  147. /* write single register with mask */
  148. int cxd2820r_wr_reg_mask(struct cxd2820r_priv *priv, u32 reg, u8 val,
  149. u8 mask)
  150. {
  151. int ret;
  152. u8 tmp;
  153. /* no need for read if whole reg is written */
  154. if (mask != 0xff) {
  155. ret = cxd2820r_rd_reg(priv, reg, &tmp);
  156. if (ret)
  157. return ret;
  158. val &= mask;
  159. tmp &= ~mask;
  160. val |= tmp;
  161. }
  162. return cxd2820r_wr_reg(priv, reg, val);
  163. }
  164. int cxd2820r_gpio(struct dvb_frontend *fe, u8 *gpio)
  165. {
  166. struct cxd2820r_priv *priv = fe->demodulator_priv;
  167. int ret, i;
  168. u8 tmp0, tmp1;
  169. dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
  170. fe->dtv_property_cache.delivery_system);
  171. /* update GPIOs only when needed */
  172. if (!memcmp(gpio, priv->gpio, sizeof(priv->gpio)))
  173. return 0;
  174. tmp0 = 0x00;
  175. tmp1 = 0x00;
  176. for (i = 0; i < sizeof(priv->gpio); i++) {
  177. /* enable / disable */
  178. if (gpio[i] & CXD2820R_GPIO_E)
  179. tmp0 |= (2 << 6) >> (2 * i);
  180. else
  181. tmp0 |= (1 << 6) >> (2 * i);
  182. /* input / output */
  183. if (gpio[i] & CXD2820R_GPIO_I)
  184. tmp1 |= (1 << (3 + i));
  185. else
  186. tmp1 |= (0 << (3 + i));
  187. /* high / low */
  188. if (gpio[i] & CXD2820R_GPIO_H)
  189. tmp1 |= (1 << (0 + i));
  190. else
  191. tmp1 |= (0 << (0 + i));
  192. dev_dbg(&priv->i2c->dev, "%s: gpio i=%d %02x %02x\n", __func__,
  193. i, tmp0, tmp1);
  194. }
  195. dev_dbg(&priv->i2c->dev, "%s: wr gpio=%02x %02x\n", __func__, tmp0,
  196. tmp1);
  197. /* write bits [7:2] */
  198. ret = cxd2820r_wr_reg_mask(priv, 0x00089, tmp0, 0xfc);
  199. if (ret)
  200. goto error;
  201. /* write bits [5:0] */
  202. ret = cxd2820r_wr_reg_mask(priv, 0x0008e, tmp1, 0x3f);
  203. if (ret)
  204. goto error;
  205. memcpy(priv->gpio, gpio, sizeof(priv->gpio));
  206. return ret;
  207. error:
  208. dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
  209. return ret;
  210. }
  211. static int cxd2820r_set_frontend(struct dvb_frontend *fe)
  212. {
  213. struct cxd2820r_priv *priv = fe->demodulator_priv;
  214. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  215. int ret;
  216. dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
  217. fe->dtv_property_cache.delivery_system);
  218. switch (c->delivery_system) {
  219. case SYS_DVBT:
  220. ret = cxd2820r_init_t(fe);
  221. if (ret < 0)
  222. goto err;
  223. ret = cxd2820r_set_frontend_t(fe);
  224. if (ret < 0)
  225. goto err;
  226. break;
  227. case SYS_DVBT2:
  228. ret = cxd2820r_init_t(fe);
  229. if (ret < 0)
  230. goto err;
  231. ret = cxd2820r_set_frontend_t2(fe);
  232. if (ret < 0)
  233. goto err;
  234. break;
  235. case SYS_DVBC_ANNEX_A:
  236. ret = cxd2820r_init_c(fe);
  237. if (ret < 0)
  238. goto err;
  239. ret = cxd2820r_set_frontend_c(fe);
  240. if (ret < 0)
  241. goto err;
  242. break;
  243. default:
  244. dev_dbg(&priv->i2c->dev, "%s: error state=%d\n", __func__,
  245. fe->dtv_property_cache.delivery_system);
  246. ret = -EINVAL;
  247. break;
  248. }
  249. err:
  250. return ret;
  251. }
  252. static int cxd2820r_read_status(struct dvb_frontend *fe, enum fe_status *status)
  253. {
  254. struct cxd2820r_priv *priv = fe->demodulator_priv;
  255. int ret;
  256. dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
  257. fe->dtv_property_cache.delivery_system);
  258. switch (fe->dtv_property_cache.delivery_system) {
  259. case SYS_DVBT:
  260. ret = cxd2820r_read_status_t(fe, status);
  261. break;
  262. case SYS_DVBT2:
  263. ret = cxd2820r_read_status_t2(fe, status);
  264. break;
  265. case SYS_DVBC_ANNEX_A:
  266. ret = cxd2820r_read_status_c(fe, status);
  267. break;
  268. default:
  269. ret = -EINVAL;
  270. break;
  271. }
  272. return ret;
  273. }
  274. static int cxd2820r_get_frontend(struct dvb_frontend *fe)
  275. {
  276. struct cxd2820r_priv *priv = fe->demodulator_priv;
  277. int ret;
  278. dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
  279. fe->dtv_property_cache.delivery_system);
  280. if (priv->delivery_system == SYS_UNDEFINED)
  281. return 0;
  282. switch (fe->dtv_property_cache.delivery_system) {
  283. case SYS_DVBT:
  284. ret = cxd2820r_get_frontend_t(fe);
  285. break;
  286. case SYS_DVBT2:
  287. ret = cxd2820r_get_frontend_t2(fe);
  288. break;
  289. case SYS_DVBC_ANNEX_A:
  290. ret = cxd2820r_get_frontend_c(fe);
  291. break;
  292. default:
  293. ret = -EINVAL;
  294. break;
  295. }
  296. return ret;
  297. }
  298. static int cxd2820r_read_ber(struct dvb_frontend *fe, u32 *ber)
  299. {
  300. struct cxd2820r_priv *priv = fe->demodulator_priv;
  301. int ret;
  302. dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
  303. fe->dtv_property_cache.delivery_system);
  304. switch (fe->dtv_property_cache.delivery_system) {
  305. case SYS_DVBT:
  306. ret = cxd2820r_read_ber_t(fe, ber);
  307. break;
  308. case SYS_DVBT2:
  309. ret = cxd2820r_read_ber_t2(fe, ber);
  310. break;
  311. case SYS_DVBC_ANNEX_A:
  312. ret = cxd2820r_read_ber_c(fe, ber);
  313. break;
  314. default:
  315. ret = -EINVAL;
  316. break;
  317. }
  318. return ret;
  319. }
  320. static int cxd2820r_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
  321. {
  322. struct cxd2820r_priv *priv = fe->demodulator_priv;
  323. int ret;
  324. dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
  325. fe->dtv_property_cache.delivery_system);
  326. switch (fe->dtv_property_cache.delivery_system) {
  327. case SYS_DVBT:
  328. ret = cxd2820r_read_signal_strength_t(fe, strength);
  329. break;
  330. case SYS_DVBT2:
  331. ret = cxd2820r_read_signal_strength_t2(fe, strength);
  332. break;
  333. case SYS_DVBC_ANNEX_A:
  334. ret = cxd2820r_read_signal_strength_c(fe, strength);
  335. break;
  336. default:
  337. ret = -EINVAL;
  338. break;
  339. }
  340. return ret;
  341. }
  342. static int cxd2820r_read_snr(struct dvb_frontend *fe, u16 *snr)
  343. {
  344. struct cxd2820r_priv *priv = fe->demodulator_priv;
  345. int ret;
  346. dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
  347. fe->dtv_property_cache.delivery_system);
  348. switch (fe->dtv_property_cache.delivery_system) {
  349. case SYS_DVBT:
  350. ret = cxd2820r_read_snr_t(fe, snr);
  351. break;
  352. case SYS_DVBT2:
  353. ret = cxd2820r_read_snr_t2(fe, snr);
  354. break;
  355. case SYS_DVBC_ANNEX_A:
  356. ret = cxd2820r_read_snr_c(fe, snr);
  357. break;
  358. default:
  359. ret = -EINVAL;
  360. break;
  361. }
  362. return ret;
  363. }
  364. static int cxd2820r_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
  365. {
  366. struct cxd2820r_priv *priv = fe->demodulator_priv;
  367. int ret;
  368. dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
  369. fe->dtv_property_cache.delivery_system);
  370. switch (fe->dtv_property_cache.delivery_system) {
  371. case SYS_DVBT:
  372. ret = cxd2820r_read_ucblocks_t(fe, ucblocks);
  373. break;
  374. case SYS_DVBT2:
  375. ret = cxd2820r_read_ucblocks_t2(fe, ucblocks);
  376. break;
  377. case SYS_DVBC_ANNEX_A:
  378. ret = cxd2820r_read_ucblocks_c(fe, ucblocks);
  379. break;
  380. default:
  381. ret = -EINVAL;
  382. break;
  383. }
  384. return ret;
  385. }
  386. static int cxd2820r_init(struct dvb_frontend *fe)
  387. {
  388. return 0;
  389. }
  390. static int cxd2820r_sleep(struct dvb_frontend *fe)
  391. {
  392. struct cxd2820r_priv *priv = fe->demodulator_priv;
  393. int ret;
  394. dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
  395. fe->dtv_property_cache.delivery_system);
  396. switch (fe->dtv_property_cache.delivery_system) {
  397. case SYS_DVBT:
  398. ret = cxd2820r_sleep_t(fe);
  399. break;
  400. case SYS_DVBT2:
  401. ret = cxd2820r_sleep_t2(fe);
  402. break;
  403. case SYS_DVBC_ANNEX_A:
  404. ret = cxd2820r_sleep_c(fe);
  405. break;
  406. default:
  407. ret = -EINVAL;
  408. break;
  409. }
  410. return ret;
  411. }
  412. static int cxd2820r_get_tune_settings(struct dvb_frontend *fe,
  413. struct dvb_frontend_tune_settings *s)
  414. {
  415. struct cxd2820r_priv *priv = fe->demodulator_priv;
  416. int ret;
  417. dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
  418. fe->dtv_property_cache.delivery_system);
  419. switch (fe->dtv_property_cache.delivery_system) {
  420. case SYS_DVBT:
  421. ret = cxd2820r_get_tune_settings_t(fe, s);
  422. break;
  423. case SYS_DVBT2:
  424. ret = cxd2820r_get_tune_settings_t2(fe, s);
  425. break;
  426. case SYS_DVBC_ANNEX_A:
  427. ret = cxd2820r_get_tune_settings_c(fe, s);
  428. break;
  429. default:
  430. ret = -EINVAL;
  431. break;
  432. }
  433. return ret;
  434. }
  435. static enum dvbfe_search cxd2820r_search(struct dvb_frontend *fe)
  436. {
  437. struct cxd2820r_priv *priv = fe->demodulator_priv;
  438. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  439. int ret, i;
  440. enum fe_status status = 0;
  441. dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
  442. fe->dtv_property_cache.delivery_system);
  443. /* switch between DVB-T and DVB-T2 when tune fails */
  444. if (priv->last_tune_failed) {
  445. if (priv->delivery_system == SYS_DVBT) {
  446. ret = cxd2820r_sleep_t(fe);
  447. if (ret)
  448. goto error;
  449. c->delivery_system = SYS_DVBT2;
  450. } else if (priv->delivery_system == SYS_DVBT2) {
  451. ret = cxd2820r_sleep_t2(fe);
  452. if (ret)
  453. goto error;
  454. c->delivery_system = SYS_DVBT;
  455. }
  456. }
  457. /* set frontend */
  458. ret = cxd2820r_set_frontend(fe);
  459. if (ret)
  460. goto error;
  461. /* frontend lock wait loop count */
  462. switch (priv->delivery_system) {
  463. case SYS_DVBT:
  464. case SYS_DVBC_ANNEX_A:
  465. i = 20;
  466. break;
  467. case SYS_DVBT2:
  468. i = 40;
  469. break;
  470. case SYS_UNDEFINED:
  471. default:
  472. i = 0;
  473. break;
  474. }
  475. /* wait frontend lock */
  476. for (; i > 0; i--) {
  477. dev_dbg(&priv->i2c->dev, "%s: loop=%d\n", __func__, i);
  478. msleep(50);
  479. ret = cxd2820r_read_status(fe, &status);
  480. if (ret)
  481. goto error;
  482. if (status & FE_HAS_LOCK)
  483. break;
  484. }
  485. /* check if we have a valid signal */
  486. if (status & FE_HAS_LOCK) {
  487. priv->last_tune_failed = false;
  488. return DVBFE_ALGO_SEARCH_SUCCESS;
  489. } else {
  490. priv->last_tune_failed = true;
  491. return DVBFE_ALGO_SEARCH_AGAIN;
  492. }
  493. error:
  494. dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
  495. return DVBFE_ALGO_SEARCH_ERROR;
  496. }
  497. static int cxd2820r_get_frontend_algo(struct dvb_frontend *fe)
  498. {
  499. return DVBFE_ALGO_CUSTOM;
  500. }
  501. static void cxd2820r_release(struct dvb_frontend *fe)
  502. {
  503. struct cxd2820r_priv *priv = fe->demodulator_priv;
  504. dev_dbg(&priv->i2c->dev, "%s\n", __func__);
  505. #ifdef CONFIG_GPIOLIB
  506. /* remove GPIOs */
  507. if (priv->gpio_chip.label)
  508. gpiochip_remove(&priv->gpio_chip);
  509. #endif
  510. kfree(priv);
  511. return;
  512. }
  513. static int cxd2820r_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
  514. {
  515. struct cxd2820r_priv *priv = fe->demodulator_priv;
  516. dev_dbg(&priv->i2c->dev, "%s: %d\n", __func__, enable);
  517. /* Bit 0 of reg 0xdb in bank 0x00 controls I2C repeater */
  518. return cxd2820r_wr_reg_mask(priv, 0xdb, enable ? 1 : 0, 0x1);
  519. }
  520. #ifdef CONFIG_GPIOLIB
  521. static int cxd2820r_gpio_direction_output(struct gpio_chip *chip, unsigned nr,
  522. int val)
  523. {
  524. struct cxd2820r_priv *priv =
  525. container_of(chip, struct cxd2820r_priv, gpio_chip);
  526. u8 gpio[GPIO_COUNT];
  527. dev_dbg(&priv->i2c->dev, "%s: nr=%d val=%d\n", __func__, nr, val);
  528. memcpy(gpio, priv->gpio, sizeof(gpio));
  529. gpio[nr] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | (val << 2);
  530. return cxd2820r_gpio(&priv->fe, gpio);
  531. }
  532. static void cxd2820r_gpio_set(struct gpio_chip *chip, unsigned nr, int val)
  533. {
  534. struct cxd2820r_priv *priv =
  535. container_of(chip, struct cxd2820r_priv, gpio_chip);
  536. u8 gpio[GPIO_COUNT];
  537. dev_dbg(&priv->i2c->dev, "%s: nr=%d val=%d\n", __func__, nr, val);
  538. memcpy(gpio, priv->gpio, sizeof(gpio));
  539. gpio[nr] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | (val << 2);
  540. (void) cxd2820r_gpio(&priv->fe, gpio);
  541. return;
  542. }
  543. static int cxd2820r_gpio_get(struct gpio_chip *chip, unsigned nr)
  544. {
  545. struct cxd2820r_priv *priv =
  546. container_of(chip, struct cxd2820r_priv, gpio_chip);
  547. dev_dbg(&priv->i2c->dev, "%s: nr=%d\n", __func__, nr);
  548. return (priv->gpio[nr] >> 2) & 0x01;
  549. }
  550. #endif
  551. static const struct dvb_frontend_ops cxd2820r_ops = {
  552. .delsys = { SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_A },
  553. /* default: DVB-T/T2 */
  554. .info = {
  555. .name = "Sony CXD2820R",
  556. .caps = FE_CAN_FEC_1_2 |
  557. FE_CAN_FEC_2_3 |
  558. FE_CAN_FEC_3_4 |
  559. FE_CAN_FEC_5_6 |
  560. FE_CAN_FEC_7_8 |
  561. FE_CAN_FEC_AUTO |
  562. FE_CAN_QPSK |
  563. FE_CAN_QAM_16 |
  564. FE_CAN_QAM_32 |
  565. FE_CAN_QAM_64 |
  566. FE_CAN_QAM_128 |
  567. FE_CAN_QAM_256 |
  568. FE_CAN_QAM_AUTO |
  569. FE_CAN_TRANSMISSION_MODE_AUTO |
  570. FE_CAN_GUARD_INTERVAL_AUTO |
  571. FE_CAN_HIERARCHY_AUTO |
  572. FE_CAN_MUTE_TS |
  573. FE_CAN_2G_MODULATION |
  574. FE_CAN_MULTISTREAM
  575. },
  576. .release = cxd2820r_release,
  577. .init = cxd2820r_init,
  578. .sleep = cxd2820r_sleep,
  579. .get_tune_settings = cxd2820r_get_tune_settings,
  580. .i2c_gate_ctrl = cxd2820r_i2c_gate_ctrl,
  581. .get_frontend = cxd2820r_get_frontend,
  582. .get_frontend_algo = cxd2820r_get_frontend_algo,
  583. .search = cxd2820r_search,
  584. .read_status = cxd2820r_read_status,
  585. .read_snr = cxd2820r_read_snr,
  586. .read_ber = cxd2820r_read_ber,
  587. .read_ucblocks = cxd2820r_read_ucblocks,
  588. .read_signal_strength = cxd2820r_read_signal_strength,
  589. };
  590. struct dvb_frontend *cxd2820r_attach(const struct cxd2820r_config *cfg,
  591. struct i2c_adapter *i2c, int *gpio_chip_base
  592. )
  593. {
  594. struct cxd2820r_priv *priv;
  595. int ret;
  596. u8 tmp;
  597. priv = kzalloc(sizeof(struct cxd2820r_priv), GFP_KERNEL);
  598. if (!priv) {
  599. ret = -ENOMEM;
  600. dev_err(&i2c->dev, "%s: kzalloc() failed\n",
  601. KBUILD_MODNAME);
  602. goto error;
  603. }
  604. priv->i2c = i2c;
  605. memcpy(&priv->cfg, cfg, sizeof(struct cxd2820r_config));
  606. memcpy(&priv->fe.ops, &cxd2820r_ops, sizeof(struct dvb_frontend_ops));
  607. priv->fe.demodulator_priv = priv;
  608. priv->bank[0] = priv->bank[1] = 0xff;
  609. ret = cxd2820r_rd_reg(priv, 0x000fd, &tmp);
  610. dev_dbg(&priv->i2c->dev, "%s: chip id=%02x\n", __func__, tmp);
  611. if (ret || tmp != 0xe1)
  612. goto error;
  613. if (gpio_chip_base) {
  614. #ifdef CONFIG_GPIOLIB
  615. /* add GPIOs */
  616. priv->gpio_chip.label = KBUILD_MODNAME;
  617. priv->gpio_chip.dev = &priv->i2c->dev;
  618. priv->gpio_chip.owner = THIS_MODULE;
  619. priv->gpio_chip.direction_output =
  620. cxd2820r_gpio_direction_output;
  621. priv->gpio_chip.set = cxd2820r_gpio_set;
  622. priv->gpio_chip.get = cxd2820r_gpio_get;
  623. priv->gpio_chip.base = -1; /* dynamic allocation */
  624. priv->gpio_chip.ngpio = GPIO_COUNT;
  625. priv->gpio_chip.can_sleep = 1;
  626. ret = gpiochip_add(&priv->gpio_chip);
  627. if (ret)
  628. goto error;
  629. dev_dbg(&priv->i2c->dev, "%s: gpio_chip.base=%d\n", __func__,
  630. priv->gpio_chip.base);
  631. *gpio_chip_base = priv->gpio_chip.base;
  632. #else
  633. /*
  634. * Use static GPIO configuration if GPIOLIB is undefined.
  635. * This is fallback condition.
  636. */
  637. u8 gpio[GPIO_COUNT];
  638. gpio[0] = (*gpio_chip_base >> 0) & 0x07;
  639. gpio[1] = (*gpio_chip_base >> 3) & 0x07;
  640. gpio[2] = 0;
  641. ret = cxd2820r_gpio(&priv->fe, gpio);
  642. if (ret)
  643. goto error;
  644. #endif
  645. }
  646. return &priv->fe;
  647. error:
  648. dev_dbg(&i2c->dev, "%s: failed=%d\n", __func__, ret);
  649. kfree(priv);
  650. return NULL;
  651. }
  652. EXPORT_SYMBOL(cxd2820r_attach);
  653. MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
  654. MODULE_DESCRIPTION("Sony CXD2820R demodulator driver");
  655. MODULE_LICENSE("GPL");