or51132.c 17 KB

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  1. /*
  2. * Support for OR51132 (pcHDTV HD-3000) - VSB/QAM
  3. *
  4. *
  5. * Copyright (C) 2007 Trent Piepho <xyzzy@speakeasy.org>
  6. *
  7. * Copyright (C) 2005 Kirk Lapray <kirk_lapray@bigfoot.com>
  8. *
  9. * Based on code from Jack Kelliher (kelliher@xmission.com)
  10. * Copyright (C) 2002 & pcHDTV, inc.
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25. *
  26. */
  27. /*
  28. * This driver needs two external firmware files. Please copy
  29. * "dvb-fe-or51132-vsb.fw" and "dvb-fe-or51132-qam.fw" to
  30. * /usr/lib/hotplug/firmware/ or /lib/firmware/
  31. * (depending on configuration of firmware hotplug).
  32. */
  33. #define OR51132_VSB_FIRMWARE "dvb-fe-or51132-vsb.fw"
  34. #define OR51132_QAM_FIRMWARE "dvb-fe-or51132-qam.fw"
  35. #include <linux/kernel.h>
  36. #include <linux/module.h>
  37. #include <linux/init.h>
  38. #include <linux/delay.h>
  39. #include <linux/string.h>
  40. #include <linux/slab.h>
  41. #include <asm/byteorder.h>
  42. #include "dvb_math.h"
  43. #include "dvb_frontend.h"
  44. #include "or51132.h"
  45. static int debug;
  46. #define dprintk(args...) \
  47. do { \
  48. if (debug) printk(KERN_DEBUG "or51132: " args); \
  49. } while (0)
  50. struct or51132_state
  51. {
  52. struct i2c_adapter* i2c;
  53. /* Configuration settings */
  54. const struct or51132_config* config;
  55. struct dvb_frontend frontend;
  56. /* Demodulator private data */
  57. enum fe_modulation current_modulation;
  58. u32 snr; /* Result of last SNR calculation */
  59. /* Tuner private data */
  60. u32 current_frequency;
  61. };
  62. /* Write buffer to demod */
  63. static int or51132_writebuf(struct or51132_state *state, const u8 *buf, int len)
  64. {
  65. int err;
  66. struct i2c_msg msg = { .addr = state->config->demod_address,
  67. .flags = 0, .buf = (u8*)buf, .len = len };
  68. /* msleep(20); */ /* doesn't appear to be necessary */
  69. if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  70. printk(KERN_WARNING "or51132: I2C write (addr 0x%02x len %d) error: %d\n",
  71. msg.addr, msg.len, err);
  72. return -EREMOTEIO;
  73. }
  74. return 0;
  75. }
  76. /* Write constant bytes, e.g. or51132_writebytes(state, 0x04, 0x42, 0x00);
  77. Less code and more efficient that loading a buffer on the stack with
  78. the bytes to send and then calling or51132_writebuf() on that. */
  79. #define or51132_writebytes(state, data...) \
  80. ({ static const u8 _data[] = {data}; \
  81. or51132_writebuf(state, _data, sizeof(_data)); })
  82. /* Read data from demod into buffer. Returns 0 on success. */
  83. static int or51132_readbuf(struct or51132_state *state, u8 *buf, int len)
  84. {
  85. int err;
  86. struct i2c_msg msg = { .addr = state->config->demod_address,
  87. .flags = I2C_M_RD, .buf = buf, .len = len };
  88. /* msleep(20); */ /* doesn't appear to be necessary */
  89. if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  90. printk(KERN_WARNING "or51132: I2C read (addr 0x%02x len %d) error: %d\n",
  91. msg.addr, msg.len, err);
  92. return -EREMOTEIO;
  93. }
  94. return 0;
  95. }
  96. /* Reads a 16-bit demod register. Returns <0 on error. */
  97. static int or51132_readreg(struct or51132_state *state, u8 reg)
  98. {
  99. u8 buf[2] = { 0x04, reg };
  100. struct i2c_msg msg[2] = {
  101. {.addr = state->config->demod_address, .flags = 0,
  102. .buf = buf, .len = 2 },
  103. {.addr = state->config->demod_address, .flags = I2C_M_RD,
  104. .buf = buf, .len = 2 }};
  105. int err;
  106. if ((err = i2c_transfer(state->i2c, msg, 2)) != 2) {
  107. printk(KERN_WARNING "or51132: I2C error reading register %d: %d\n",
  108. reg, err);
  109. return -EREMOTEIO;
  110. }
  111. return buf[0] | (buf[1] << 8);
  112. }
  113. static int or51132_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
  114. {
  115. struct or51132_state* state = fe->demodulator_priv;
  116. static const u8 run_buf[] = {0x7F,0x01};
  117. u8 rec_buf[8];
  118. u32 firmwareAsize, firmwareBsize;
  119. int i,ret;
  120. dprintk("Firmware is %Zd bytes\n",fw->size);
  121. /* Get size of firmware A and B */
  122. firmwareAsize = le32_to_cpu(*((__le32*)fw->data));
  123. dprintk("FirmwareA is %i bytes\n",firmwareAsize);
  124. firmwareBsize = le32_to_cpu(*((__le32*)(fw->data+4)));
  125. dprintk("FirmwareB is %i bytes\n",firmwareBsize);
  126. /* Upload firmware */
  127. if ((ret = or51132_writebuf(state, &fw->data[8], firmwareAsize))) {
  128. printk(KERN_WARNING "or51132: load_firmware error 1\n");
  129. return ret;
  130. }
  131. if ((ret = or51132_writebuf(state, &fw->data[8+firmwareAsize],
  132. firmwareBsize))) {
  133. printk(KERN_WARNING "or51132: load_firmware error 2\n");
  134. return ret;
  135. }
  136. if ((ret = or51132_writebuf(state, run_buf, 2))) {
  137. printk(KERN_WARNING "or51132: load_firmware error 3\n");
  138. return ret;
  139. }
  140. if ((ret = or51132_writebuf(state, run_buf, 2))) {
  141. printk(KERN_WARNING "or51132: load_firmware error 4\n");
  142. return ret;
  143. }
  144. /* 50ms for operation to begin */
  145. msleep(50);
  146. /* Read back ucode version to besure we loaded correctly and are really up and running */
  147. /* Get uCode version */
  148. if ((ret = or51132_writebytes(state, 0x10, 0x10, 0x00))) {
  149. printk(KERN_WARNING "or51132: load_firmware error a\n");
  150. return ret;
  151. }
  152. if ((ret = or51132_writebytes(state, 0x04, 0x17))) {
  153. printk(KERN_WARNING "or51132: load_firmware error b\n");
  154. return ret;
  155. }
  156. if ((ret = or51132_writebytes(state, 0x00, 0x00))) {
  157. printk(KERN_WARNING "or51132: load_firmware error c\n");
  158. return ret;
  159. }
  160. for (i=0;i<4;i++) {
  161. /* Once upon a time, this command might have had something
  162. to do with getting the firmware version, but it's
  163. not used anymore:
  164. {0x04,0x00,0x30,0x00,i+1} */
  165. /* Read 8 bytes, two bytes at a time */
  166. if ((ret = or51132_readbuf(state, &rec_buf[i*2], 2))) {
  167. printk(KERN_WARNING
  168. "or51132: load_firmware error d - %d\n",i);
  169. return ret;
  170. }
  171. }
  172. printk(KERN_WARNING
  173. "or51132: Version: %02X%02X%02X%02X-%02X%02X%02X%02X (%02X%01X-%01X-%02X%01X-%01X)\n",
  174. rec_buf[1],rec_buf[0],rec_buf[3],rec_buf[2],
  175. rec_buf[5],rec_buf[4],rec_buf[7],rec_buf[6],
  176. rec_buf[3],rec_buf[2]>>4,rec_buf[2]&0x0f,
  177. rec_buf[5],rec_buf[4]>>4,rec_buf[4]&0x0f);
  178. if ((ret = or51132_writebytes(state, 0x10, 0x00, 0x00))) {
  179. printk(KERN_WARNING "or51132: load_firmware error e\n");
  180. return ret;
  181. }
  182. return 0;
  183. };
  184. static int or51132_init(struct dvb_frontend* fe)
  185. {
  186. return 0;
  187. }
  188. static int or51132_read_ber(struct dvb_frontend* fe, u32* ber)
  189. {
  190. *ber = 0;
  191. return 0;
  192. }
  193. static int or51132_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
  194. {
  195. *ucblocks = 0;
  196. return 0;
  197. }
  198. static int or51132_sleep(struct dvb_frontend* fe)
  199. {
  200. return 0;
  201. }
  202. static int or51132_setmode(struct dvb_frontend* fe)
  203. {
  204. struct or51132_state* state = fe->demodulator_priv;
  205. u8 cmd_buf1[3] = {0x04, 0x01, 0x5f};
  206. u8 cmd_buf2[3] = {0x1c, 0x00, 0 };
  207. dprintk("setmode %d\n",(int)state->current_modulation);
  208. switch (state->current_modulation) {
  209. case VSB_8:
  210. /* Auto CH, Auto NTSC rej, MPEGser, MPEG2tr, phase noise-high */
  211. cmd_buf1[2] = 0x50;
  212. /* REC MODE inv IF spectrum, Normal */
  213. cmd_buf2[1] = 0x03;
  214. /* Channel MODE ATSC/VSB8 */
  215. cmd_buf2[2] = 0x06;
  216. break;
  217. /* All QAM modes are:
  218. Auto-deinterleave; MPEGser, MPEG2tr, phase noise-high
  219. REC MODE Normal Carrier Lock */
  220. case QAM_AUTO:
  221. /* Channel MODE Auto QAM64/256 */
  222. cmd_buf2[2] = 0x4f;
  223. break;
  224. case QAM_256:
  225. /* Channel MODE QAM256 */
  226. cmd_buf2[2] = 0x45;
  227. break;
  228. case QAM_64:
  229. /* Channel MODE QAM64 */
  230. cmd_buf2[2] = 0x43;
  231. break;
  232. default:
  233. printk(KERN_WARNING
  234. "or51132: setmode: Modulation set to unsupported value (%d)\n",
  235. state->current_modulation);
  236. return -EINVAL;
  237. }
  238. /* Set Receiver 1 register */
  239. if (or51132_writebuf(state, cmd_buf1, 3)) {
  240. printk(KERN_WARNING "or51132: set_mode error 1\n");
  241. return -EREMOTEIO;
  242. }
  243. dprintk("set #1 to %02x\n", cmd_buf1[2]);
  244. /* Set operation mode in Receiver 6 register */
  245. if (or51132_writebuf(state, cmd_buf2, 3)) {
  246. printk(KERN_WARNING "or51132: set_mode error 2\n");
  247. return -EREMOTEIO;
  248. }
  249. dprintk("set #6 to 0x%02x%02x\n", cmd_buf2[1], cmd_buf2[2]);
  250. return 0;
  251. }
  252. /* Some modulations use the same firmware. This classifies modulations
  253. by the firmware they use. */
  254. #define MOD_FWCLASS_UNKNOWN 0
  255. #define MOD_FWCLASS_VSB 1
  256. #define MOD_FWCLASS_QAM 2
  257. static int modulation_fw_class(enum fe_modulation modulation)
  258. {
  259. switch(modulation) {
  260. case VSB_8:
  261. return MOD_FWCLASS_VSB;
  262. case QAM_AUTO:
  263. case QAM_64:
  264. case QAM_256:
  265. return MOD_FWCLASS_QAM;
  266. default:
  267. return MOD_FWCLASS_UNKNOWN;
  268. }
  269. }
  270. static int or51132_set_parameters(struct dvb_frontend *fe)
  271. {
  272. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  273. int ret;
  274. struct or51132_state* state = fe->demodulator_priv;
  275. const struct firmware *fw;
  276. const char *fwname;
  277. int clock_mode;
  278. /* Upload new firmware only if we need a different one */
  279. if (modulation_fw_class(state->current_modulation) !=
  280. modulation_fw_class(p->modulation)) {
  281. switch (modulation_fw_class(p->modulation)) {
  282. case MOD_FWCLASS_VSB:
  283. dprintk("set_parameters VSB MODE\n");
  284. fwname = OR51132_VSB_FIRMWARE;
  285. /* Set non-punctured clock for VSB */
  286. clock_mode = 0;
  287. break;
  288. case MOD_FWCLASS_QAM:
  289. dprintk("set_parameters QAM MODE\n");
  290. fwname = OR51132_QAM_FIRMWARE;
  291. /* Set punctured clock for QAM */
  292. clock_mode = 1;
  293. break;
  294. default:
  295. printk("or51132: Modulation type(%d) UNSUPPORTED\n",
  296. p->modulation);
  297. return -1;
  298. }
  299. printk("or51132: Waiting for firmware upload(%s)...\n",
  300. fwname);
  301. ret = request_firmware(&fw, fwname, state->i2c->dev.parent);
  302. if (ret) {
  303. printk(KERN_WARNING "or51132: No firmware up"
  304. "loaded(timeout or file not found?)\n");
  305. return ret;
  306. }
  307. ret = or51132_load_firmware(fe, fw);
  308. release_firmware(fw);
  309. if (ret) {
  310. printk(KERN_WARNING "or51132: Writing firmware to "
  311. "device failed!\n");
  312. return ret;
  313. }
  314. printk("or51132: Firmware upload complete.\n");
  315. state->config->set_ts_params(fe, clock_mode);
  316. }
  317. /* Change only if we are actually changing the modulation */
  318. if (state->current_modulation != p->modulation) {
  319. state->current_modulation = p->modulation;
  320. or51132_setmode(fe);
  321. }
  322. if (fe->ops.tuner_ops.set_params) {
  323. fe->ops.tuner_ops.set_params(fe);
  324. if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
  325. }
  326. /* Set to current mode */
  327. or51132_setmode(fe);
  328. /* Update current frequency */
  329. state->current_frequency = p->frequency;
  330. return 0;
  331. }
  332. static int or51132_get_parameters(struct dvb_frontend* fe)
  333. {
  334. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  335. struct or51132_state* state = fe->demodulator_priv;
  336. int status;
  337. int retry = 1;
  338. start:
  339. /* Receiver Status */
  340. if ((status = or51132_readreg(state, 0x00)) < 0) {
  341. printk(KERN_WARNING "or51132: get_parameters: error reading receiver status\n");
  342. return -EREMOTEIO;
  343. }
  344. switch(status&0xff) {
  345. case 0x06:
  346. p->modulation = VSB_8;
  347. break;
  348. case 0x43:
  349. p->modulation = QAM_64;
  350. break;
  351. case 0x45:
  352. p->modulation = QAM_256;
  353. break;
  354. default:
  355. if (retry--)
  356. goto start;
  357. printk(KERN_WARNING "or51132: unknown status 0x%02x\n",
  358. status&0xff);
  359. return -EREMOTEIO;
  360. }
  361. /* FIXME: Read frequency from frontend, take AFC into account */
  362. p->frequency = state->current_frequency;
  363. /* FIXME: How to read inversion setting? Receiver 6 register? */
  364. p->inversion = INVERSION_AUTO;
  365. return 0;
  366. }
  367. static int or51132_read_status(struct dvb_frontend *fe, enum fe_status *status)
  368. {
  369. struct or51132_state* state = fe->demodulator_priv;
  370. int reg;
  371. /* Receiver Status */
  372. if ((reg = or51132_readreg(state, 0x00)) < 0) {
  373. printk(KERN_WARNING "or51132: read_status: error reading receiver status: %d\n", reg);
  374. *status = 0;
  375. return -EREMOTEIO;
  376. }
  377. dprintk("%s: read_status %04x\n", __func__, reg);
  378. if (reg & 0x0100) /* Receiver Lock */
  379. *status = FE_HAS_SIGNAL|FE_HAS_CARRIER|FE_HAS_VITERBI|
  380. FE_HAS_SYNC|FE_HAS_LOCK;
  381. else
  382. *status = 0;
  383. return 0;
  384. }
  385. /* Calculate SNR estimation (scaled by 2^24)
  386. 8-VSB SNR and QAM equations from Oren datasheets
  387. For 8-VSB:
  388. SNR[dB] = 10 * log10(897152044.8282 / MSE^2 ) - K
  389. Where K = 0 if NTSC rejection filter is OFF; and
  390. K = 3 if NTSC rejection filter is ON
  391. For QAM64:
  392. SNR[dB] = 10 * log10(897152044.8282 / MSE^2 )
  393. For QAM256:
  394. SNR[dB] = 10 * log10(907832426.314266 / MSE^2 )
  395. We re-write the snr equation as:
  396. SNR * 2^24 = 10*(c - 2*intlog10(MSE))
  397. Where for QAM256, c = log10(907832426.314266) * 2^24
  398. and for 8-VSB and QAM64, c = log10(897152044.8282) * 2^24 */
  399. static u32 calculate_snr(u32 mse, u32 c)
  400. {
  401. if (mse == 0) /* No signal */
  402. return 0;
  403. mse = 2*intlog10(mse);
  404. if (mse > c) {
  405. /* Negative SNR, which is possible, but realisticly the
  406. demod will lose lock before the signal gets this bad. The
  407. API only allows for unsigned values, so just return 0 */
  408. return 0;
  409. }
  410. return 10*(c - mse);
  411. }
  412. static int or51132_read_snr(struct dvb_frontend* fe, u16* snr)
  413. {
  414. struct or51132_state* state = fe->demodulator_priv;
  415. int noise, reg;
  416. u32 c, usK = 0;
  417. int retry = 1;
  418. start:
  419. /* SNR after Equalizer */
  420. noise = or51132_readreg(state, 0x02);
  421. if (noise < 0) {
  422. printk(KERN_WARNING "or51132: read_snr: error reading equalizer\n");
  423. return -EREMOTEIO;
  424. }
  425. dprintk("read_snr noise (%d)\n", noise);
  426. /* Read status, contains modulation type for QAM_AUTO and
  427. NTSC filter for VSB */
  428. reg = or51132_readreg(state, 0x00);
  429. if (reg < 0) {
  430. printk(KERN_WARNING "or51132: read_snr: error reading receiver status\n");
  431. return -EREMOTEIO;
  432. }
  433. switch (reg&0xff) {
  434. case 0x06:
  435. if (reg & 0x1000) usK = 3 << 24;
  436. /* Fall through to QAM64 case */
  437. case 0x43:
  438. c = 150204167;
  439. break;
  440. case 0x45:
  441. c = 150290396;
  442. break;
  443. default:
  444. printk(KERN_WARNING "or51132: unknown status 0x%02x\n", reg&0xff);
  445. if (retry--) goto start;
  446. return -EREMOTEIO;
  447. }
  448. dprintk("%s: modulation %02x, NTSC rej O%s\n", __func__,
  449. reg&0xff, reg&0x1000?"n":"ff");
  450. /* Calculate SNR using noise, c, and NTSC rejection correction */
  451. state->snr = calculate_snr(noise, c) - usK;
  452. *snr = (state->snr) >> 16;
  453. dprintk("%s: noise = 0x%08x, snr = %d.%02d dB\n", __func__, noise,
  454. state->snr >> 24, (((state->snr>>8) & 0xffff) * 100) >> 16);
  455. return 0;
  456. }
  457. static int or51132_read_signal_strength(struct dvb_frontend* fe, u16* strength)
  458. {
  459. /* Calculate Strength from SNR up to 35dB */
  460. /* Even though the SNR can go higher than 35dB, there is some comfort */
  461. /* factor in having a range of strong signals that can show at 100% */
  462. struct or51132_state* state = (struct or51132_state*) fe->demodulator_priv;
  463. u16 snr;
  464. int ret;
  465. ret = fe->ops.read_snr(fe, &snr);
  466. if (ret != 0)
  467. return ret;
  468. /* Rather than use the 8.8 value snr, use state->snr which is 8.24 */
  469. /* scale the range 0 - 35*2^24 into 0 - 65535 */
  470. if (state->snr >= 8960 * 0x10000)
  471. *strength = 0xffff;
  472. else
  473. *strength = state->snr / 8960;
  474. return 0;
  475. }
  476. static int or51132_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
  477. {
  478. fe_tune_settings->min_delay_ms = 500;
  479. fe_tune_settings->step_size = 0;
  480. fe_tune_settings->max_drift = 0;
  481. return 0;
  482. }
  483. static void or51132_release(struct dvb_frontend* fe)
  484. {
  485. struct or51132_state* state = fe->demodulator_priv;
  486. kfree(state);
  487. }
  488. static struct dvb_frontend_ops or51132_ops;
  489. struct dvb_frontend* or51132_attach(const struct or51132_config* config,
  490. struct i2c_adapter* i2c)
  491. {
  492. struct or51132_state* state = NULL;
  493. /* Allocate memory for the internal state */
  494. state = kzalloc(sizeof(struct or51132_state), GFP_KERNEL);
  495. if (state == NULL)
  496. return NULL;
  497. /* Setup the state */
  498. state->config = config;
  499. state->i2c = i2c;
  500. state->current_frequency = -1;
  501. state->current_modulation = -1;
  502. /* Create dvb_frontend */
  503. memcpy(&state->frontend.ops, &or51132_ops, sizeof(struct dvb_frontend_ops));
  504. state->frontend.demodulator_priv = state;
  505. return &state->frontend;
  506. }
  507. static struct dvb_frontend_ops or51132_ops = {
  508. .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
  509. .info = {
  510. .name = "Oren OR51132 VSB/QAM Frontend",
  511. .frequency_min = 44000000,
  512. .frequency_max = 958000000,
  513. .frequency_stepsize = 166666,
  514. .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
  515. FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
  516. FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_QAM_AUTO |
  517. FE_CAN_8VSB
  518. },
  519. .release = or51132_release,
  520. .init = or51132_init,
  521. .sleep = or51132_sleep,
  522. .set_frontend = or51132_set_parameters,
  523. .get_frontend = or51132_get_parameters,
  524. .get_tune_settings = or51132_get_tune_settings,
  525. .read_status = or51132_read_status,
  526. .read_ber = or51132_read_ber,
  527. .read_signal_strength = or51132_read_signal_strength,
  528. .read_snr = or51132_read_snr,
  529. .read_ucblocks = or51132_read_ucblocks,
  530. };
  531. module_param(debug, int, 0644);
  532. MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
  533. MODULE_DESCRIPTION("OR51132 ATSC [pcHDTV HD-3000] (8VSB & ITU J83 AnnexB FEC QAM64/256) Demodulator Driver");
  534. MODULE_AUTHOR("Kirk Lapray");
  535. MODULE_AUTHOR("Trent Piepho");
  536. MODULE_LICENSE("GPL");
  537. EXPORT_SYMBOL(or51132_attach);